Microchip Technology LN-CSAC User Manual
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Microchip Technology LN-CSAC User Manual

Microchip Technology LN-CSAC User Manual

Low-noise chip-scale atomic clock
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Low-Noise Chip-Scale
Atomic Clock (LN-CSAC)
SA65-LN User's Guide
 2024 Microchip Technology Inc. and its subsidiaries
DS50003805A

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Summary of Contents for Microchip Technology LN-CSAC

  • Page 1 Low-Noise Chip-Scale Atomic Clock (LN-CSAC) SA65-LN User’s Guide  2024 Microchip Technology Inc. and its subsidiaries DS50003805A...

  • Page 2: Legal Notice

    “Microchip” name and logo, the “M” logo, and other names, logos, and brands are registered and unregistered trademarks of Microchip Technology Incorporated or its affiliates and/or subsidiaries in the United States and/or other countries (“Microchip Trademarks”). Information regarding Microchip Trademarks can be found at https://www.microchip.com/en-us/about/legalinformation/microchip-...

  • Page 3: Preface

    This material consists of a brief description of the LN-CSAC design supported by block diagrams, description of environmental issues, installation guidelines, and unit opera- tion.

  • Page 4: Conventions Used In This Guide

    Choice of mutually exclusive errorlevel {0|1} character: { | } arguments; an OR selection Ellipses... Replaces repeated text var_name [, var_name...] Represents code supplied by void main (void) user { ... DS50003805A-page 4  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 5: Warnings, Cautions, Recommendations, And Notes

    Microchip FTS Services and Support: North and South America Microchip Technology Inc. Frequency and Time Systems Group 3870 North First St. San Jose, CA 95134-1702 Toll-free in North America: 1-888-367-7966, Option 3 Telephone: 408-428-7907  2024 Microchip Technology Inc. and its subsidiaries DS50003805A-page 5...

  • Page 6: The Microchip Website

    • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives DS50003805A-page 6  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 7: Customer Support

    Technical support is available through the website at: http://www.microchip.com/support. DOCUMENT REVISION HISTORY Revision A (December 2024) • Initial release of this document as Microchip DS50003805A.  2024 Microchip Technology Inc. and its subsidiaries DS50003805A-page 7...
  • Page 8 LN-CSAC Model SA65-LN User’s Guide NOTES: DS50003805A-page 8  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 9: Table Of Contents

    Section 2.12 “Time-of-Day” ................. 25 Chapter 3. “Programmer’s Reference” ..............27 Section 3.1 “Overview of Telemetry Interface” ............ 27 Section 3.1.1 “Checksum (Error-Checking Option for Telemetry Interface Commu- nications)” ....................27  2024 Microchip Technology Inc. and its subsidiaries DS50003805A-page 9...
  • Page 10 Section 3.3.13 “Help (?)”..................37 Chapter 4. “Developer’s Kit” ..................39 Section 4.1 “Evaluation Board Overview”............39 Section 4.2 “Installing the LN-CSAC on the Evaluation Board”......40 Section 4.3 “Cabling”................... 40 Section 4.4 “Clockstudio Software Information” ..........41 Chapter 5. “Design Guide” ..................43 Section 5.1 “The Art of Disciplining”...

  • Page 11: Chapter 1. Product Overview

    Microchip SA65-LN Low-Noise Chip Scale Atomic Clock. The LN-CSAC provides a 10 MHz sine wave and 1 PPS outputs. It can accept a 1 PPS input to synchronize the output to within 100 ns of a reference clock. It can also disci- –12...

  • Page 12: Section 1.3 "Packaging

    The design details of the developer's kit can be used to assist with host system design (for example, power conditioning or signal buffering). This guide must be used in con- junction with the current data sheet for LN-CSAC which is available on the Microchip website at www.microchip.com.

  • Page 13: Section 1.5 "Recommended Operating Characteristics

    Output 1 PPS pulse duration is adjustable from 10 µs to 500,000 µs in increments of 10 µs Timing reference is the rising edge of pin 10. Rise time <10 ns at a load capaci- tance of 10 pF.  2024 Microchip Technology Inc. and its subsidiaries DS50003805A-page 13...
  • Page 14 LN-CSAC Model SA65-LN User’s Guide NOTES: DS50003805A-page 14  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 15: Chapter 2. Functional Description

    FIGURE 2-1: Simplified LN-CSAC Block Diagram. The principal RF output from the LN-CSAC is provided by an evacuated miniature crys- tal oscillator (EMXO). In normal operation, the frequency of the EMXO is continuously compared and corrected to the ground state hyperfine frequency of the cesium atoms, contained within the physics package, which thereby improves the long-term stability and environmental sensitivity of the EMXO.

  • Page 16: Section 2.2 "Start-Up Sequence

    To avoid severe damage to the unit, do not apply power to the incorrect terminals. The LN-CSAC does not have reverse voltage protection. When power is connected to pin 5 the LN-CSAC unit begins its warm-up cycle. 10 MHz and 1 PPS output signals appear immediately upon power-up, but the output signals are not stable until the atomic control loop is locked (indicated CMOS low on the BITE pin and also by the "status"...

  • Page 17: Section 2.4 "Rf Output Characteristics

    FIGURE 2-2: CSAC RF Output Driver Circuit. The RF output appears on pin 3 after the LN-CSAC is powered ON and is always pres- ent, regardless of the lock status. When the LN-CSAC is out of lock (BITE = 1, status ≠...
  • Page 18 Note: Steering commands can only be entered when the unit is locked (Status=0). Steering commands entered when Status ≠ 0 are ignored. Frequency steering is volatile. Upon reboot, the LN-CSAC returns to its nominal (cali- brated) frequency setting. To update the non-volatile calibration, use the Frequency Latch command (Section 3.3.2 “Frequency Adjustment (F)”).

  • Page 19: Section 2.6.1 "Frequency Calibration

    0. In this example, each time Apply is clicked, an additional correction of –100000 × –15 is applied to the LN-CSAC. In this screen shot, Apply has been clicked a total of –12 four times. The resultant value of Steer is –400 × 10 FIGURE 2-4: Relative Frequency Adjustment.

  • Page 20: Section 2.8 "Time-Interval Counter

    PPSOUT occurs after PPSEXT by Phase ns. For values of Phase outside the range of ±800 ns the TIC reports Phase with resolution of 100 ns (10 MHz LN-CSAC). For values of Phase within ±800 ns, the TIC reports Phase with resolution of 1 ns.

  • Page 21: Section 2.9 "1 Pps Synchronization

    PPSOUT is swept through Phase = 0. For this data, PPSOUT was synchronized to PPSEXT prior to time = 0. Absolute Frequency Steers of ±1E-8 were applied to the LN-CSAC at times 25 sec., 175 sec., and 475 sec. 1 PPS SYNCHRONIZATION Note: Synchronization has the effect of a one-time alignment between incoming and outgoing PPS signals.

  • Page 22: Section 2.9.1 "Manual Synchronization

    LN-CSAC’s microwave synthesizer through the digital tuning value (steer, observed from the telemetry string). The algorithm steers the frequency so as to simultaneously discipline both the time- and frequency-error of the LN-CSAC to that of the external ref- –12 erence, ultimately achieving accuracies of <5 ns and 1 × 10 , respectively.
  • Page 23 The DiscOK indicator and DiscOKthreshold have no impact on the behavior or perfor- mance of the LN-CSAC, DiscOK is a simple status indicator. In practice, DiscOK is fre- quently employed for detection of initial acquisition to an external reference. It is less useful for long-term monitoring, where intermediate excursions may exceed the long-term stability objective.

  • Page 24: Section 2.10.1 "Cable Length Compensation

    The maximum compensation adjustment is ±25 ns, with resolution of 100 ps. The com- pensation value is entered into the LN-CSAC as a signed integer in units of 100 ps, where positive sign indicates phase advancement of the input 1 PPS. For example, if...

  • Page 25: Section 2.12 "Time-Of-Day

    Section 3.3.8 “Time-of-Day (TOD)”). When the !T? command is received, the LN-CSAC waits for the next rising edge of 1 PPS before replying with the TOD of the current epoch, that is, if the command is received during epoch N, then the reply N+1 appears immediately following the next PPSOUT.
  • Page 26 FIGURE 2-9: Clockstudio Time of Day Tab. The raw LN-CSAC TOD values is shown in the lower field of the panel (here 2281). The upper display of the TOD tab realizes the timekeeping convention of the C program- ming language (in UNIX and Microsoft Windows), which counts time in seconds from midnight January 1, 1970.

  • Page 27: Chapter 3. Programmer's Reference

    SA65-LN USER’S GUIDE Chapter 3. Programmer’s Reference Pins 5 and 6 provide a serial interface for communication with the LN-CSAC The pro- tocol is fundamentally similar to RS-232, with the exception that the voltage levels are CMOS (0V to VCC), rather than ±12V.

  • Page 28: Section 3.1.2 "How To Calculate The Checksum

    Example (malformed checksum): Command: !Mc*2D[CRLF] Unit response: *[CRLF] Note: Communicating with the LN-CSAC via Clockstudio does not require a checksum. Any commands sent to the LN-CSAC via the Clockstudio con- sole will have a checksum generated automatically. However, if a check- sum is provided, the LN-CSAC will respond appropriately.

  • Page 29: Section 3.3.8 "Time-Of-Day (Tod)

    The following are descriptions of the LN-CSAC’s commands. 3.3.1 Telemetry (6 and ^) LN-CSAC supports two commands, !6 and !^, to retrieve the telemetry headers and val- ues, respectively. Both responses are comma-delimited strings, suitable for importing into spreadsheet programs.
  • Page 30 . An alarm will not persist if the condition is fixed or if the unit is reset. LN-CSAC serial numbers are of the form YYMMCSXXXXX where YYMM is the year and month of produc- tion and XXXXX is the serialized production unit number.
  • Page 31 In this case, warm-up time takes longer than stated on the data sheet. To avoid this, it is recommended to always allow LN-CSAC to remain powered on for >102 seconds after it acquires LOCK. The minimum amount of time necessary to save LN-CSAC set points to memory is 102 seconds, thus avoiding set-point re-acquisition upon its next power up.
  • Page 32 Latch command to the LN-CSAC, which updates the internal calibration (stored in non-volatile memory) according to the current value of the Steer register and resets Steer to zero. Note that the Latch command is only valid when the LN-CSAC is locked (Status = 0).
  • Page 33 For example, if a !FL command is applied to the LN-CSAC at a rate of 1/sec, the LN-CSAC may experience operational failure within a few days of operation 3.3.3...
  • Page 34 Cable length compensation can be applied to allow for known delay (or advance) in the arrival time of the reference 1 PPS at the LN-CSAC (see Section 2.10.1 “Cable Length Compensation”). Cable length compensation is represented as a signed inte- ger in units of 100 ps, with a maximum value of ±250 (25 ns).
  • Page 35 TOD is maintained internally within the LN-CSAC, represented by a single unsigned long integer value, which begins counting up from 0 when the LN-CSAC is powered on. The TOD is synchronized with the 1 PPS output. TOD is routinely transmitted in the telemetry string (see Section 3.3.1 “Telemetry (6 and ^)”).
  • Page 36 !>uX[CLRF] where X is the number of microseconds of the desired pule width. However, the LN-CSAC is still restricted to multiples of the base width. If a pulse width that is not a multiple of the base width is entered, the LN-CSAC will round to the nearest multiple.
  • Page 37 Note: The single-character . is a shortcut for !.?[CRLF]. 3.3.12 Report Part Number (p) The LN-CSAC part number may be retrieved with the ‘p’ command. The stored part number is a free-form ASCII string of maximum length 15 bytes, including a NULL ter- minator.
  • Page 38 LN-CSAC Model SA65-LN User’s Guide Note: The single-character ? is a shortcut for !?[CRLF]. DS50003805A-page 38  2024 Microchip Technology Inc. and its subsidiaries...
  • Page 39 LN-CSAC Model SA65-LN User’s Guide NOTES:  2024 Microchip Technology Inc. and its subsidiaries DS50003805A-page 39...
  • Page 40 LN-CSAC Model SA65-LN User’s Guide DS50003805A-page 40  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 41: Chapter 4. Developer's Kit

    LN-CSAC MODEL SA65-LN USER’S GUIDE Chapter 4. Developer’s Kit The LN-CSAC Developer’s Kit includes hardware and cabling to facilitate validation of performance, brass-board demonstrations, and software interface development. Package Contents The following table lists the contents of the developer’s kit (Part #990-00565-000).

  • Page 42: Section 4.2 "Installing The Ln-Csac On The Evaluation Board

    The following items are included in the developer's kit PCB and power supply. • RF Output (SMA): The LN-CSAC output is an RF, Sine -1.5V to 1.5V waveform. The SMA on the evaluation board is directly connected to RF out (pin 3) on the LN-CSAC.

  • Page 43: Section 4.4 "Clockstudio Software Information

    LN-CSAC. Clockstudio may also be used for collecting and archiving monitor data from the LN-CSAC. It can be run on any PC that runs Windows 10 or 11 and has at least one available RS-232 (COM) Port.
  • Page 44 LN-CSAC Model SA65-LN User’s Guide NOTES: DS50003805A-page 44  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 45: Chapter 5. Design Guide

    GPS. Implemented incorrectly, disciplining may degrade the performance of the LN-CSAC. For example, if the LN-CSAC is disciplined with a short time constant to a source that is noisier than LN-CSAC, such as GPS.
  • Page 46 LN-CSAC on all time scales. The noise is dominated by the TIC for τ < 10 seconds and by the LN-CSAC for τ > 10 sec- onds. In this case, the disciplining time constant may be lowered to 60 seconds (mini- mum tau for LN-CSAC) for optimal performance.

  • Page 47: Section 5.2 "Heat Sink

    LN-CSAC Model SA65-LN User’s Guide HEAT SINK The LN-CSAC does not require a heat sink because it consumes low power and there- fore produces little heat. Furthermore, the external parts of LN-CSAC are mu-metal (80% nickel), which is a poor thermal conductor (1/5 that of aluminum). There is no use- ful thermal path from the inside components to the baseplate or the cover.

  • Page 48: Section 5.4 "Evaluation Board

    LN-CSAC Model SA65-LN User’s Guide EVALUATION BOARD The following illustration shows the reference schematic for the evaluation board FIGURE 5-3: Reference Schematic for Evaluation Board. DS50003805A-page 48  2024 Microchip Technology Inc. and its subsidiaries...

  • Page 49: Section 5.5 "Writes To Nvram

    UHS inverter. This is to protect the LN-CSAC in the evaluation environment, from 1 PPS signals >5V. The 10 MHz output from the LN-CSAC is directly connected to J3 on the evaluation board.
  • Page 50 LN-CSAC Model SA65-LN User’s Guide NOTES: DS50003805A-page 50  2024 Microchip Technology Inc. and its subsidiaries...

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