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Related Manuals for ACCESS I/O PRODUCTS PCIe-IDIO-24
Summary of Contents for ACCESS I/O PRODUCTS PCIe-IDIO-24
- Page 1 10623 Roselle Street, San Diego, CA 92121 (858) 550-9559 Fax (858) 550-7322 contactus@accesio.com www.accesio.com MODELS PCIe-IDIO-24, PCIe-IDI-24, PCIe-IDO-24, PCIe-IDIO-12 ISOLATED DIGITAL INPUT FET OUTPUT BOARDS USER MANUAL File: MPCIe-IDIO-24.A3c...
- Page 2 THE COMPUTER POWER OFF. ALWAYS TURN COMPUTER POWER OFF BEFORE INSTALLING A BOARD. CONNECTING AND DISCONNECTING CABLES, OR INSTALLING BOARDS INTO A SYSTEM WITH THE COMPUTER OR FIELD POWER ON MAY CAUSE DAMAGE TO THE I/O BOARD AND WILL VOID ALL WARRANTIES, IMPLIED OR EXPRESSED. Manual PCIe-IDIO-24...
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Page 3: Warranty
Other than the above, no other warranty, expressed or implied, shall apply to any and all such equipment furnished or sold by ACCES. Manual PCIe-IDIO-24... -
Page 4: Table Of Contents
Table 6-4: DB78F Pin Assignments for Model PCIe-IDIO-12 ............20 Table 6-5: I/O Signal Names, Directions and Descriptions for Model PCIe-IDIO-12 ....21 Table 6-6: DB37F Pin Assignments for Model PCIe-IDIO-12 ............22 Chapter 7: Specification ........................... 23 Customer Comments ..........................24 Manual PCIe-IDIO-24... -
Page 5: Chapter 1: Introduction
Chapter 1: Introduction The PCIe-IDIO-24 provides isolated digital inputs with Change of State Detection and isolated FET high-side switches. The board has twenty four optically-isolated input circuits for AC or DC control signals and twenty four isolated FET high-side switches. -
Page 6: Interrupts
The FETs have built in current limiting and are protected against short-circuit, over-temperature, ESD and inductive load transients. The current limitation is activated until the thermal protection acts. The FETs are all off at power-on. Figure 1-1: Block Diagram Manual PCIe-IDIO-24... -
Page 7: Ordering Guide
The following components are included with your shipment. Please take time now to ensure that no items are damaged or missing. 1. Software Master CD (PDF user manual installed with product package) 2. Printed I/O Quick-Start Guide Optional Accessories STB-37/2 Kit Complete screw termination solution, consisting of: Manual PCIe-IDIO-24... - Page 8 Two (2) STB-37’s installed on a 12” SNAP-TRACK & 6’ “Y” Cable Assembly terminating in two DB37F connectors STB-37/2 Kit-CL Includes four clips for mounting the STB-37/2 Kit to a standard DIN- Rail. Manual PCIe-IDIO-24...
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Page 9: Chapter 2: Installation
Caution! ESD A single static discharge can damage your card and cause premature failure! Please follow all reasonable precautions to prevent a static discharge such as grounding yourself by touching any grounded surface prior to touching the card. Manual PCIe-IDIO-24... -
Page 10: Chapter 3: Hardware Details
Chapter 3: Hardware Details Option Selection There are no jumpers or switches to set or configure prior to installing the card into the PCIe slot of the PC. Figure 3-1: Dimensioned Drawing Manual PCIe-IDIO-24... -
Page 11: Chapter 4: Address Selection
Chapter 4: Address Selection The Vendor ID for this card is 0x494F. (ASCII for "IO") The Device ID for the PCIe-IDIO-24 is 0x0FD0. The Device ID for the PCIe-IDI-24 is 0x0BD0. The Device ID for the PCIe-IDO-24 is 0x07D0. The Device ID for the PCIe-IDIO-12 is 0x0FC0. -
Page 12: Chapter 5: Programming
Base +B COS Status TTL/CMOS 0-7 COS Clear TTL/CMOS 0-7 Base +C Control Register Control Register Base +D Reserved Reserved Base +E COS Enable COS Enable Base +F IRQ Output Pin Status Software Board Reset Table 5-1: Register Map Manual PCIe-IDIO-24... - Page 13 TTL2 TTL1 TTL0 The card initializes in the Input mode, standard TTL/CMOS levels apply. When Output mode is set (see Offset +C, Control Register), data bit values written will be reflected at the corresponding connector pin, (positive logic). Manual PCIe-IDIO-24...
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Page 14: Isolated Inputs
Bit 0 TTL7 TTL6 TTL5 TTL4 TTL3 TTL2 TTL1 TTL0 Reading from this address will return the Input values. Each bit returning a “0” Indicates the corresponding Input is Low (all Inputs are pulled up to 5V via 10kΩ). Manual PCIe-IDIO-24... - Page 15 Writing a “1” to any bit at this address will clear the change of state detection for the corresponding Input, and will also clear the card’s Interrupt Output pin*. If all 32 COS status bits have been cleared) Manual PCIe-IDIO-24...
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Page 16: Interrupts
+8, to the 32-bit COS-Clear register at offset +8. This technique will clear the COS latch only for those bits your software has successfully detected as having changed, while allowing other bits to generate COS states in the time between the Status Read, and the COS Clear. Manual PCIe-IDIO-24... -
Page 17: Chapter 6: Connector Pin Assignments
IN22 IN17 IN23 IN_COMMON1 IN_COMMON1 TTL1 TTL5 TTL3 TTL7 OUT5 OUT17 OUT3 OUT15 OUT1 OUT13 No Connection No Connection OUT11 OUT23 OUT9 OUT21 OUT7 OUT19 VBB1+ VBB3+ VBB1+ VBB3+ Table 6-1: DB78F Pin Assignments (J2) for Model PCIe-IDxx-24 Manual PCIe-IDIO-24... - Page 18 Common External Supply + connection for OUT18 thru OUT23 VBB3- Common External Supply - connection for OUT18 thru OUT23 OUT18 thru OUT23 Switched VBB3+ High Side FET Outputs Table 6-2: I/O Signal Names, Directions and Descriptions Figure 6-1: DB78M (Mating) Connector Manual PCIe-IDIO-24...
- Page 19 IN22 IN17 IN23 IN_COMMON1 IN_COMMON1 TTL1 TTL5 TTL3 TTL7 OUT5 OUT17 OUT3 OUT15 OUT1 OUT13 No Connection No Connection OUT11 OUT23 OUT9 OUT21 OUT7 OUT19 VBB1+ VBB3+ Table 6-3: DB37F x 2 Pin Assignments for model PCIe-IDxx-24 only Manual PCIe-IDIO-24...
- Page 20 No Connection OUT5 No Connection OUT3 No Connection OUT1 No Connection No Connection No Connection OUT11 No Connection OUT9 No Connection OUT7 No Connection VBB1+ No Connection VBB1+ No Connection Table 6-4: DB78F Pin Assignments for Model PCIe-IDIO-12 Manual PCIe-IDIO-24...
- Page 21 OUT0 thru OUT5 Switched VBB0+ High Side FET Outputs VBB1+ Common External Supply + connection for OUT6 thru OUT11 VBB1- Common External Supply - connection for OUT6 thru OUT11 Table 6-5: I/O Signal Names, Directions and Descriptions for Model PCIe-IDIO-12 Manual PCIe-IDIO-24...
- Page 22 SNAPTRACK. The cable is six (6) feet long. PIN NAME IN_COMMON0 IN10 TTL0 TTL2 VBB0- OUT4 OUT2 OUT0 VBB1- OUT10 OUT8 OUT6 VBB0+ IN11 IN_COMMON1 TTL1 TTL3 OUT5 OUT3 OUT1 No Connection OUT11 OUT9 OUT7 VBB1+ Table 6-6: DB37F Pin Assignments for Model PCIe-IDIO-12 Manual PCIe-IDIO-24...
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Page 23: Chapter 7: Specification
For example, when working with AC voltages do not connect the hot side of the line to an input. Tolerance of higher isolation voltage can be obtained on request by applying a conformal coating to the board. Manual PCIe-IDIO-24... -
Page 24: Customer Comments
If you experience any problems with this manual or just want to give us some feedback, please email us at: manuals@accesio.com. Please detail any errors you find and include your mailing address so that we can send you any manual updates. 10623 Roselle Street, San Diego CA 92121 Tel. (858)550-9559 FAX (858)550-7322 www.accesio.com Manual PCIe-IDIO-24...
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