Sony ZSS2IPW Service Manual page 36

ZS-S2iP
• IC PIN DESCRIPTIONS
• IC701 BU9532KS2 (RF AMP, SYSTEM SERVO PROCESSOR, DIGITAL SIGNAL PROCESSOR) (MAIN BOARD (2/4))
Pin No. Pin Name
1 AVDD1
2 AC (I)
3 BD (I)
4 VBIAS (O)
5 E (I)
6 F (I)
7 PKC (O)
8 FEN (I)
9 FEO (O)
10 BTC (O)
11 PD (I)
12 LD (O)
13 ASY (I)
14 PCO (O)
15 FCO (O)
16 AGND1
17 FDOUT (O)
18 JUMPO (O)
19 TDOUT (O)
20 SDIN (I)
21 SDOUT (O)
22 CLVOUT (O)
23 CLK88 (O)
24 LON (O)
25 CLK (O)
26 SUBSYQ (O)
27 MCK (I)
28 DIN (I)
29 DOUT (O)
30 R/W (I)
31 RESETX (I)
32 BUSY (O)
33 MONI 0
34 MONI 1
35 XPCLK
36 DVDD
37 XI (I)
38 XO (O)
39 DGND
40 AVDD2
41 LDACO (O)
42 VCDAC
43 RDACO (O)
44 AGND2
45 RFRPRFM (O)
46 TZCRFM (O)
47 SC (O)
48 TEO (O)
36
I/O
I Power supply pin (+3.3 V)
I A+C RF signal input
I B+D RF signal input
O VC voltage output
I E RF signal input
I F RF signal input
O RF signal peak detector capacitor fitted
I Focus error amp input
O Focus error output
O RF signal bottom detector capacitor fitted
I Photo detector signal input
O Laser diode drive signal outout
I Asymmentric correction input
O PLL PCO output
O PLL FCO-DAC output
— Ground pin
O Focus drive signal output
O track jump pulse drive signal input
O Tracking drive sigmal outout
I Sled drive signal input
O Sled drive signal output
O CLV drive signal output
O Not used in this set. (Open)
O Not used in this set. (Open)
O Not used in this set. (Open)
O Sub code synchronous signal output
I Command transfer clock input
I Status and SUB-Q data input
O Command data output
I Command read/write signal input
I Reset signal input
O BUSY signal output
I Test input (Not used in this set. (pull down))
I Muting signal input
O XPCLK signal output
— Power supply pin (+3.3 V)
I Main clock input (16.93 MHz)
O Main clock output (16.93 MHz)
— Ground pin
— Power supply pin (+3.3V)
O Audio L-CH output
O Audio DAC reference voltage output
O Audio R-CH output
— Ground pin
O RFRP capacitor fitted
O TZC capacitor fitted
O Scratch depth ajstment output
O Tracking error outpot
Pin Description