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CompuLab MCM-iMX93 Reference Manual

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MCM-iMX93
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Summary of Contents for CompuLab MCM-iMX93

  • Page 1 MCM-iMX93 Reference Guide...
  • Page 2 To the extent permitted by law, no liability (including liability to any person by reason of negligence) will be accepted by Compulab Ltd., its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or inaccuracies in this document.

  • Page 3: Table Of Contents

    Table of Contents Table of Contents INTRODUCTION ......................6 About This Document ....................6 MCM-iMX93 Part Number Legend ................6 Related Documents ....................6 OVERVIEW ........................7 Highlights ........................ 7 Block Diagram ......................7 Specifications ......................8 CORE SYSTEM COMPONENTS ..................10 i.MX93 System-on-Chip ..................
  • Page 4 Typical Power Consumption .................. 46 ESD Performance ....................46 MECHANICAL SPECIFICATIONS .................. 47 Mechanical Drawings..................... 47 Recommended Footprint ..................47 APPLICATION NOTES ....................48 Carrier Board Design Guidelines ................48 Carrier Board Troubleshooting ................48 Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 5 • Initial release May 2024 Please check for a newer revision of this manual at the Compulab website https://www.compulab.com. Compare the revision notes of the updated manual from the website with those of the printed or electronic version that you have.

  • Page 6: Introduction

    This document is part of a set of reference documents providing information necessary to operate and program Compulab MCM-iMX93 System-on-Module. MCM-iMX93 Part Number Legend Please refer to the Compulab website ‘Ordering information’ section to decode the MCM-iMX93 part number: https://www.compulab.com/products/computer-on-modules/mcm-imx93-nxp-i- mx-93-som-smd-system-on-module/#ordering.

  • Page 7: Overview

    LVDS, MIPI-DSI and MIPI-CSI • 2x RGMII, 2x USB, 2x CAN-FD, 8x UART • Tiny size and weight - 30 x 30 x 3 mm, 5 gram Block Diagram Figure 1 MCM-iMX93 Block Diagram Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 8: Specifications

    Up to 6x PWM signals GPIO Up to 80x GPIOs System Logic Real-time clock, powered by external battery JTAG JTAG debug interface Table 4 Electrical, Mechanical and Environmental Specifications Electrical Specifications Supply Voltage 3.45V to 5.5V Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 9 (case) Industrial: -40° to 85° C Storage -40° to 85° C temperature 10% to 90% (operation) Relative humidity 05% to 95% (storage) Shock 50G / 20 ms Vibration 20G / 0 - 600 Hz Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 10: Core System Components

    Figure 2 i.MX 93 Block Diagram Memory 3.2.1 DRAM MCM-iMX93 is equipped with up to 2GB of onboard LPDDR4 memory. The LPDDR4 channel is 16-bits wide. 3.2.2 eMMC Storage MCM-iMX93 uses on-board non-volatile memory (eMMC) storage for storing the bootloader.

  • Page 11: Peripheral Interfaces

    The following notes apply to interfaces available through the carrier-board connectors: • Some of the MCM-iMX93 carrier board interface pads are multifunctional. Up to 8 functions (ALT modes) are accessible through each multifunctional pad. For additional details, please refer to chapter 5.6.

  • Page 12: Display Interfaces

    Peripheral Interfaces Display Interfaces 4.1.1 MIPI-DSI The MCM-iMX93 MIPI-DSI interface is derived from the four-lane MIPI display interface available on the i.MX93 SoC. The following main features are supported: • Compliant with MIPI DSI specification v1.2 and MIPI D-PHY specification v1.2 •...

  • Page 13: Parallel Rgb

    Peripheral Interfaces 4.1.3 Parallel RGB MCM-iMX93 provides one parallel RGB interface derived from the i.MX93 LCDIF display module. It supports the following key features: • 24-bit interface • Resolutions of up to 1366 x 768 p60 or 1280 x 800 p60 The table below summarizes the parallel RGB interface signals.

  • Page 14: Camera Interface

    Positive part of MIPI-CSI1 data diff-pair 1 Audio Interfaces 4.3.1 S/PDIF MCM-iMX93 provides one S/PDIF transmitter with one output and one S/PDIF receiver with one input. Please refer to the i.MX93 Reference manual for additional details. The following table summarizes the S/PDIF interface signals.

  • Page 15: Sai

    Peripheral Interfaces 4.3.2 MCM-iMX93 supports up-to three synchronous audio interface (SAI) modules. The SAI module provides a synchronous audio interface (SAI) that supports full duplex serial interfaces with frame synchronization, such as I2S, AC97, TDM, and codec/DSP interfaces. The following main features are supported: •...

  • Page 16: Mqs

    NOTE: SAI3 signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. 4.3.3 MCM-iMX93 supports two MOQ interfaces that can be used to generate medium quality audio via standard GPIO. Please refer to the i.MX93 Reference manual for additional details. The following table summarizes the S/PDIF interface signals.

  • Page 17: Rgmii

    NOTE: Pads denoted with “*” act as SoC boot-straps and must not be driven during SOM power-up and reset. RGMII MCM-iMX93 features two RMGII interfaces. The tables below summarize the Ethernet RGMII interface signals. Table 14 RGMII ENET1 (QOS) Interface Signals...

  • Page 18: Usb

    NOTE: ENET2 signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. MCM-iMX93 provides two dual-role USB2.0 ports. USB port #1 can be configured as host or device, while the second port is configured permanently for host mode.

  • Page 19: Mmc / Sd /Sdio

    USB2_ID USB2 ID MMC / SD /SDIO MCM-iMX93 features two SD/SDIO ports. These ports are derived from the i.MX93 uSDHC2 and uSDHC3 controllers. uSDHC IP supports the following main features: • Fully compliant with MMC 5.1 command/response sets and physical layer •...

  • Page 20: Flexspi

    5.6 of this document. FlexSPI MCM-iMX93 provides one FlexSPI port that can support 4-bit serial flash memory or serial RAM devices. Please refer to the i.MX93 Reference manual for additional details. The following table summarizes the FlexSPI interface signals.

  • Page 21: Uart

    Peripheral Interfaces UART MCM-iMX93 features up-to eight UART ports. The i.MX93 UART supports the following features: • 7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd or none). • Programmable baud rates up to 5 Mbps.
  • Page 22 Signal Name Pin # Type Description Domain 3.3V UART5_RXD UART-5 serial data receive 1.8V 3.3V UART5_TXD UART-5 serial data transmit 1.8V 3.3V UART5_CTS UART-5 clear to send 1.8V 3.3V UART5_RTS UART-5 request to send 1.8V Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 23 UART8_TXD Serial data transmit 3.3V UART8_CTS Clear to send 3.3V UART8_RTS Request to send 3.3V NOTE: UART8 signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 24: Can-Fd

    Peripheral Interfaces CAN-FD MCM-iMX93 features up-to two CAN-FD interfaces. These interfaces support the following key features: • Full implementation of the CAN FD protocol and CAN protocol specification version 2.0B • Compliant with the ISO 11898-1 standard Please refer to the i.MX93 Reference manual for additional details.

  • Page 25: Spi

    Peripheral Interfaces 4.10 Up-to eight SPI interfaces are accessible through the MCM-iMX93 carrier board interface. The SPI interfaces are derived from i.MX93 integrated low-power SPI modules. The following key features are supported: • Full-duplex synchronous serial interface • Master/Slave configurable •...
  • Page 26 Master clock out; slave clock in 3.3V SPI7_PCS0 Chip select 0 3.3V SPI7_PCS1 Chip select 1 3.3V NOTE: SPI signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 27 NOTE: SPI signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. 4.11 MCM-iMX93 features up-to six I2C bus interfaces. The following general features are supported by all I2C bus interfaces: • Compliant with Philips I2C specification version 2.1 •...
  • Page 28 NOTE: I2C signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. 4.12 MCM-iMX93 supports one I3C bus interface. Please refer to the i.MX93 Reference manual for additional details. The tables below summarize the I3C interface signals. Table 45...

  • Page 29: Timer/Pulse Width Modulation

    Channel 0 I/O pin 3.3V TPM5_CH1 Channel 1 I/O pin 3.3V TPM5_CH2 Channel 2 I/O pin 3.3V NOTE: TPM signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 30: Adc

    TAMPER1 Tamper channel 1 4.16 JTAG MCM-iMX93 enables access to the i.MX93 JTAG port through the carrier board interface. Please refer to the i.MX93 Reference manual for additional details. The table below summarizes the JTAG interface signals. Table 52 JTAG Interface Signals...

  • Page 31: Gpio

    GPIO Up-to 80 of the i.MX93 general purpose input/output (GPIO) signals are available through the MCM-iMX93 carrier board interface. In addition, GPIO signals can produce interrupts. Please refer to the i.MX93 Reference manual for additional details. The following table summarizes the GPIO interface signals.
  • Page 32 NOTE: GPIO signals are multiplexed with other functions. For additional details please refer to chapter 5.6 of this document. NOTE: Pins denoted “3.3V/1.8V” can be configured to operate at 3.3V or 1.8V voltage levels. Voltage level is controlled by SoC pin SD2_VSELECT. Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 33: System Logic

    G24, G25, G26, G27, G28 I/O Voltage Domains MCM-iMX93 utilizes three separate I/O voltage domains that are used to power different I/O modules of the i.MX93 SoC. Some pins operate at 3.3V, some at 1.8V. Voltage domain of each signal is specified in the peripheral interface signals tables.

  • Page 34: Reset

    System Logic Reset SYS_RST_PMIC signal is the main system reset input. Driving a valid logic zero invokes a global reset that affects every module on MCM-iMX93. Please refer to the i.MX93 Reference manual for additional details. Table 56 Reset signals...

  • Page 35: Signal Multiplexing Characteristics

    Up to 84 of the MCM-iMX93 carrier board interface pads are multifunctional. Multifunctional pins enable extensive functional flexibility of the MCM-iMX93 SoM by allowing usage of a single carrier board interface pin for one of several functions. Up-to 6 functions (MUX modes) are accessible through each multifunctional carrier board interface pad. The multifunctional capabilities of MCM-iMX93 pads are derived from the i.MX93 SoC control module.
  • Page 36 I2C3_SCL ISI_D[0] LCDIF_DE SPI6_SIN UART5_RX I2C5_SCL 3.3V GPIO_IO02 GPIO2_IO[2] I2C4_SDA ISI_FRAME_VALID LCDIF_VSYNC SPI6_SOUT UART5_CTS_B I2C6_SDA 3.3V GPIO_IO03 GPIO2_IO[3] I2C4_SCL ISI_LINE_VALID LCDIF_HSYNC SPI6_SCK UART5_RTS_B I2C6_SCL 3.3V GPIO_IO04 GPIO2_IO[4] TPM3_CH0 PDM_CLK LCDIF_D[0] SPI7_PCS0 UART6_TX I2C6_SDA 3.3V Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 37 LCDIF_D[20] TPM3_CH3 SPI6_PCS1 3.3V GPIO_IO25 GPIO2_IO[25] SDIO3_DATA1 CAN2_TX LCDIF_D[21] TPM4_CH3 SPI7_PCS1 3.3V PDM_BIT_STREA GPIO_IO26 GPIO2_IO[26] SDIO3_DATA2 LCDIF_D[22] TPM5_CH3 SPI8_PCS1 SAI3_TX_SYNC 3.3V M[1] GPIO_IO27 GPIO2_IO[27] SDIO3_DATA3 CAN2_RX LCDIF_D[23] TPM6_CH3 SPI5_PCS1 3.3V GPIO_IO28 GPIO2_IO[28] I2C3_SDA 3.3V Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 38 SD3_DATA3 SDIO3_DATA3 FLEXSPI_A_DATA[3] GPIO3_IO[25] 1.8V UART1_RXD UART1_RX SPI2_SIN TPM1_CH0 GPIO1_IO[4] 3.3V GPIO1_IO[5]/ UART1_TXD UART1_TX SPI2_PCS0 TPM1_CH1 3.3V BOOT_MODE[0] UART2_RXD UART2_RX UART1_CTS_B SPI2_SOUT TPM1_CH2 SAI1_MCLK GPIO1_IO[6] 3.3V GPIO1_IO[7]/ UART2_TXD UART2_TX UART1_RTS_B SPI2_SCK TPM1_CH3 3.3V BOOT_MODE[1] Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 39: Rtc

    For more information about MCM-iMX93 RTC please refer to the AM1805 datasheet. Bootstrap Pads The following MCM-iMX93 pads act as SoC boot-straps and must not be driven during SOM power-up and reset. Table 60...

  • Page 40: Carrier Board Interface

    Carrier board Interface CARRIER BOARD INTERFACE MCM-iMX93 carrier board interface uses 140-pin QFN package. SoM pinout is detailed in the following table. Package Pinout Table 62 Package Pinout Pad # Pad Functions Pad # Pad Functions USB1_ID RESERVED SDIO2_DATA0 ENET2_1588_EVENT0_OUT...
  • Page 41 I2C3_SCL GPIO2_IO[28] DSI_D2_N I2C3_SDA GPIO2_IO[24] SDIO3_DATA0 DSI_D2_P LCDIF_D[20] TPM3_CH3 SPI6_PCS1 GPIO2_IO[17] SAI3_MCLK ISI_D[8] DSI_D1_N LCDIF_D[13] UART3_RTS_B SPI4_PCS1 UART4_RTS_B GPIO2_IO[16] SAI3_TX_BCLK PDM_BIT_STREAM[2] DSI_D1_P LCDIF_D[12] UART3_CTS_B SPI4_PCS2 UART4_CTS_B GPIO2_IO[14] UART3_TX ISI_D[6] DSI_D0_N LCDIF_D[10] SPI8_SOUT UART8_CTS_B UART4_TX Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 42 GPIO3_IO[24] SDIO3_DATA3 LVDS_TX2_P FLEXSPI_A_DATA[3] GPIO3_IO[25] SDIO3_DATA1 LVDS_TX3_N FLEXSPI_A_DATA[1] GPIO3_IO[23] SDIO3_CMD LVDS_TX3_P FLEXSPI_A_SS0_B GPIO3_IO[21] SDIO3_DATA0 PMIC_ON_REQ FLEXSPI_A_DATA[0] GPIO3_IO[22] GPIO2_IO[1] GPIO2_IO[22] I2C3_SCL SDIO3_CLK ISI_D[0] SPDIF1_IN LCDIF_DE LCDIF_D[18] SPI6_SIN TPM5_CH1 UART5_RX TPM6_EXTCLK I2C5_SCL I2C5_SDA GPIO2_IO[20] POR_B_3P3 SAI3_RX_DATA[0] Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 43 UART7_RTS_B I2C8_SCL GPIO2_IO[10] SPI3_SOUT ENET2_TD1 ISI_D[4] UART4_RTS_B LCDIF_D[6] SAI2_RX_DATA[2] TPM4_EXTCLK GPIO4_IO[18] UART7_CTS_B I2C8_SDA GPIO2_IO[5] TPM4_CH0 ENET2_TX_CTL PDM_BIT_STREAM[0] UART4_DTR_B LCDIF_D[1] SAI2_TX_SYNC SPI7_SIN GPIO4_IO[20] UART6_RX I2C6_SCL GPIO2_IO[4] TPM3_CH0 ENET2_TD2 PDM_CLK SAI2_RX_DATA[1] LCDIF_D[0] GPIO4_IO[17] SPI7_PCS0 UART6_TX I2C6_SDA Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 44 TPM1_CH1 TPM1_CH2 GPIO1_IO[5]/BOOT_MODE[0] SAI1_MCLK GPIO1_IO[6] UART1_RX SPI2_SIN VSD_3V3 TPM1_CH0 GPIO1_IO[4] SDIO2_RESET_B LPTMR2_ALT2 USB2_ID GPIO3_IO[7] SAI1_TX_DATA[0] UART2_RTS_B SPI1_SCK USB2_DP UART1_DTR_B CAN1_TX GPIO1_IO[13]/BOOT_MODE[3] SDIO2_DATA3 LPTMR2_ALT1 USB2_DN MQS2_LEFT GPIO3_IO[6] SDIO2_DATA2 ENET2_1588_EVENT1_OUT USB2_VBUS_3V3 MQS2_RIGHT GPIO3_IO[5] SDIO2_CMD USB1_DP ENET2_1588_EVENT0_IN Revised May 2024 MCM-iMX93 Reference Guide...
  • Page 45 Carrier board Interface I3C2_PUR I3C2_PUR_B GPIO3_IO[2] SDIO2_CLK ENET1_1588_EVENT0_OUT USB1_DN I3C2_SDA GPIO3_IO[1] Table 63 Ground Pads Pad # Pad Functions Pad # Pad Functions Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 46: Operational Characteristics

    VCC_RTC (3.0V) is supplied from external coin-cell battery RTC only 70nA V_SOM is not present ESD Performance Table 68 ESD Performance Interface ESD Performance i.MX93 pins 2kV Human Body Model (HBM), 500V Charge Device Model (CDM) Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 47: Mechanical Specifications

    MCM-iMX93 footprint NOTE: solder paste must not be applied to center ground pads G25, G26, G27, G28. These pads should remain unsoldered. MCM-iMX8M-Mini footprint in DXF and HKP formats is available at https://www.compulab.com/products/computer-on-modules/mcm-imx93-nxp-i-mx-93-som- smd-system-on-module/#devres Revised May 2024 MCM-iMX93 Reference Guide...

  • Page 48: Application Notes

    Ethernet, MIPI-CSI and MIPI-DSI signals require 100 ohm differential impedance. • Refer to the SB-MCMIMX93 carrier board reference design schematics. • It is recommended to send the schematics of the custom carrier board to Compulab support team for review. Carrier Board Troubleshooting •...
  • Page 49 Check possible signal short circuits due to errors in carrier board PCB design or assembly. • It is recommended to assemble more than one carrier board for prototyping, in order to ease resolution of problems related to specific board assembly. Revised May 2024 MCM-iMX93 Reference Guide...

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