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Glitch Works 8085 SBC rev 4 Mini User Manual

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Glitch Works 8085 SBC rev 4 Mini
GW-8085SBC-4M
User's Manual and Assembly Guide
Revision 1, 2024-05-06
c 2018, 2024 Glitch Works, LLC
http://www.glitchwrks.com/
This manual is licensed under a
Creative Commons "Attribution-NonCommercial-ShareAlike 4.0" license.

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  • Page 1 Glitch Works 8085 SBC rev 4 Mini GW-8085SBC-4M User’s Manual and Assembly Guide Revision 1, 2024-05-06 c 2018, 2024 Glitch Works, LLC http://www.glitchwrks.com/ This manual is licensed under a Creative Commons “Attribution-NonCommercial-ShareAlike 4.0” license.

  • Page 2: Table Of Contents

    Contents 1 Introduction 1.1 GWMON-80 ROM Monitor ....... . 1.2 CP/M 2.2 Features ........2 Configuration 2.1 Flash Options .

  • Page 3: Introduction

    Introduction The Glitch Works 8085 SBC rev 4 Mini (GW-8085SBC-4M) is a single-board computer based on the Intel 8085 CPU. It includes the following features: Intel 8085 CPU at 3.072 MHz 64 KB static RAM, FeRAM compatible Up to 512 KB Flash memory in 4K pages, in-board programmable...

  • Page 4: Configuration

    The five hardware interrupt lines of the Intel 8085 are pulled down to an inactive state with resistor pack RP1. While they are not used by the default Glitch Works software package, they are available for use. Additionally, the *BINT line from the Glitchbus expansion header is inverted and brought to TP1, INTERRUPT.

  • Page 5: Assembly

    Assembling the 8085 SBC rev 4M If you purchased a full Glitch Works parts kit, we recommend completing all assembly sections, since extra features can be disabled as needed. If supplying your own parts, you may choose which sections to complete based on the functionality required.

  • Page 6: Assembly Checklist

    Insert 22V10 GAL (85R4M on label) into socket at U10 Right Angle or Stacking Configuration The 8085 SBC rev 4 Mini can be expanded using stacking Glitchbus modules, or a Glitchbus back- plane. The intended configuration will determine which connector should be used.

  • Page 7: Connect Serial Mezzanine

    The 8085 SBC rev 4M uses a serial mezzanine to convert TTL TX and RX signals into the desired interface. It is compatible with Glitch Works mezzanines, as well as “FTDI cable” USB adapters. If using a USB adapter, be sure that its pinout matches the signals on the A1 connector before use.

  • Page 8: Initial Checkout And Testing

    If you purchased an assembled 8085 SBC rev 4M from Glitch Works, LLC, your board is warranted to work on arrival. If you have assembled a kit that fails to work, you may return it to Glitch Works, LLC for evaluation, repair, and testing. For questions concerning returns or configuration, please visit http://www.glitchwrks.com/ and click the “Contact”...

  • Page 9: Technical Notes

    Technical Notes ROM Segment Latch The 8085 SBC rev 4M includes a ROM segment latch, which is implemented as an 8-bit latch with readback at I/O address 0xFF. This latch controls which 4K segment of the Flash chip is active, and whether the Flash chip is enabled or disabled.

  • Page 10: Default I/O Map

    Default I/O Map I/O Address R/W Function R/W ROM Segment Latch 0xFF Note that the ROM segment latch is implemented with readback. The hardware assist bit-bang serial console occupies no I/O space.

  • Page 11: Parts List

    2.2 kΩ to 10 kΩ, even though they are indicated as 4.7 kΩ on the assembly drawing Resistors may be of varying precision and body type If you purchased a full Glitch Works parts kit, be sure it includes the following: 11x axial bead ceramic capacitor...

  • Page 15: Gal Equations

    GAL22V10 ; 8085 SBC rev 4 Decode Logic 8085SBC4 ; PRODUCTION 1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;Pin Declarations ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; BMASK BA10 BA11 BA12 BA13 BA14 BA15 BINT INTRPT BSTART BOOT BIOM RAMHICS RAMLOCS EXTBUS ROMCS ROMENA RSLATCS ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;Equations ;Low RAM 0x0000 - 0x7FFF when BOOT is low, disabled when ;BOOT is high ;High RAM controlled as follows: * 0x8000 - 0xBFFF when BOOT is high...
  • Page 16 BA15 * /BIOM * ROMCS * /BOOT * BMASK + BA15 * /BA14 * /BIOM * BOOT /EXTBUS RSLATCS * ROMCS * RAMHICS * RAMLOCS ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;Notes ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; DESCRIPTION This PALASM file describes the logic used on the Glitch Works 8085 SBC rev 4 Mini.

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