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1. JY-7131 Specifications

1.1 Overview

1.2 Main Features

DI:
32 channels DI, 0~55 VDC
Support Sourcing and Sinking input
mode
DO:
32 channels DO,10~50 VDC, 200
kHz
Suport Sourcing, Sinking and Push-
pull tri-state output mode
V1.0.0
JY-7131 series modules are multi-function isolated digital I/O module,
which can provide 64 channels of DIO (32 Sinking/Sourcing Inputs, 32
Sinking/Sourcing/Push-pull Outputs, Bank-Isolated) or 8 channels of
counter, supporting counting, frequency measurement, encoder,
pulse output and other functions.
JY-7131 series, are ideal for motor, valve control and
automation control.
 Please download the <JYPEDIA>, you can quickly inquire the
product prices, the key features and available accessories.
Industrial DIO modules, like the
Counter:
High operating voltage counter up
to 50V
Up to 100 MHz internal clock rate
Counter Functions:
Edge counting / Frequency
measurement /Period
measurement / Two-Edge
separation/Quadrature/(x1/x2/x4)
encoder/Two-Pulse encoder
Dynamic reconfigurable counter
output
Complies with IEC 61131-2 standard
JY-7131 | jytek.com | 1

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Summary of Contents for JYTEK JY-7131 Series

  • Page 1: Jy-7131 Specifications

    1. JY-7131 Specifications 1.1 Overview JY-7131 series modules are multi-function isolated digital I/O module, which can provide 64 channels of DIO (32 Sinking/Sourcing Inputs, 32 Sinking/Sourcing/Push-pull Outputs, Bank-Isolated) or 8 channels of counter, supporting counting, frequency measurement, encoder, Industrial DIO modules, like the pulse output and other functions.
  • Page 2: Hardware Specifications

    ⚫ DO Output Mode DO Output Mode DO Value Output Status High Level (VDD) Sourcing High Z Low Level (GND) Sinking High Z High Level (VDD) Push-Pull Low Level (GND) Table 4 DO Output Mode V1.0.0 JY-7131 | jytek.com | 2...
  • Page 3: Counter Specifications

    Table 6 External Digital Trigger 1.3.5 Bus Interface x4 PXI Express peripheral module PXIe standard Specification V1.0 compliant Bus interface x1 and x4 PXI Express or PXI Slot supported Express hybrid slots Table 7 Bus Interface V1.0.0 JY-7131 | jytek.com | 3...
  • Page 4: Physical Size

    1.3.6 Physical Size Table 8 Physical Size 1.3.7 Operating Environment Table 9 Operating Environment 1.3.8 Storage Environment Table 10 Storage Environment V1.0.0 JY-7131 | jytek.com | 4...
  • Page 5: Table Of Contents

    5.1 System Requirements ........................16 5.2 System Software ..........................16 5.3 C# Programming Language ....................... 16 5.4 JY-7131 Series Hardware Driver ....................... 16 5.5 Install the SeeSharpTools from JYTEK ....................17 5.6 Running C# Programs in Linux ......................17 6.Operating JY-7131 ......................... 18 6.1 Quick Start ............................
  • Page 6 8.4 JYTEK Warranty and Support Services ....................43 9.Statement ............................. 45 Figure 1 JYPEDIA Information ......................9 Figure 2 JY-7131 Series System Block Diagram................11 Figure 3 Front Pannel ........................12 Figure 4 Input Signal Connection Example(Sinking Input) ............18 Figure 5 Input Signal Connection Example(Sourcing Input)...
  • Page 7 Table 2 Input Current ........................2 Table 3 Isolated Digital Output ......................2 Table 4 DO Output Mode ......................... 2 Table 5 Counter Specifications ......................3 Table 6 External Digital Trigger ......................3 Table 7 Bus Interface ........................3 V1.0.0 JY-7131 | jytek.com | 7...
  • Page 8 Table 13 Counter Input/Output Default Routing 2 ................. 14 Table 14 Supported Linux Versions ....................16 Table 15 SSI Connector Pin Assignment for PCIe-7131 ..............40 Table 16 Relationship between switch position and slot number ..........41 V1.0.0 JY-7131 | jytek.com | 8...
  • Page 9: Introduction

    We provide many sample programs for this device. Please download and install the sample programs for this device. You can download JYPEDIA excel file from our web www.jytek.com. Open JYPEDIA and search for JY7131 in the JY7131.Examples.zip driver sheet, select .
  • Page 10 Tip: JY-7131 also has the counter output capability. If you do not have a signal source, you can use the outputs of JY-7131 as the signal source. In this case you need first run example program Counter Output--> Winform CO Continuous Wrapping to generate the output. V1.0.0 JY-7131 | jytek.com | 10...
  • Page 11: Hardware Specifications

    3. Hardware Specifications 3.1 System Diagram The system block diagram of JY-7131 series is shown in Figure 2. 3.3V DI_n.m DI_COMn x8 Isolated Digital Input Per Ports x4 Bank Isolated Digital Input Ports DO_VDDn DO_n.m VccA VccB DO_GNDn x8 Isolated Digital Output Per Ports...
  • Page 12: Front Panel And Pin Definition

    3.2 Front Panel and Pin Definition Figure 3 Front Pannel V1.0.0 JY-7131 | jytek.com | 12...
  • Page 13 DO_GND3 DI_COM3 DO_GND3 Legend: “n” stands for port number, "m" stands for line number DI_COMn:Common terminal for input port n DO_VDDn: Power line for port n DO_GNDn:Ground for port n Table 11 Pin Defination V1.0.0 JY-7131 | jytek.com | 13...
  • Page 14: Default Routing For Counter Input/Output Signals

    PFI_In_18 (15) PFI_In_22 (19) PFI_In_26 (65) PFI_In_30 (69) SampleClock Terminal PFI_In_19 (16) PFI_In_23 (20) PFI_In_27 (66) PFI_In_31 (70) Table 13 Counter Input/Output Default Routing 2 Culumn "Ctr4" to "Ctr7": Pin Number is shown in (*). V1.0.0 JY-7131 | jytek.com | 14...
  • Page 15: Order Information

    64-Channel, 50 VDC, 32 Sink/Source Inputs, 32 Push-pull Outputs, Bank-Isolated PXIe Digital I/O Module ⚫ Accessories: Cable: ACL-1020100-1 1M 100pin SCSI twisted pair cable (PN: JY4910923-01) ACL-1020100-2 2M 100pin SCSI twisted pair cable (PN: JY7155665-01) Terminal Block: DIN-100-1 100-Pin SCSI Terminal block (PN: JY7739162-01) V1.0.0 JY-7131 | jytek.com | 15...
  • Page 16: Software

    Microsoft Windows: Windows 7 32/64 bit, Windows 10 32/64 bit. Linux Kernel Versions: There are many Linux versions. It is not possible JYTEK can support and test our devices under all different Linux versions. JYTEK will at the best support the following Linux versions.
  • Page 17: Install The Seesharptools From Jytek

    C# interfaces for users to operate various JY-7131 function. JYTEK has standardized the ways which JYTEK and other vendor’s DAQ boards are used by providing a consistent user interface, using the methods, properties and enumerations in the object-oriented programming environment.
  • Page 18: Operating Jy-7131

    This chapter provides the operation guides for JY-7131, including Timer and programmable I/O interface, etc. JYTEK provides extensive examples, on-line help and documentation to assist you to use the JY- 7131 module. JYTEK strongly recommends you go through these examples before writing your own application.
  • Page 19: Digital Output Connection Guide

    DC voltages between 8.5 V and 10 V are invalid and represent an unreliable value. 6.2.2 Digital Output Connection Guide The JY-7131 device also supports 32 channels of isolated digital output. There are three configurations for digital output: Sourcing, Sinking and Push-pull output mode. V1.0.0 JY-7131 | jytek.com | 19...
  • Page 20 ◼ Writing a 0 (logic low) to an output line switches off one channel of the module and prohibits current from passing through the output line. V1.0.0 JY-7131 | jytek.com | 20...
  • Page 21 Power Source: Connect a positive of power source (DC) to the DO_VDDn terminal. Ground Connection: Connect the negative of the power source (DC) to the ground terminal (DO_GNDn) of the module. V1.0.0 JY-7131 | jytek.com | 21...
  • Page 22 Please ensure all connections are secure and that the module's power is off before making or changing connections to prevent damage. After setup, double-check all connections before turning of the module to ensure they match the configuration described in this guide. V1.0.0 JY-7131 | jytek.com | 22...
  • Page 23: Counter Measurement Operations

    The counting value is written to the register on each rising edge or falling edge of the measured signal as shown in Figure 12. Start Signal to Measure (Source) Register Figure 12 Simple Edge Counting in Single Mode V1.0.0 JY-7131 | jytek.com | 23...
  • Page 24 Figure 14. Default, the Pause Trigger signal must be connected to Counter Gate terminal. Figure 14 Pause Trigger To cofigure the pause trigger, use the properties as below: JY7131CITask.EdgeCounting.Pause.ActivePolarity – To set active level (high or low) to pause counting. V1.0.0 JY-7131 | jytek.com | 24...
  • Page 25: Frequency Measurement

    Counter Gate terminal. Set JY7131CITask.Type to CIType.Frequency to use this function. Timing Single Mode Frequency Measurement without sample clock is actually using Pulse Width Measuement internally, refer to chapter for more information. V1.0.0 JY-7131 | jytek.com | 25...
  • Page 26 Every time the user reads the data, driver will automatically calculate the frequency (�� �� ) values according to the fomular and return the according to the HighTick (�� ) and LowTick (�� ℎ �� result to the user. V1.0.0 JY-7131 | jytek.com | 26...
  • Page 27: Period Measurement

    The number of rising edges of timebase between previous rising edge of the second signal and current rising edge of the first signal is written to the resgiter on each rising edge of the first signal. As shown in Figure 17. V1.0.0 JY-7131 | jytek.com | 27...
  • Page 28 In implicit mode, the signal active edge as the implicit sample clock edge. The counting values of rising edges of timebase between first signal and second signal are stored into buffer on each rising edge of the first signal, as shown in Figure 19. V1.0.0 JY-7131 | jytek.com | 28...
  • Page 29: Quadrature Encoder

    Counter A terminal, the B signal mest be connected to Counter B terminal and the Z signal mest be connected to Counter Z terminal. For terminal Z, you can connect Z signal to it, or you can disable Z with property "ZReloadEnabled". Encoding Type x1 Encoding V1.0.0 JY-7131 | jytek.com | 29...
  • Page 30 A signal and B signal. As shown in Figure 22. Start Register Figure 22 Quadrature Encoder x4 mode Channel Z Behavior The reload phase is when Z signal is high and A signal and B signal are low. V1.0.0 JY-7131 | jytek.com | 30...
  • Page 31: Two-Pulse Encoder

    To change the terminal of signals instead of using its default value as shown in chapter 3.2, use following properties: JY7131CITask.QuadEncoder.AInputTerminal – Signal A input terminal. JY7131CITask.QuadEncoder.ZInputTerminal – Signal Z input terminal. JY7131CITask.QuadEncoder.BInputTerminal – Signal B input terminal. 6.3.6 Two-Pulse Encoder V1.0.0 JY-7131 | jytek.com | 31...
  • Page 32 Register Sample Clock Buffer Figure 25 Two-Pulse Encoder with Explicit Sample Clock To configure the counter to work in this mode, set JY7131CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY7131CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External. V1.0.0 JY-7131 | jytek.com | 32...
  • Page 33: Counter Generation Operations

    If the number of pulses is set to -1, the pulses will be output continuously until requesting to stop. In this case, it is allowed to change the frequency and duty cycle on the fly. The timing diagram is shown as Figure 27. V1.0.0 JY-7131 | jytek.com | 33...
  • Page 34 High ticks, Low ticks and Number of pulses Timebase By default, the counter uses the onboard 200MHz timebase to generate pulses. Use the property JY7131COTask.Timebase to configure the timebase. Please refer to chapter 6.5.3 for more information about timebase. V1.0.0 JY-7131 | jytek.com | 34...
  • Page 35: Clocks

    PLL (Phase Locked Loop) is a phase-locked clock generator that can generate a clock signal of a specified frequency according to the selected reference clock source. JY-7131 Series boards support the following reference clock source: 1) Onboard 10MHz Clock Using the on-board 10MHz (TXCO) as the PLL input source can help improve the PLL output clock performance, including improving clock accuracy, temperature stability, and phase noise.
  • Page 36: Sample Clock

    JY7131 provides four options for timebase source as follows: Internal 200MHz: - Same signal as the 100 MHz base clock generated by PLL. Internal 5MHz – Generated by dividing down the 100 MHz timebase. V1.0.0 JY-7131 | jytek.com | 36...
  • Page 37 Internal 100kHz – Generated by dividing down the 100 MHz timebase. External - Use a signal on a terminal as the timebase V1.0.0 JY-7131 | jytek.com | 37...
  • Page 38: Start Trigger

    Figure 30. Figure 30 Rising Edge Digital Trigger 6.7 Multi-Card Synchronization JY-7131 Series modules support master-slave synchronization mechanism to achieve multi-card synchronous acquisition. Master-Slave Synchronization It will use 3 signals, Reference clock, Sync Pulse and Triger to achieve data acqusistion simultaneously with multiple modules.
  • Page 39: System Synchronization Interface (Ssi)For Pcie Modules

    (SSI). SSI is designed as a bidirectional bus and it can synchronize up to four PCIe modules. One PCIe module is designated as the master module and the other PCIe modules are designated as the slave modules. V1.0.0 JY-7131 | jytek.com | 39...
  • Page 40: Dip Switch In Pcie-7131

    For example, if you want to set the card number to 3, you could turn the position 2 and 1 of the DIP switch to the ON position and the orthers to OFF. Find the detail below. Figure 33 DIP Switch in PCIe-7131 V1.0.0 JY-7131 | jytek.com | 40...
  • Page 41 Table 16 Relationship between switch position and slot number V1.0.0 JY-7131 | jytek.com | 41...
  • Page 42: Using Jy-7131 In Other Software

    JY-7131 DAQ card using one of this software. 7.1 C++ JYTEK internaly uses our C++drivers to design the C# drivers. We recommend our customers to use C# drivers because C# platform deliver much better efficiency and performance in most situations.
  • Page 43: About Jytek

    8. About JYTEK 8.1 JYTEK China Founded in June, 2016, JYTEK China is a leading Chinese test & measurement company, providing complete software and hardware products for the test and measurement industry. The company is a joint venture between Adlink Technologies and a group of experienced professionals form the industry.
  • Page 44 1-year warranty. For technical consultation, pre-sale and after-sales support, please contact JYTEK of your country. V1.0.0 JY-7131 | jytek.com | 44...
  • Page 45: Statement

    9. Statement The hardware and software products described in this manual are provided by JYTEK China, or JYTEK in short. This manual provides the product review, quick start, some driver interface explaination for JYTEK JY-7131 Series family of multi-function data acquisition boards. The manual is copyrighted by JYTEK.

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