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Summary of Contents for Nuvoton ChipCorder ISD4003 Series
- Page 1 ISD4003 SERIES ISD4003 SERIES SINGLE-CHIP, MULTIPLE-MESSAGES VOICE RECORD/PLAYBACK DEVICES 4-, 5-, 6-, AND 8-MINUTE DURATION Publication Release Date: March 3, 2017 - 1 - Revision 1.32...
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Page 2: Table Of Contents
ISD4003 SERIES 1. GENERAL DESCRIPTION ....................... 3 2. FEATURES ............................4 3. BLOCK DIAGRAM ..........................5 4. PIN CONFIGURATION ........................6 5. PIN DESCRIPTION ........................... 7 6. FUNCTIONAL DESCRIPTION ....................... 12 6.1. Detailed Description ........................ 12 6.2. Serial Peripheral Interface (SPI) Description ................13 6.2.1 OPCODES ........................ -
Page 3: General Description
Recordings are stored into the on-chip Flash memory cells, providing zero-power message storage. This unique single-chip solution utilizes Nuvoton’s patented multilevel storage technology. Voice and audio signals are directly stored onto memory array in their natural form, providing high-quality voice reproduction. -
Page 4: Features
ISD4003 SERIES 2. FEATURES Single-chip voice record/playback solution Single 3 volt supply Low-power consumption Operating current: = 15 mA (typical) CC_Play = 25 mA (typical) CC_Rec Standby current: = 1 µA (typical) CC_Standby Duration: 4, 5, 6, and 8 minutes ... -
Page 5: Block Diagram
ISD4003 SERIES 3. BLOCK DIAGRAM Internal Clock Timing XCLK Sampling Clock ANA IN- 5-Pole Active Analog Transceivers Antialiasing Filter ANA IN+ 1920K Cell Nonvolatile 5-Pole Active Multilevel Storage Smoothing Filter Array AutoMute Feature AUDOUT Power Conditioning Device Control SCLK MOSI MISO AM CAP Publication Release Date: March 3, 2017 - 5 -... -
Page 6: Pin Configuration
ISD4003 SERIES 4. PIN CONFIGURATION SCLK MOSI MISO XCLK ISD4003 ANA IN+ AUD OUT ANA IN- AM CAP SOIC / PDIP Publication Release Date: March 3, 2017 - 6 - Revision 1.32... -
Page 7: Pin Description
ISD4003 SERIES 5. PIN DESCRIPTION PIN NAME FUNCTION SOIC / PDIP Slave Select: This input, when LOW, will select the ISD4003 device. MOSI Master Out Slave IN: This is the serial input to the ISD4003 device when it is configured as slave. The master microcontroller places data on the MOSI line one half-cycle before the rising edge of SCLK for clocking into the device. - Page 8 ISD4003 SERIES PIN NAME FUNCTION SOIC / PDIP AutoMute™ Feature: The AutoMute feature only applies AM CAP for playback operation and helps to minimize noise (with 6 dB of attenuation) when there is no signal (i.e. during periods of silence). A 1 µF capacitor to ground is recommended to connect to the AM CAP pin.
- Page 9 ISD4003 SERIES PIN NAME FUNCTION SOIC / PDIP 18 / 27 Supply Voltage: To minimize noises, the analog and digital circuits in the ISD4003 devices use separate power busses. These +3V busses are brought out to separate pins and should be tied together as close to the supply as possible. In addition, these supplies should be decoupled as close to the package as possible.
- Page 10 ISD4003 SERIES PIN NAME FUNCTION SOIC / PDIP XCLK External Clock Input: The ISD4003 series is configured at the factory with an internal sampling clock frequency centered to 1 percent of specification. The frequency is then maintained to a variation of 2.25 percent over the entire commercial temperature and operating voltage ranges.
- Page 11 ISD4003 SERIES Internal to the device 53K 3K ANA IN+ Signal 32m Vp-p To Filter 3K ANA IN- 53K 1.2V Single-Ended Input Mode Internal to the device 53K 3K ANA IN+ Input Signal 16m Vp-p To Filter...
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Page 12: Functional Description
ESCRIPTION Audio Quality ® The Nuvoton’s ISD4003 ChipCorder series is offered at 8.0, 6.4, 5.3 and 4.0 kHz sampling frequencies, allowing the user a choice of speech quality options. Increasing the sampling frequency will produce better sound quality, but affects duration. Please refer to Table 1: Product Summary for details. -
Page 13: Serial Peripheral Interface (Spi) Description
ISD4003 SERIES Microcontroller Interface A four-wire (SCLK, MOSI, MISO & SS ) SPI interface is provided for controlling and addressing functions. The ISD4003 is configured to operate as a peripheral slave device, with a microcontroller- based SPI bus interface. Read and write operations are controlled through this SPI interface. An interrupt signal ( INT ) and internal read only Status Register are provided for handshake purposes. -
Page 14: Opcodes
ISD4003 SERIES 6.2.1 OPCODES The available Opcodes are summarized as follows: TABLE 2: OPCODE SUMMARY Instructions OpCodes Descriptions Address (11 bits) Control bits (5 bits) <A0 – A10> C0 C1 C2 C3 C4 POWERUP <XXXXXXXXXXX> 0 0 1 0 0 Power-Up: Device will be ready for an operation after <A0 –... -
Page 15: Spi Diagrams
ISD4003 SERIES 6.2.2 SPI Diagrams MOSI Input Shift Register (Loaded to Row Counter A0-A10 only if IAB = 0) Select Logic Row Counter P0-P10 OVF EOM MISO Output Shift Register FIGURE 3: SPI INTERFACE SIMPLIFIED BLOCK DIAGRAM The following diagram describes the SPI port and the control bits associated with it. MISO OVF EOM MOSI... -
Page 16: Spi Control And Output Registers
ISD4003 SERIES 6.2.3 SPI Control and Output Registers The SPI control register provides control of individual function such as play, record, message cueing, power-up, power-down, start, stop and ignore address pointer operations. TABLE 3: SPI CONTROL REGISTERS Control Bit Control Register Device Function Message Cueing function Enable Message Cueing... - Page 17 ISD4003 SERIES Message Cueing Message cueing (MC) allows the user to skip through messages, without knowing the actual physical location of the messages. It will stop when an EOM marker is reached. Then, the internal address counter will point to the next message. Also, it will enter into OVF condition when it reaches the end of memory.
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Page 18: Timing Diagrams
ISD4003 SERIES 7. TIMING DIAGRAMS SSmin SCKhi SCLK SCKlow MOSI (TRISTATE) MISO FIGURE 5: TIMING DIAGRAM SCLK MOSI MISO FIGURE 6: 8-BIT COMMAND FORMAT Publication Release Date: March 3, 2017 - 18 - Revision 1.32... - Page 19 ISD4003 SERIES SCLK MOSI A10 C0 MISO FIGURE 7: 16-BIT COMMAND FORMAT SCLK MOSI Stop Play/Record MISO Data Data STOP/PAUSE (Rec) ANA IN STOP/PAUSE (Play) ANA OUT FIGURE 8: PLAYBACK/RECORD AND STOP CYCLE Publication Release Date: March 3, 2017 - 19 - Revision 1.32...
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Page 20: Absolute Maximum Ratings
ISD4003 SERIES 8. ABSOLUTE MAXIMUM RATINGS TABLE 5: ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS) CONDITIONS VALUES Junction temperature 150°C Storage temperature range -65°C to +150°C –0.3V) to (V Voltage applied to any pin +0.3V) Voltage applied to any pin (Input current limited to 20mA) –1.0V) to (V +1.0V) –1.0V) to 5.5V... -
Page 21: Operating Conditions
ISD4003 SERIES 8.1. O PERATING ONDITIONS TABLE 7: OPERATING CONDITIONS (PACKAGED PARTS) CONDITIONS VALUES Commercial operating temperature range (Case temperature) 0°C to +70°C Industrial operating temperature (Case temperature) -40°C to +85°C Supply voltage (V +2.7V to +3.3V Ground voltage (V TABLE 8: OPERATING CONDITIONS (DIE) CONDITIONS VALUES... -
Page 22: Electrical Characteristics
OUT Gain Notes: Typical values @ T = 25°C and V = 3.0V. All Min/Max limits are guaranteed by Nuvoton via electronical testing or characterization. Not all specifications are 100 percent tested. and V connected together. SS = V , XCLK = MOSI = V and all other pins floating. - Page 23 ISD4003 SERIES TABLE 10: AC PARAMETERS (Packaged Parts) CHARACTERISTIC SYMBOLS UNITS CONDITIONS Sampling Frequency ISD4003-04M ISD4003-05M ISD4003-06M ISD4003-08M Filter Pass Band [3][7] ISD4003-04M 3 dB Roll-Off Point [3][7] ISD4003-05M 3 dB Roll-Off Point [3][7] ISD4003-06M 3 dB Roll-Off Point [3][7] ISD4003-08M 3 dB Roll-Off Point Record Duration...
- Page 24 = 25°C, V = 3.0V and timing measurement at 50%. All Min/Max limits are guaranteed by Nuvoton via electrical testing or characterization. Not all specifications are 100 percent tested. Low-frequency cutoff depends upon the value of external capacitors (see Pin Descriptions) Single-ended input mode.
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Page 25: Parameters For Die
= 3.0V. Sampling Frequency can vary as much as 2.25 percent Typical values @ T = 25°C and V over the commercial temperature and voltage ranges All Min/Max limits are guaranteed by Nuvoton via electrical testing or characterization. Not all specifications are 100 percent tested. and V connected together. -
Page 26: Spi Ac Parameters
ISD4003 SERIES 9.3. SPI AC P ARAMETERS TABLE 12: AC PARAMETERS PARAMETER SYMBOL UNITS CONDITIONS nsec SS Setup Time nsec SS Hold Time Data in Setup Time nsec Data in Hold Time nsec Output Delay nsec Output Delay to HighZ nsec µsec SSmin... -
Page 27: Typical Application Circuit
ISD4003 SERIES 10. TYPICAL APPLICATION CIRCUIT These application examples are for illustration purposes only. Nuvoton makes no representation or warranty that such application will be suitable for production. Make sure all bypass capacitors are as close as possible to the package. - Page 28 ISD4003 SERIES MISO C2 0.22 F MOSI SCLK 47 F RESET C3 0.22 F 0.1 F ANA IN- AUD OUT COP 820C ISD4003 LINE OUT 0.1 F ANA IN+ R3 100 3.3 K AM CAP 100K POT ...
- Page 29 ISD4003 SERIES MISO C2 0.22 F MOSI SCLK 47 F RESET C3 0.22 F 0.1 F ANA IN- AUD OUT COP 820C ISD4003 LINE OUT 0.1 F ANA IN+ R3 100 3.3 K AM CAP 100K POT ...
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Page 30: Packaging And Die Information
ISD4003 SERIES 11. PACKAGING AND DIE INFORMATION 11.1. 28-L 300-M IC (SOIC) LASTIC MALL UTLINE 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 3 4 5 6 7 8 9 10 11 12 13 14 INCHES MILLIMETERS 0.701... -
Page 31: 28-Lead 600-Mil Plastic Dual Inline Package (Pdip)
ISD4003 SERIES 11.2. 28-L 600-M (PDIP) LASTIC NLINE ACKAGE INCHES MILLIMETERS 1.445 1.450 1.455 36.70 36.83 36.96 0.150 3.81 0.065 0.070 0.075 1.65 1.78 1.91 0.600 0.625 15.24 15.88 0.530 0.540 0.550 13.46 13.72 13.97 0.19 4.83 0.015 0.38 0.125 0.135 3.18 3.43... -
Page 32: Die Information
. It MUST NOT be connected to any other potential or damage may occur. Die thickness is subject to change, please contact Nuvoton as this thickness may change in the future. Double bond is recommended if treated as one pad. - Page 33 ISD4003 SERIES ISD4003 S ERIES OORDINATIONS (with respect to die center) Pad Description X Axis (µm) Y Axis (µm) Analog Ground 1885.2 3273.7 Row Address Clock 1483.8 3273.7 Interrupt 794.8 3273.7 XCLK External Clock Input 564.8 3273.7 Digital Power Supply 384.9 3273.7 Digital Power Supply...
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Page 34: Ordering Information
I4308PY SOIC ISD4003-04MSY I4304SY ISD4003-05MSY I4305SY ISD4003-06MS I4306SY ISD4003-08MSY I4308SY ISD4003-04MSYI I4304SYI ISD4003-05MSYI I4305SYI ISD4003-06MSI I4306SYI ISD4003-08MSYI I4308SYI For the latest product information, access Nuvoton worldwide website at http://www.Nuvoton-usa.com Publication Release Date: March 3, 2017 - 34 - Revision 1.32... -
Page 35: Version History
ISD4003 SERIES 13. VERSION HISTORY VERSION DATE DESCRIPTION June 2000 Initial version Jan. 2004 Reformat the document. Add note for typical filter pass band. Add memory architecture description. Remove all CSP info. Revise RAC timing parameter for MC. Revise AutoMute: playback only. Revise SPI, opcodes sections, record &... - Page 36 Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper use or sales.
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