Controller; Introduction; Dual Processor Logic; Drive Command Logic - Data General 6045 Series Technical Manual

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Dat1 Gt"ner•I Cor~1tion <OGC.>. h.u. prepared. this man.ual for use by OGC personnel and customers as a guide to the proper installation, operation, ind maintenance of DGC equipment ind
software. The draiwtngs and spec1fm1t1ons contai1ned herein
~ne
the property of OGC aind shall neither be reproduced in whole or in p.ut without DGC's prior written aipproval nor be implied to grant
any license to maike, use, or sell equipment manufaictured in aiccordaince herewith.
CHAPTERV
CONTROLLER
INTRODUCTION
The controller directs the activities of the cartridge
disc subsystem. It decodes instructions received from
the processor, selects a drive, issues seek or recalibrate
commands and supports data transfers.
The controller can be divided into four logical blocks;
• The Dual ProceBBOr logic requeBtB the buB arbiter
to open the channel between the controller and
the driveB when the proceBsor initiateB a
command or data transfer.
• The Drive Command logic BendB Beek and
recalibrate commands to selected driveB.
• The Read/Write Control logic setB up and timeB
data tranBfers on selected driveB.
• The Data TranBfer logic bufferB data wordB and
BupportB data converBion.
Dual Processor Logic
A bus arbiter, located in the Interface, controls access
to a common set of drives in a dual processor system.
The controllers compete for access on a first come,
first serve basis. The winner retains control until it
completes a data transfer or is released by a three
second timer. When the processor issues a start
(S)
or
pulse
<Pl
to initiate a transfer, the controller requests
the. bus arbiter to open the channel. When the arbiter
indicates that the channel is available, the controller
connects to the bus. The controller releases the bus
when it terminates a data transfer, but it remains
connected until the arbiter opens .the channel to the
other controller.
<In
single processor subsystems, the
controller is permanently connected to the bus.)
Drive Command Logic
The controller transfers position commands as soon as
the channel opens. It sends a
track address strobe
to clock
the command into the selected drive, and specifies a
seek or recalibrate operation. The nine bit track
address register indicates the destination track for a
seek operation.
r-------------
DUAL PROCESSOR L O G I C - - - - - - - - - - - -
START
IOPULSE
1/0
BUS
IOPULSE
START
s
CPU REQUEST
CPU SELECT
SELECT
START DELAY
START DRIVE
START SEEK
READ/WRITE
RD/WR DONE
DG-04046
TI
R
CPU REQUEST
CPU SELECT
c
Q
'-----ID
Q
SELECT
CONTROLLER
TO OTHER CONTROLLER
FINISH
DRIVE SELECT
INTERFACE
DRIVE
SELECT
SWITCH
ENB
SELECT
DRIVE
BUS
V-1 of8
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