Wang 2110A Maintenance Manual page 102

FUNCTIONAL DESCRIPTION
1
Q .
2
Block Diagram Description
(Sheet 8 of 11)
processor internal to the keyboard.
Channel A (HOST Port) and Channel B
(AUX Port) interface via two RS232-
C 25-pin 'D' connectors denoted
HOST and AUX. RS-232-C connector
pin-out is as follows:
Main Port
Pin 1 Protective Ground
Pin 2 Transmit Data (Out) Switch
settable, Enhanced
Pin 3 Receive Data (In)
Pin 4 RXD (Serial In from Keyboard)
Pin 5 Request to Send
Pin 6 Clear to Send
Pin 7 Signal Ground
Pin 8 Data Carrier Detect
Pin 12 Secondary Received Line
Signal Detector
Pin 20 Data Terminal Ready
Pin 23 Data Signal Rate Detector
Pins 9-11, 13-19, 21,22,24-25 NOT
Used
Aux Port
Pin 1 Protective Ground
Pin 2 Transmit Data (Out)
Pin 3 Receive Data (In)
Pin 4 RXD (Serial-In from Keyboard)
Pin 5 Request to Send
Pin 6 Clear to Send
Pin 7 Signal Ground
Pin 8 Data Carrier Detect
Pin 20 Data Terminal Ready
Pins 9-19, 21-25 NOT Used
At Power-On time, the DUART's
internal registers are cleared by the
signal RESET. The CPU then
addresses the DUART's internal reg-
isters via Address Bus i;ne AO-A3.
The CPU then presents the informa-
tion on the Duta Bus (DO-D7) of the
DUART (i.e. BAUD RATE, Mode of
Duplex, Transmission type, etc.) and
the DUART will write this information
into the internal registers. Note that
the baud rate can be changed by the
CPU (via software) at anytime the
DUART is not BUSY (polling). A 3.6
MHz clock is used for the DUART's
internal baud rate generators. The
+5 volts presented to pin 40 of the
DUART provides all necessary voltage
requirements.
Attribute Generator
There is BK of address space
reserved for Attribute Memory and
determination of which screen display
attributes are used for each displayed
character (i.e. Blink, Reverse Video,
Single Underscore, etc.). The attri-
bute and character memories are
741-1740
Page 10-10
COMPANY CONFIDENTIAL