Rockfield Research TPS02 Operating Manual

Transmitter protection system
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Transmitter Protection System
TPS02
Operating Manual
generic sales/info version, 10/29/18
Rockfield Research Inc.
www.RockfieldResearch.com
(702) 487-6970

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Summary of Contents for Rockfield Research TPS02

  • Page 1 Transmitter Protection System TPS02 Operating Manual generic sales/info version, 10/29/18 Rockfield Research Inc. • www.RockfieldResearch.com • (702) 487-6970...
  • Page 2 Rockfield Research Inc. • www.RockfieldResearch.com • (702) 487-6970...
  • Page 3: Table Of Contents

    5.5 Tier 3 sub-menu – “Diode Calibration Coeffs” ..............20   5.6 Tier 3 sub-menus – “Pcalc Coefficient Setup” ..............20   5.7 Tier 4 sub-menus – “Pulse Generator Setup” ..............20   Rockfield Research Inc. • www.RockfieldResearch.com • (702) 487-6970...
  • Page 4 11.0 Reprogramming ........................32   12.0 Disassembly and Reassembly ....................32   13.0 PLC Interface ........................32   14.0 Table of Analog Signals ......................33   15.0 Factory Defaults of Parameters ..................... 33   Rockfield Research Inc. • www.RockfieldResearch.com • (702) 487-6970...
  • Page 5: Legalities

    Research Inc. be liable for loss of profits or incidental, indirect, special, consequential, or other similar damages arising out of use of provided equipment. Do not use any Rockfield Research Inc. provided equipment in medical instrumentation, or in any application where misuse or fail- ure may result in equipment damage or personal injury.
  • Page 6: Introduction

    3.0 Quick Start There is no quick start. You are trying to protect an expensive klystron. Many connections to diagnostics and PLC controls are necessary to engage TPS02 functions. Pour a big cup of cof- fee and understand the manual thoroughly.
  • Page 7: Overview

    Other custom options can be configured: a TPS02 (4 channel) using only a single control board, a TPS02 (20 channel) using one control board and one analog board, a TPS02 (52 chan- nel) using a control board and three analog boards, etc. It is also possible to configure a single analog board as a TPS02 with reduced control capabilities, although the 16 channel analog capa- bility would be reduced by reallocating several analog channels for digital I/O.
  • Page 8: Design Topology

    CPU. 4.3 Design Topology The primary purpose of the TPS02 is to protect the klystron from damage – from tube arcs, from waveguide arcs, or from accidental driving beyond the specified power limits. The functions of the TPS02 which provide this protection are designed to be rugged and re- liable.
  • Page 9: Fault Logic

    Event Logging: For inspecting the sequence of events leading to a fault condition, the TPS02 has an internal event logger, which tracks up to 48 bits (fault and status bits) and saves a snapshot of all 48 plus a timestamp whenever any of them change. These events are saved in a cyclical buffer 4096 events deep.
  • Page 10: Tour - Front Panel

    4.4 Tour – Front Panel Figure 3. TPS02 Front Panel The 3U, dual-analog-board TPS02 Front panel consists of 38 BNC outputs, a display with rotary encoder, an array of fault LEDs, an ESTOP button, a fault reset button, and a single-shot pushbutton.
  • Page 11: Digital Monitors

    Four of the analog signals in the TPS02 have additional instrumentation , which includes sensitivity to “interpulse” faults – faults where current or voltage is detected when the TPS02 is not gating a pulse. These signals have an additional LED for display of interpulse faults.
  • Page 12 HV modulator. This LED will appear on while pulsing at moderate to high rep rate, with brightness dependent on duty fraction. Enabled – This LED is on when the TPS02 is enabled for pulsing, and pulse requests will be passed through to the output.
  • Page 13: Tour - Rear Panel

    PLC. Pinouts are detailed in Section 13.0 USB Ports 4.5.3 Each of the three circuit boards in the TPS02 also has a USB port. This is only to be used for maintenance (i.e. reprogramming), and should not be connected during normal operation. Rockfield Research Inc.
  • Page 14: Pulse Inputs

    An external interlock is provided. This is a 10mA current loop, galvanically isolated from the rest of the TPS02 circuitry. The TPS02 is shipped with a jumper plug in place – this should be left in place, or replaced with the user’s interlock wiring. A break in the continuity of the in-...
  • Page 15: Analog Inputs - Shunts

    Analog Inputs – Shunts 4.5.8 A TPS02 configuration may also include shunt current measurements. Typically, shunt cur- rents require differential analog measurements, as “ground” is a dubious concept in high voltage pulsed power applications, and a return bus reference is needed to determine the voltage across the shunt accurately.
  • Page 16: Analog Inputs - Rf Diodes

    A number of analog channels may be dedicated to RF diode signals. This number was quite large for the original TPS02 specification, but may be smaller or larger for future systems. These can be wired for either polarity diode inputs, and any scaling specified. Again, the internal ana- log bus will be scaled to have a typical dynamic range of approximately 0 to +10V.
  • Page 17: Digital Inputs

    5.0 LCD Display Interface The front panel of the TPS02 has a 4-line x 20 character LCD display. With the adjacent ro- tary encoder knob, the user modified the display, or reviews and modifies setup parameters.
  • Page 18: Status Line

    HV pulse. There is a similar 3 µs RC filter on this channel, thus with similar cautions for short RF pulsewidths. The absolute calibration is dependent on the calibration coefficients loaded by the user into the TPS02. The value is displayed in units of kWatts, with 1 kW resolu- tion.
  • Page 19 Time On – This is one channel of the “odometer” functionality of the TPS02. This is an ac- cumulated timer that shows total time that the TPS02 is powered up. The value is kept in units of seconds on a 32 bit counter, thus having a range of over 136 years. The units shown vary de- pending on the value, from seconds to khrs, with decreasing resolution as the duration is in- creased.
  • Page 20: Display Setup Menus

    The lower tiers of the display menus can be entered WHEN THE TPS02 is NOT ENABLED for pulsing ONLY. This is done by pressing the rotary encoder rather than rotating it. If the en- coder knob is pressed while the TPS02 is enabled, an error message will result.
  • Page 21: Tier 3 Sub-Menu - "Set Dac

    RF diode coefficients – There are many different RF diode channels processed in the TPS02, but only channels processed in the four control board analog processing channels are cal- ibrated. Typically this is done for one RF directional coupler, forward and reflected power – and it is these two channels which show calibrated display values, and one of which is used for the odometer integrated power accumulator.
  • Page 22: Tier 3 Sub-Menu - "Diode Calibration Coeffs

    Section 8.0. 5.7 Tier 4 sub-menus – “Pulse Generator Setup” The TPS02 has an internal pulse generation function for testing and tube conditioning. The choice of external (radar) beam and RF pulse requests vs. internal pulse generator pulse requests is typically made via a control bit from the PLC.
  • Page 23: Serial Interface

    We noted above (Section 5.2) that the lower tiers of the LCD Display menus are not accessi- ble when the TPS02 is enabled for pulsing. This is out of an abundance of caution, particularly to avoid changing parameters during pulsing activities where the results may be unpredictable.
  • Page 24: Serial Information Requests

    Extensive debugging experimentation showed the TPS02 system to be quite robust in this regard, but caution is advised. Some features of vio- lating this rule were observed – such as changes to pulse generation setup parameters while puls- ing are not implemented until the next time the clock counters are loaded –...
  • Page 25: Serial Parameter Settings

    “Q” – Write SRAM to FLASH 6.7.1 The non-volatile flash memory in the TPS02 is infrequently accessed, as it is a slower exter- nal interface than the internal (volatile) SRAM within the processor. The flash is separated into parameter space and history space, and both are read into SRAM mirrors at boot-up time. The mirror space is accessed frequently during operation, and the history block continuously updates the odometer accumulators.
  • Page 26: R" - Reset Faults

    “Y” entry. A flash write is forced after the reset. “F” – factory reset parameters 6.7.7 The serial command “F” is provided to reset all user enterable parameters to the factory reset values. Rockfield Research Inc. • www.RockfieldResearch.com • (702) 487-6970...
  • Page 27: Operation

    Sequencing is configuration dependent, and specific to each customer. Typically, a conver- sation will take place between the TPS02 and a facility PLC to sequentially increment the readi- ness of the transmitter..this will include closing breakers, warming up supplies, checking facil- ity services such as cooling and personnel interlocks, enabling power systems, and finally ena- bling the TPS02 to pass pulse requests to the HV modulator and RF gates.
  • Page 28: Single Shot Mode

    Example – The screen capture above is from a short sequence using the TPS02 pulse genera- tor and the internal Event Logger (Section 9.0). The pulse generator was setup with a “tube con- ditioning sequence of 4 states. All four were set with HV pulsewidth of X µs, RF pulsewidth of X µs, and dt of X µs.
  • Page 29: Hard Faults

    Reset button, the PLC Reset bit, or the serial Reset command. No latched faults will reset if the condition persists. Operation is not permitted while the reset button (or bit) is held on. Rockfield Research Inc. • www.RockfieldResearch.com •...
  • Page 30: Rf Power Checks

    8.0 RF Power Checks The TPS02 performs two realtime checks of RF power vs. I . One of these is calculated in the CPU using the calibrated diode power, thus this is more accurate than the hardware check which has a linear approximation, however it is slower and prone to software risks. The other is performed entirely in hardware, hence it is faster and more reliable, but it is less accurate as it as- sumes a linear voltage-power relationship for the diode.
  • Page 31: Event Logger

    The response of the TPS02 to an “event” is triggered by any of the bits of interest changing state – all these bits are wired to pin-change-sensitive ports on the CPU and configured to gener- ate an interrupt.
  • Page 32: Event Logger Example

    VCDGEN is supplied (omitted here) as a template for the user to craft similar custom code. 9.2 Event Logger Example We set the TPS02 to run with external pulse waveforms, set to XX Hz PRF, about XX µs beam pulsewidth, about XX µs RF pulsewidth, and the RF pulse approximately centered in the beam pulse.
  • Page 33: Allocation Of Comparators And Inhibit Timers

    DAC threshold references, scattered numerous places in the schematic. The control board (top board) has patterns for thirteen comparators, eleven with DAC thresh- olds, one with a pot-reference, and one with fixed reference. Of these, four with DAC thresholds are spares. Rockfield Research Inc. • www.RockfieldResearch.com •...
  • Page 34: Reprogramming

    Once setup properly, firmware upgrades to either CPUs or CPLDs are simple and reliable. New for 2018 – a new boardset, TPS02.2, now requires only a single USB port on the back panel, reducing confusion by the user. All programming is routed through the control board in this case.
  • Page 35: Table Of Analog Signals

    Tables below (omitted) give all gain, filter time, comparator allocation, and logic responses for all analog channels of the TPS02. 15.0 Factory Defaults of Parameters The table below (omitted) shows all parameters and reset values for the TPS02 control. Rockfield Research Inc. •...

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