FALSE
1
REMOTE. INHIBIT INPUT CINH)
REMOTE INHIBIT (RI)
STATUS BIT
Pi>CR SUPPLY OUTPUT
FFtULT LINE CFLT^
READING FAULT REGISTER
ISSUING A "RST" OR "CLR"
INITIATE
FLT
FLT
POWER SUPPLY
INHIBIT
TRUE
CLEARED
OUTPUT ENABLED,
RI REGISTER CLEARED
Figure 3-21. Timing Diagram
3-31