Specifications; 1-5. Performance Specifications - Type 1 System Board - IBM Personal System/2 50 Technical Reference

Specifications
Device
Microprocessor (10 MHz - 100 na Clock):
Access to System Board RAM
Access to System Board ROM
Access to Channel:
Default Transfer Cycle:
110 Access
Memory Access
Synchronous Extended Transfer Cycle
Refreah Rate
(Typically performed every 15.1 Jls)
Bua Maater Aceeaa to System Board RAM
DMA Controller (10 MHz - 100 na Clock):
Number
of
Walta
1
o
1
Single Transfer: 300
+
110 Access
+
Memory Access
Burst Transfers: 300
+
(110 Access
+
Memory Access)N •
System Board Memory Access
Default Transfer Cycle:
110 Access
Memory Access
Synchronous Extended Transfer Cycle
• N is the number of transfers in the burst.
Cycle
Time (na)
300
300
300
200
300
500 (min)
300 (min)
300
300
200
300
Figure 1-5. Performance Specifications - Type 1 System Board
Model 50 System Overview 1-7