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Penguin Edge MVME250 Series Installation And Use Manual

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Penguin Edge™ MVME2500
Installation and Use
P/N: 6806800L01T
July 2022

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  • Page 1 Penguin Edge™ MVME2500 Installation and Use P/N: 6806800L01T July 2022...
  • Page 2 Legal Disclaimer* SMART Embedded Computing, Inc. (SMART EC), dba Penguin Solutions™, assumes no responsibility for errors or omissions in these materials. These materials are provided "AS IS" without warranty of any kind, either expressed or implied, including but not limited to, the implied warranties of merchantability, fitness for a particular purpose, or non- infringement.

  • Page 3: Table Of Contents

    Table of Contents About this Manual ............. . . 13 Safety Notes.
  • Page 4 Table of Contents Connectors ............. 45 3.4.1 Front Panel Connectors .
  • Page 5 Table of Contents Timers ..............73 4.4.1 Real Time Clock.
  • Page 6 Table of Contents Memory Map ............91 Flash Memory Map .
  • Page 7 Table of Contents MVME2500 Specific U-Boot Commands ........114 Updating U-Boot .
  • Page 8 Table of Contents MVME2500 Installation and Use (6806800L01T)
  • Page 9 List of Figures Figure 1-1 Serial Number Location ..........30 Figure 3-1 Component Layout .
  • Page 10 List of Figures MVME2500 Installation and Use (6806800L01T)
  • Page 11 List of Tables Table 1-1 Board Standard Compliances ......... . . 29 Table 1-2 Mechanical Data .
  • Page 12 Penguin Edge Documents ........

  • Page 13: About This Manual

    About this Manual Overview of Contents This manual is intended for users who install and configure MVME2500 product. It is assumed that the user is familiar with the standard cabling procedures, configuration of operating systems, U-Boot system and MVME chassis. The purpose of this manual is to describe MVME2500 product and the services it provides.
  • Page 14 About this Manual About this Manual Abbreviations This document uses the following abbreviations: Term Definition Common-On-Chip Processor CPLD Complex Programmable Logic Device DDR3 Double Data Rate 3 DUART Dual UART Error Checking Correction EEPROM Erasable Programmable Read-Only Memory Federal Communications Commission FPGA Field Programmable Gate Array GPIO...
  • Page 15 About this Manual Term Definition Surface Mounted Technology UART Universal Asynchronous Receiver-Transmitter VITA VMEbus International Trade Association Versa Module Eurocard PCI Express Mezzanine Card Conventions The following table describes the conventions used throughout this manual.. Notation Description Typical notation for hexadecimal numbers (digits are 0 through F), for 0x00000000 example used for addresses and offsets Same for binary numbers (digits are 0 and 1)
  • Page 16 About this Manual About this Manual Notation Description Indicates a hazardous situation which, if not avoided, could result in death or serious injury Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury Indicates a property damage message Indicates a hot surface that could result in moderate or serious injury Indicates an electrical situation that could result in moderate injury or death Indicates that when working in an ESD environment care should be taken...
  • Page 17 About this Manual Summary of Changes This manual has been revised and replaces all prior editions. Part Number Publication Date Description 6806800L01T July 2022 Rebrand to Penguin Solutions. Updated Table 2-2 Power Requirements with new 6806800L01S October 2021 variant. Updated Table 2-1 Environmental Requirements 6806800L01R August 2021 (Applicable Variants, Vibration Sine, Vibration...
  • Page 18 About this Manual About this Manual Part Number Publication Date Description Updated Table “Available Board Variants". 6806800L01E July 2011 Updated Appendix B, Related Documentation Edited Memory Maps and Registers Edited Programming Model 6806800L01D May 2011 Edited Figure “Component Layout” Edited Figure “On-board LEDs” Added Front Panel Serial Port (J4) Updated Chapter 3, Controls, LEDs, and Connectors by adding the following.

  • Page 19: Safety Notes

    Safety Notes This section provides warnings that precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed during all phases of operation, service, and repair of this equipment. You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment.
  • Page 20 Safety Notes system to show compliance with the above mentioned requirements. A proper installation in a compliant system will maintain the required performance. Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained. Operation Product Damage High humidity and condensation on the board surface causes short circuits.
  • Page 21 Product Damage Inserting or removing modules with power applied may result in damage to module components. Before installing or removing additional devices or modules, read the documentation that came with the product. Cabling and Connectors Product Damage RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1 network interfaces.
  • Page 22 Safety Notes Data Loss If the battery has low or insufficient power the RTC is initialized. Exchange the battery before seven years of actual battery use have elapsed. PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent damage, do not use a screw driver to remove the battery from its holder.

  • Page 23: Sicherheitshinweise

    Sie zuständige Geschäftsstelle von Penguin Solutions. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden. Das Produkt wurde in einem Penguin Edge™ Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw.
  • Page 24 Sicherheitshinweise Das Produkt arbeitet im Hochfrequenzbereich und erzeugt Störstrahlung. Bei unsachgemäßem Einbau und anderem als in diesem Handbuch beschriebenen Betrieb können Störungen im Hochfrequenzbereich auftreten. Wird das Produkt in einem Wohngebiet betrieben, so kann dies mit grosser Wahrscheinlichkeit zu starken Störungen führen, welche dann auf Kosten des Produktanwenders beseitigt werden müssen.
  • Page 25 Installation Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemäss beendet wurde, kann zu partiellem Datenverlust sowie zu Schäden am Filesystem führen. Stellen Sie sicher, dass sämtliche Software auf dem Board ordnungsgemäss beendet wurde, bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen.
  • Page 26 Sicherheitshinweise Batterie Beschädigung des Blades Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und eschädigungen des Blades zur Folge haben. Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. Datenverlust Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine Backupversorgung verhindert den Datenverlust während des Austauschs.

  • Page 27: Introduction

    Chapter 1 Introduction Overview The MVME2500 is a VME form-factor single-board computer based on the NXP QorIQ ® ® P2010 single core or P2020 dual core processors. A e500 v2 core QorIQ processor uses 45 nanometer technology which delivers an excellent performance to power ratio.The MVME2500 is ideal for automation, medical, and military applications such as railway control, semiconductor processing, test and measurement, image processing, and radar/sonar.
  • Page 28 Introduction Introduction Operating Systems  – Based from BSP provided by NXP which is based from standard Linux version 2.6.32-rc3. Development tool is ltib 9.1.1 (Linux Target Image Builder) from Freescale – VxWorks MVME721X Transition Module I/O  – Two GbE interfaces –...

  • Page 29: Standard Compliances

    Introduction Standard Compliances The product is designed to meet the following standards: Table 1-1 Board Standard Compliances Standard Description EN 60950-1/A11:2009 IEC 60950-1:2005 2nd Edition Safety Requirements (legal) CAN/CSA C22.2 No 60950-1 FCC Part 15, Subpart B, Class A (non- residential) ICES-003, Class A (non-residential) EMC Directive 89/336/EEC...

  • Page 30: Ordering Information

    Introduction Introduction Ordering Information Refer to the data sheet for the MVME2500 for a complete list of available variants and accessories. Refer to or consult your local Penguin Appendix B, Related Documentation Solutions sales representative for the availability of other variants. For technical assistance, documentation, or to report product damage or shortages, contact your local Penguin Solutions sales representative or visit https://www.penguinsolutions.com/edge/support/.

  • Page 31: Hardware Preparation And Installation

    Chapter 2 Hardware Preparation and Installation Overview This chapter provides unpacking instructions, hardware preparation, installation procedures of the board. Installation instructions for the optional PMC/XMC modules and transitions modules are also included. A fully implemented MVME2500 consists of the base board and the following modules: PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility ...

  • Page 32: Requirements

    Hardware Preparation and Installation Hardware Preparation and Installation 1. Verify that you have received all items of your shipment. MVME2500 board  Quick Start Guide  Safety Notes Summary  Any optional items ordered  2. Check for damage and report any damage or differences to customer service. 3.

  • Page 33: Table 2-1 Environmental Requirements

    Hardware Preparation and Installation Table 2-1 Environmental Requirements Characteristics Commercial Versions Extended Temperature Versions MVME2500-nnnnnnn1E/1S MVME2500-02100202E Applicable Variants MVME2500-nnnnnnn1E/1S–N MVME2500-021CCxxxx Cooling Method Forced Air 7CFM Forced Air 7CFM Operating Temperature 0°C to +55°C -40°C to +71°C Storage -40°C to +85°C -50°C to +100°C 2G, 5 to 2000Hz Vibration Sine...

  • Page 34: Power Requirements

    Hardware Preparation and Installation Hardware Preparation and Installation 2.3.2 Power Requirements The board uses +5.0V from the VMEbus backplane. On-board power supply generates required voltages for various ICs. The MVME2500 connects the +12V and -12V supplies from the backplane to the PMC sites, while the +3.3V power supplied to the PMC sites comes from the +5.0V backplane power.

  • Page 35: Equipment Requirements

    Hardware Preparation and Installation 2.3.3 Equipment Requirements The following are recommended to complete a MVME2500 system: VMEbus system enclosure  System console terminal  Operating system (and/or application software)  Transition module and connecting cables  Configuring the Board The board provides software control over most options. Settings can be modified to fit the user's specifications.

  • Page 36: Installing Accessories

    Hardware Preparation and Installation Hardware Preparation and Installation Installing Accessories 2.5.1 Rear Transition Module The MVME2500 does not support hot swap. Remove power to the rear slot or system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.

  • Page 37: Pmc/Xmc Support

    Hardware Preparation and Installation 8. Verify that the transition module is properly seated and secure it to the chassis using two screws adjacent to the injector/ejector levers. 9. Connect the cables to the transition module. To remove the transition module from the chassis, reverse the procedure and press the red locking tabs (IEEE handles only) to extract the board.

  • Page 38: Installing And Removing The Board

    Hardware Preparation and Installation Hardware Preparation and Installation 3. Slide the front bezel of the PMC/XMC into the front panel cut-out from backside. The front bezel of the PMC/XMC module will be placed with the board when the connectors on the module align with the connectors on the board. 4.
  • Page 39 Hardware Preparation and Installation Installation Procedure 1. Attach an ESD strap to your wrist. Attach the other end of the strap to an electrical ground. Make sure that it is securely fastened throughout the procedure. 2. Remove VME filler panels from the VME enclosures, as appropriate. 3.

  • Page 40: Completing The Installation

    Hardware Preparation and Installation Hardware Preparation and Installation Completing the Installation The board is designed to operate as an application-specific computer blade or an intelligent I/O board/carrier. It can be used in any slot in a VME chassis. Once the board is installed, you are ready to connect peripherals and apply power to the board.

  • Page 41: Controls, Leds, And Connectors

    Chapter 3 Controls, LEDs, and Connectors Board Layout The following figure shows the components and the connectors on the MVME2500 board. Figure 3-1 Component Layout MVME2500 Installation and Use (6806800L01T)

  • Page 42: Front Panel

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Front Panel The following components are found on the MVME2500 front panel. Figure 3-2 Front Panel LEDs, Connectors and Switches MVME2500 Installation and Use (6806800L01T)

  • Page 43: Reset Switch

    Controls, LEDs, and Connectors 3.2.1 Reset Switch The MVME2500 has a single push button switch that has both “abort” and “reset” functions. Pressing the switch for less than three seconds generates an abort interrupt to the P20x0 QorIQ PIC. Holding it down for more than three seconds will generate a hard reset. The VME SYSRESET is generated if the MVME2500 is the VMEbus system controller.

  • Page 44: Table 3-1 Front Panel Leds

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-1 Front Panel LEDs Label Function Location Color Description By default Yellow User Software Controllable. Refer to USER 1 User Defined Front panel the “User LED Register.” User Software Controllable. Refer to the “User LED Register.”...

  • Page 45: On-Board Leds

    Controls, LEDs, and Connectors 3.3.2 On-board LEDs The on-board LEDs are listed below. To view its location on the board, see Figure 3-1 on page Figure 3-4 On-board LEDs Table 3-2 On-board LEDs Status Label Function Color Description This indicator is illuminated when one or more of the on- Power Fail board voltage rails fails.

  • Page 46: Front Panel Connectors

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors 3.4.1 Front Panel Connectors The following connectors are found on the outside of the MVME2500 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors. The backplane connectors include the P1 and the P2 connectors.

  • Page 47: Front Panel Serial Port (J4)

    There is one front access asynchronous serial port interface that is routed to the micro mini DB-9 front panel connector. A male-to-male micro-mini DB9 adapter cable is available under Penguin Edge part number SERIAL-MINI-D2 and ACC/CABLE/SER/DTE/6E 9-pin micro-DSUB to 9-pin DSUB cross connected serial console cable. The pin assignments for...

  • Page 48: Usb Connector (J5)

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-4 Front Panel Serial Port (J4) Signal Description 3.4.1.3 USB Connector (J5) The MVME2500 uses upright USB receptacle mounted in the front panel. Table 3-5 USB Connector (J5) Pin Name Signal Description Data - Data + Mounting Ground...
  • Page 49 Controls, LEDs, and Connectors Table 3-6 VMEbus P1 Connector (continued) Row A Row B Row C Row D Row Z DATA 4 BGOUT0 DATA 12 DATA 5 BGIN1 DATA 13 DATA 6 BGOUT1 DATA 14 DATA 7 BGIN2 DATA 15 BGOUT2 SYSCLK BGIN3...

  • Page 50: Vmebus P2 Connector

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-6 VMEbus P1 Connector (continued) Row A Row B Row C Row D Row Z ADD 3 IRQ3 ADD 36 +3.3V (not used) GND ADD 2 IRQ2 ADD 37 ADD 1 IRQ1 ADD 38 +3.3V (not used) GND...

  • Page 51: On-Board Connectors

    Controls, LEDs, and Connectors Table 3-7 VMEbus P2 Connector (continued) Row A Row B Row C Row D Row Z GE3_LINK_ PMC IO 30 DATA 17 PMC IO 29 Serial 2 RTS PMC IO 32 DATA 18 PMC IO 31 GE3_ACT_LED PMC IO 34 DATA 19...

  • Page 52: Sata Connector (J3)

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-8 Flash Programming Header (P7) (continued) Signal Description Chip Select 1 Chip Select 0 Programmer's VCC Master In Slave OUT (MISO) HOLD 0 Keying CLOCK Master OUT Slave IN (MOSI) 3.4.2.2 SATA Connector (J3) The on-board customized SATA connector is compatible with the SATA kit, namely VME- 64GBSSDKIT and IVME7210-MNTKIT.

  • Page 53: Pmc Connectors

    Controls, LEDs, and Connectors Table 3-9 Custom SATA Connector (J3) (continued) Signal Description Signal Description +3.3V SATA RX - +3.3V SATA RX + +3.3V +3.3V +3.3V 3.4.2.3 PMC Connectors The MVME2500 supports only one PMC site. It utilizes J14 to support PMC I/O that goes to the RTM PMC.
  • Page 54 Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-10 PMC J11 Connector (continued) Signal Description Signal Description INT D PCI CLK +3.3V AD 15 AD 12 GNT A AD 11 REQ A AD 9 +3.3V AD 31 CBE0 AD 28 AD 6 AD 27 AD 5...

  • Page 55: Table 3-11 Pmc J12 Connector

    Controls, LEDs, and Connectors Table 3-11 PMC J12 Connector Signal Description Signal Description +12V JTAG TRST IDSELB JTAG TMS TRDY JTAG TDO +3.3V JTAG TDI STOP PERR +3.3V SERR BUSMODE2 (Pulled UP) CBE1 +3.3V PCI RESET AD 14 BUSMODE3 (PULLED DWN) AD 13 +3.3V M66EN...

  • Page 56: Table 3-12 Pmc J13 Connector

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-11 PMC J12 Connector (continued) Signal Description Signal Description +3.3V IDSEL AD 23 EREADY +3.3V AD 28 RSTOUT AD 18 ACK64 +3.3V AD 16 CBE2 Table 3-12 PMC J13 Connector Signal Description Signal Description AD48 AD 47...

  • Page 57: Table 3-13 Pmc J14 Connector

    Controls, LEDs, and Connectors Table 3-12 PMC J13 Connector (continued) Signal Description Signal Description AD 40 AD 39 AD 60 AD 38 AD 59 AD 37 AD 58 AD 57 AD 36 +3.3V AD 35 AD 56 AD 34 AD 55 AD 33 AD 54 AD 53...
  • Page 58 Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-13 PMC J14 Connector (continued) Signal Description Signal Description PMC IO 3 PMC IO 35 PMC IO 4 PMC IO 36 PMC IO 5 PMC IO 37 PMC IO 6 PMC IO 38 PMC IO 7 PMC IO 39 PMC IO 8...

  • Page 59: Jtag Connector (P6)

    Controls, LEDs, and Connectors Table 3-13 PMC J14 Connector (continued) Signal Description Signal Description PMC IO 27 PMC IO 59 PMC IO 28 PMC IO 60 PMC IO 29 PMC IO 61 PMC IO 30 PMC IO 62 PMC IO 31 PMC IO 63 PMC IO 32 PMC IO 64...

  • Page 60: Cop Connector (P50)

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-14 JTAG Connector (P6) (continued) Signal Description Signal Description SCAN 2 TDI SCAN 3 TMS SCAN 3 TCK1 SCAN 3 TDO SCAN 3 TCK 2 +2.5V SCAN 3 TCK 3 SCAN 3 TDI SCAN 3 TRST SCAN 3 TCK3 SCAN 4 TCK 1...
  • Page 61 Controls, LEDs, and Connectors Table 3-15 COP Header (P50) Signal Description JTAG TDO COP TRST COP RUNSTOP (Pulled UP) COP VDD SENSE JTAG TCK COP CHECK STOP IN JTAG TMS P2020 SW RESET COP PRESENT COP HARD RESET KEYING COP CHECK STOP OUT MVME2500 Installation and Use (6806800L01T)

  • Page 62: Sd Connector (J2)

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors 3.4.2.6 SD Connector (J2) Table 3-16 SD Connector (J2) Signal Description DATA 3 COMMAND VCC (+3.3V) CLOCK DATA 0 DATA 1 DATA 2 WRITE PROTECT CARD DETECT 3.4.2.7 XMC Connector (XJ2) The MVME2500 has one XMC connector (XJ2) that supports XMC cards with J15 connector.
  • Page 63 Controls, LEDs, and Connectors Table 3-17 XMC Connector (XJ2) Pinout (continued) Row A Row B Row C Row D Row E Row F +3.3V +3.3V JTAG TMS +12V +3.3V +3.3V JTAG TMS -12V +3.3V JTAG TDO GA 0 BIST TX0 - TX1 + TX1 - +3.3V...

  • Page 64: Miscellaneous P2020 Debug Connectors

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors 3.4.2.8 Miscellaneous P2020 Debug Connectors Table 3-18 P20x0 Debug Header Signal Description MSRCDI0 MSRCDI1 MDVAL MSRCDI2 TRIG_OUT MSRCDI3 TRIG_IN MSRCID4 Switches These switches control the configuration of the MVME2500. NOTICE Board Malfunction Switches marked as Reserved might carry production-related functions and can cause the board to malfunction if their settings are changed.

  • Page 65: Figure 3-5 Geographical Address Switch

    Controls, LEDs, and Connectors Note that this switch is wired in parallel with the geographical address pins on the 5-row connector. These switches must be in the OFF position when installed in a 5-row chassis in order to get the correct address from the P1 connector. This switch also includes the SCON control switches.

  • Page 66: Smt Configuration Switch (S2)

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors 3.5.2 SMT Configuration Switch (S2) This eight position SMT configuration switch controls the flash bank write-protect, selects the flash boot image, and controls the safe start ENV settings. The default setting on all switch positions is OFF and is indicated by brackets in Table 3-20.
  • Page 67 Controls, LEDs, and Connectors Table 3-20 SMT Configuration Switch Settings (continued) SW2 DEFAULT Signal Name Description Notes Hardware via S2-3 write- protects the flash. To disable the write-protect, SPI Flash Write- S2-3 should be OFF. You need Protect FLASH_WP_N to set the U-Boot configuration (WP Disabled) ON: WP Enabled to successfully write on the...
  • Page 68 Controls, LEDs, and Connectors Controls, LEDs, and Connectors Table 3-20 SMT Configuration Switch Settings (continued) SW2 DEFAULT Signal Name Description Notes Should be OFF for normal (CPU Reset CPU Reset operation. Deasserted) MVME2500 Installation and Use (6806800L01T)

  • Page 69: Functional Description

    Chapter 4 Functional Description Block Diagram The MVME2500 block diagram is illustrated in 4-1. All variants provide front panel Figure access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or to the rear panel) through a ganged RJ-45 connector and one Type A USB port.

  • Page 70: Chipset

    Functional Description Functional Description Chipset The Product Type utilizes the QorIQ P20x0 integrated processor. It offers an excellent combination of protocol and interface support which includes the following components: QorIQ P20x0 integrated processor or e500v2 processor core (P2020) and a single ...

  • Page 71: Pci Express Interface

    Functional Description The memory controller supports the following: 16GB of memory  Asynchronous clocking from platform clock, with programmable settings that  meets all the SDRAM timing parameters Up to four physical banks; each bank can be independently addressed to 64Mb to ...

  • Page 72: I2C Interface

    Functional Description Functional Description 4.2.6 C Interface The MVME2500 uses only one of the two independent I C buses on the processor. For more information, see I2C Devices on page 4.2.7 USB Interface The P20x0 implements a USB 2.0 compliant serial interface engine. For more information, USB on page 4.2.8 DUART...

  • Page 73: Security Engine (Sec) 3.1

    Functional Description 4.2.12 Security Engine (SEC) 3.1 The integrated security engine of the P20x0 is designed to off-load intensive security functions like key generation and exchange, authentication and bulk encryption from the processor core. It includes eight different execution units where data flows in and out of an 4.2.13 Common On-Chip Processor (COP) The COP is the debug interface of the QorIQ P20x0 processor.

  • Page 74: Real Time Clock

    Functional Description Functional Description 4.4.1 Real Time Clock This operates on 3.3V supply monitoring and battery control function (MAX6364PUT29), a 32.768KHz clock generator (DS32KHZS), and an RTC with alarm (DS1375T). for more information on the real time clock back- Real-Time Clock Battery on page 87 up battery.

  • Page 75: Spi Bus Interface

    Functional Description SPI Bus Interface The enhanced serial peripheral interface (eSPI) allows the device to exchange data with peripheral devices such as EEPROMs, RTC, Flash and the like. The eSPI is a full-duplex synchronous, character-oriented channel that supports a simple interface such as receive, transmit, clock and chip selects.

  • Page 76: Firmware Redundancy

    Functional Description Functional Description The board power should be switched on before programming. The switch S2-8 should also be powered on to successfully detect the SPI Flash chip. 4.6.3 Firmware Redundancy The MVME2500 uses two physically separate boot devices to provide boot firmware redundancy.

  • Page 77: Crisis Recovery

    Functional Description At power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2) setting. Depending on the S2-2 setting, SPI_SEL0 is routed to one of two SPI devices. The selected SPI device must contain a boot image. Once the boot image is copied into memory and executed, the FPGA will wait and once the P20x0 will write on one bit of the FPGA watchdog register, the FPGA will then pass through the SPI chip select from the P20x0 to SPI device chip selects.

  • Page 78: Front Uart Control

    DB-9 front panel. A male-to-male micro-mini DB-9 to DB9 adapter cable is available under Penguin Edge Part Number SERIAL-MINI-D2 and is approximately 12 inches in length. Only 115200 bps and 9600 bps are supported. The default baud rate on the front panel serial is 9600 kbps.

  • Page 79: Pmc Add-On Card

    Functional Description PMC/XMC sites are keyed for 3.3V PMC signaling. The PMC and the XMC add-on cards must have a hole in the 3.3 V PMC keying position in order to be populated on the MVME2500. The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add-on cards.

  • Page 80: Vme Support

    Functional Description Functional Description The MVME2500 uses Marvell's 88SE6121B2-NAA2C000 SATA controller and supports up to 1.5Gbps (SATA Gen 1). For status indicators, it has an on-board green LED, D12 and D13 for SATA link and SATA activity status respectively. 4.11 VME Support The MVME2500 can operate in either System Controller (SCON) mode or non-SCON mode, as determined by the switch setting of S1-1 and S1-2.

  • Page 81: Reset/Control Fpga

    Functional Description 4.14 Reset/Control FPGA The FPGA provides the following functions: Power control and fault detection  Reset sequence and reset management  Status and control registers  Miscellaneous control logic  Watchdog timer  32-bit Tick Timer  Clock generator ...

  • Page 82: Power Up Sequencing Requirements

    Functional Description Functional Description Table 4-1 Voltage Supply Requirement Voltage Rail Requirement Voltage Rail Minimum Maximum +1.05 V 1.0 V 1.1 V 4.15.2 Power Up Sequencing Requirements The power up sequence describes the voltage rail power up timing, which is designed to support all the chip supply voltage sequencing requirement.

  • Page 83: Table 4-2 Power Up Sequence

    Functional Description Table 4-2 Power Up Sequence POWER SEQUENCE DIAGRAM DOCUMENT NUMBER 6306822HA.cpm PAGE 83 OF 87 MVME2500 Installation and Use (6806800L01T)

  • Page 84: Clock Structure

    Functional Description Functional Description 4.16 Clock Structure A total of three IDT chips, a discrete oscillator, and crystal supports all the clock requirements of MVME2500. Figure 4-3 Clock Distribution Diagram 4.17 Reset Structure The MVME2500 reset will initiate after the power up sequence if the 1.5V power supply is GOOD.

  • Page 85: Reset Sequence

    Functional Description 4.17.1 Reset Sequence The timing of the reset sequence supports each chip reset requirements with respect to the power supply. All the resets are controlled by the FPGA with a power supply of +3.3V from+5V. All the resets are asserted until +1.5V power is Good. Initially peripherals resets are released to corresponding sequence, then later the CPU reset is released.

  • Page 86: Figure 4-4 Reset Sequence

    Functional Description The figure below describes the reset sequence from the +5V Power Good to the release of the CPU reset. Figure 4-4 Reset Sequence RESET SEQUENCE DOCUMENT NUMBER 6306822HA.cpm PAGE 84 OF 87 MVME2500 Installation and Use (6806800L01T)

  • Page 87: Thermal Management

    It provides backup power for the on-board RTC when primary power is unavailable. 4.20 Debugging Support The following information shows the details of Penguin Edge debugging support as applied to the MVME2500. 4.20.1 POST Code Indicator The following table shows the LED status of the POST Codes.

  • Page 88: Jtag Chain And Board

    Functional Description Functional Description Table 4-4 POST Code Indicator on the LED Sequence Description U-boot has been copied from SPI flash to CPU cache. Serial console has been initialized, some text is visible on the terminal. DDR has been initialized using SPD parameters, Execution is still in the cache.

  • Page 89: Table 4-5 Transition Module Features

    Functional Description The MVME721X RTM is for I/O routing through the rear of a compact VMEbus chassis. It connects directly to the VME backplane in chassis with an 80 mm deep rear transition area. The MVME721X RTM is designed for use with the MVME7100, MVME2500, and MVME4100.
  • Page 90 Functional Description Functional Description MVME2500 Installation and Use (6806800L01T)

  • Page 91: Memory Maps And Registers

    Chapter 5 Memory Maps and Registers Overview System resources including system control and status registers, external timers, and the QUART are mapped into 16MB address range accessible from the MVME2500 local bus through the P20x0 QorIQ LBC. Memory Map The following table shows the physical address map of the MVME2500. Table 5-1 Physical Address Map Device Name...

  • Page 92: Flash Memory Map

    Memory Maps and Registers Memory Maps and Registers Flash Memory Map The table below lists the memory range designated to U-boot and ENV variables. Table 5-2 Flash Memory Map Description Memory Area U-boot 0x00000000 0x0008ffff Reserved 0x00090000 0x0009ffff ENV Variables 0x00100000 0x0011ffff Available Flash 0x00120000 0x007fffff...

  • Page 93: Table 5-3 Linux Devices Memory Map

    Memory Maps and Registers Table 5-3 Linux Devices Memory Map (continued) Device Memory Range Memory Area Size FPGA 0xffdf0000 0xffdf0fff ecm local access window CCSR 0xffe00000 0xffe00ffff ecm (Error Correction Module) CCSR 0xffe01000 0xffe01fff Memory Controller CCSR 0xffe02000 0xffe02fff I2C1 CCSR 0xffe03000 0xffe030ff 256B I2C2 CCSR...

  • Page 94: Programmable Logic Device (Pld) Registers

    Memory Maps and Registers Memory Maps and Registers Table 5-3 Linux Devices Memory Map (continued) Device Memory Range Memory Area Size msi CCSR 0xffe41600 0xffe4167f 128B mpic CCSR 0xffe40000 0xffe7ffff 256KB Global Utilities CCSR 0xffee0000 0xffee0fff L2 Cache Mem 0xf0f80000 0xf0ffffff 512KB Programmable Logic Device (PLD) Registers 5.5.1...

  • Page 95: Pld Month Register

    Memory Maps and Registers Table 5-5 PLD Year Register PLD Year Register - 0xFFDF0004 Field PLD Rev OPER RESET 5.5.3 PLD Month Register The MVME2500 PLD provides an 8-bit register which contains the build month of the timers/registers PLD. Table 5-6 PLD Month Register PLD Year Register - 0xFFDF0005 Field...

  • Page 96: Pld Sequence Register

    Memory Maps and Registers Memory Maps and Registers 5.5.5 PLD Sequence Register The MVME2500 PLD provides an 8-bit register which contains the sequence of the PLD which is in synchrony with the PCB version. Table 5-8 PLD Sequence Register PLD Revision Register - 0xFFDF0007 Field PLD Rev OPER...

  • Page 97: Pld Led Control Register

    Memory Maps and Registers PWR_V1P2_SW_PWRGD 1.2V SW Supply power good indicator PWR_V1P5_PWRGD 1.5V Supply power good indicator 1 - Supply Good and Stable 0 - Otherwise 5.5.7 PLD LED Control Register The MVME2500 PLD provides an 8-bit register which controls the eight LEDs. Table 5-10 PLD LED Control Register PLD LED_CTRL - 0xFFDF001C Field...

  • Page 98: Pld U-Boot And Tsi Monitor Register

    Memory Maps and Registers Memory Maps and Registers Field Description PMC_XMC_SEL XMC or PMC Selection Switch 1 - PMC 0 - XMC PMC1_EREADY Indicates that the PrPMC module is installed in PMC site. 1 - PrPMC is ready for enumeration or no PrPMC is installed. 0 - PrPMC is not ready for enumeration.

  • Page 99: Pld Boot Bank Register

    Memory Maps and Registers 5.5.10 PLD Boot Bank Register The MVME2500 PLD provides an 8-bit register which is used to declare successful U-Boot loading, indicating the SPI boot bank priority and actual SPI bank it booted from. Table 5-13 PLD Boot Bank Register PLD Boot Bank - 0xFFDF0050 SPI_GOODReg BOOT_B...

  • Page 100: Pld Test Register 1

    Memory Maps and Registers Memory Maps and Registers Field Description MASTER_WP_DISABLED I2C devices manual switch write-protect status 1 - Write-protect enabled 0 - Write-protect disabled FLASH_WP_N SPI devices manual switch write-protect status 1 - Write-protect disabled 0 - Write-protect enabled I2C_DEBUG_EN I2C debug ports (I2C_1_D and I2C_1_C) enable 1 - Drive Enabled...

  • Page 101: Pld Test Register 2

    Memory Maps and Registers Table 5-15 PLD Test Register 1 PLD Test Register 1- 0xFFDF0080 RESET Field Description TEST_REG1 General purpose 8-bit R/W field 5.5.13 PLD Test Register 2 The MVME2500 PLD provides an 8-bit general purpose read/write register which is used by the software for PLD testing or general status bit storage.

  • Page 102: Pld Shutdown, Reset Control And Reset Reason Register

    Memory Maps and Registers Memory Maps and Registers Field Description Abort switch interrupt if pressed less than three seconds. 1 - Interrupt enabled 0 - No Interrupt TICK0_INT Tick Timer 0 interrupt 1 - Interrupt enabled 0 - No Interrupt TICK1_INT Tick Timer 1 interrupt 1 - Interrupt enabled...

  • Page 103: Pld Watchdog Timer Refresh Register

    Memory Maps and Registers Soft_RST Board Soft Reset (self clearing) 1 - Execute soft reset 0 - No reset Clear_Cause Clear Reset Reason (self clearing) 1 - Clear Reason 0 - None CPU_RESET CPU_HRESET_REQ_L Reset Reason 1 - Reset is due to CPU_HRESET_REQ_L signal 0 -None WD_TIMEOUT Watchdog Timeout Reset Reason...

  • Page 104: Pld Watchdog Control Register

    Memory Maps and Registers Memory Maps and Registers 5.5.17 PLD Watchdog Control Register The MVME2500 provides a watchdog control register. Table 5-20 PLD Watchdog Control Register PLD Watch Dog Timer Load - 0xFFC80604 Watchdog_ Field OPER RESET 0000 Field Description Enable.

  • Page 105: External Timer Registers

    Memory Maps and Registers External Timer Registers The MVME2500 provides a set of tick timer registers to access the three external timers implemented in the timers/registers PLD. These registers are 32-bit and are word writable. The following sections describe the timer prescaler and control registers: 5.6.1 Prescaler Register The prescaler adjust value is determined by this formula:...

  • Page 106: Control Registers

    Memory Maps and Registers Memory Maps and Registers 5.6.2 Control Registers Table 5-23 Control Registers Tick Timer 0 Control Register - 0xFFC80202 Tick Timer 1 Control Register - 0xFFC80302 Tick Timer 2 Control Register - 0xFFC80402 7 6 5 4 3 Field RSVD RSVD RSVD RSVD RSVD INTS CINT...

  • Page 107: Counter High And Low Word Registers

    Memory Maps and Registers Since the processor is 16-bits and the tick timer is 32-bits, the compare register was split in half. Accessing the whole register will require two transactions. Table 5-24 Compare High Word Registers Tick Timer 0 Compare Value High Word - 0xFFC80204 Tick Timer 1 Compare Value High Word - 0xFFC80304 Tick Timer 2 Compare Value High Word - 0xFFC80404 Field...

  • Page 108: Table 5-27 Counter Low Word Registers

    Memory Maps and Registers Memory Maps and Registers Table 5-27 Counter Low Word Registers Tick Timer 0 Counter Value Low Word - 0xFFC8020A Tick Timer 1 Counter Value Low Word - 0xFFC8030A Tick Timer 2 Counter Value Low Word - 0xFFC8040A Field TickTimer Counter Value Low Word (16-bits) OPER...

  • Page 109: Boot System

    Chapter 6 Boot System Overview The MVME2500 uses Das U-Boot, a boot loader software based on the GNU Public License. It boots the blade and is the first software to be executed after the system is powered on. Its main functions are: Initialize the hardware ...

  • Page 110: Boot Options

    Boot System Boot System Enter the command to disable the U-Boot auto- setenv bootdelay -1; saveenv boot feature and let the U-Boot directly enter the command line interface after the next reboot/power up. Boot Options 6.3.1 Booting from a Network In this mode, U-Boot downloads and boots the Linux kernel from an external TFTP server and mounts a root file system located on a network server.

  • Page 111: Booting From An Optional Sata Drive

    Boot System 6.3.2 Booting from an Optional SATA Drive 1. Make sure that the kernel, dtb, and ramdisk are saved in the SATA drive with ext2 partition. 2. Configure U-Boot environment variable: setenv File_uImage <kernel_image> setenv File_dtb <kernel dtb> setenv File_ramdisk <ramdisk> saveenv 3.

  • Page 112: Booting From An Sd Card

    Boot System Boot System 6.3.4 Booting from an SD Card 1. Make sure that the kernel, dtb, and ramdisk are saved in the SD card with FAT partition. 2. Configure the U-Boot environment variable: setenv File_uImage <kernel_image> setenv File_dtb <kernel dtb> setenv File_ramdisk <ramdisk>...

  • Page 113: Using The Persistent Memory Feature

    Boot System Using the Persistent Memory Feature The persistent memory means that the RAM's memory is not deleted during a reset. Power cycling, or by temporarily removing the power and then powering up the blade again, will delete the memory content. Persistent memory feature is enabled by default. This feature can be useful in many situations, including: Analyzing kernel logs after a Linux kernel panic ...

  • Page 114: Mvme2500 Specific U-Boot Commands

    Boot System Boot System MVME2500 Specific U-Boot Commands Table 6-1 MVME2500 Specific U-Boot Commands Command Description Print or set address offset base Print board info structure bdinfo Boot default, i.e., run 'bootcmd' boot Boot default, i.e., run 'bootcmd' bootd Boot from an ELF image in memory bootelf Boot application image from memory bootm...
  • Page 115 Boot System Table 6-1 MVME2500 Specific U-Boot Commands (continued) Command Description Flattened device tree utility commands Start application at address 'addr' Print online help help I2C sub-system Print header information for application image iminfo Extract a part of a multi-image imxtract Enable or disable interrupts interrupts...
  • Page 116 Boot System Boot System Table 6-1 MVME2500 Specific U-Boot Commands (continued) Command Description List and access PCI Configuration Space Show information about devices on PCI bus pci_info Send ICMP ECHO_REQUEST to network host ping Print environment variables printenv Boot image through network using RARP/TFTP protocol rarpboot Perform RESET of the CPU reset...

  • Page 117: Updating U-Boot

    Boot System Updating U-Boot To update the U-Boot, place the image in the RAM (address 0x1000000 in this example) before copying it to the SPI flash. The following procedure will replace the image in SPI bank 0: 1. Disable SPI write-protect in FPGA register Chapter 5, Memory Maps and Registers on page 2.
  • Page 118 Boot System Boot System MVME2500 Installation and Use (6806800L01T)

  • Page 119: Programming Model

    Chapter 7 Programming Model Overview This chapter includes additional programming information for the MVME2500. Reset Configuration The MVME2500 supports the power-on reset (POR) pin sampling method for processor reset configuration. Each option and the corresponding default setting are described in the following table.
  • Page 120 Programming Model Programming Model Table 7-1 POR Configuration Settings (continued) CONFIG CONFIG PINS CONFIG SELECTION REMARKS CFG_BOOT_SEQ[1:0] Boot LGPL3/LFWP, = BOOT SEQUENCE Sequence LGPL5 DISABLED Debug information from Memory the DDR SDRAM Debug DMA2_DACK0 controller is driven on Config the MSPCID and MDVAL signs (default) Debug information is not DDR Debug...
  • Page 121 Programming Model Table 7-1 POR Configuration Settings (continued) CONFIG CONFIG PINS CONFIG SELECTION REMARKS LA[22:20] UART_SOUT[0], Engineering TRIG_OUT, 11111111 Default (for future use) MSRCID[1], MSRCID[4], DMA1_DDONE_B[0] SerDes Ref SerDes expects a 100 TSEC_1588_ALAR Clock MHz reference clock M_OUT1 Config frequency (default). eTSEC2 Ethernet interface operates in ETSEC2...
  • Page 122 Programming Model Programming Model Table 7-1 POR Configuration Settings (continued) CONFIG CONFIG PINS CONFIG SELECTION REMARKS The eTSEC2 controller operates using the GMII protocol (or RGMII, if ETSEC2 TSEC2_TXD0, configured in reduced Protocol TSEC2_TXD7 mode) if its not configured to operate in SGMII mode.

  • Page 123: Interrupt Controller

    Programming Model Table 7-1 POR Configuration Settings (continued) CONFIG CONFIG PINS CONFIG SELECTION REMARKS SDHC Card Detect TSEC2_TXD_5 Not Inverted Polarity RAPID System Default RapidIO is not used Size Interrupt Controller The MVME2500 uses the MPC8548E integrated programmable interrupt controller (PIC) to manage locally generated interrupts.

  • Page 124: I 2 C Bus Device Addressing

    Programming Model Programming Model Table 7-2 MVME2500 Interrupt List Interrupt Usage Interrupt Line Interface to CPU Description (Schematic) IRQ9/ GPIO2 FPGA Interrupt NMI and 3 Tick Timer Interrupts IRQ10// GPIO3 FPGA Interrupt Power Interruption IRQ11// GPIO4 QUART_IRQ0 RTB Quart Interrupt C Bus Device Addressing The following table contains the I C devices used for the MVME2500 and its assigned...

  • Page 125: Ethernet Phy Address

    Programming Model Ethernet PHY Address The assigned Ethernet PHY on the MII management bus is shown in the following table. Table 7-4 PHY Types and MII Management Bus Address Ethernet PHY MIIM Function / Location PHY Types Port Address TSEC1 Gigabit Ethernet port routed to front panel BCM54616 Gigabit Ethernet port routed to front or back panel,...

  • Page 126: Quad Uart

    Programming Model Programming Model 7.6.3 Quad UART The MVME2500 console RS-232 port is driven by the UART built into the P20x0 QorIQ chip. Additionally, the MVME2500 has a Quad UART chip which provides four 16550 compatible UART. These additional UARTs are internally accessed through the LBC bus. The Quad UART chip clock input (which is internally divided to generate the baud rate) is 1.8432MHz.

  • Page 127: Clock Distribution

    Programming Model Cycle length in bus clocks 0011 - Three bus clock cycle wait state SETA External address termination 0 - Access is terminated internally by the memory controller unless the external device asserts LGTA earlier to terminate the access. TRLX Timing Relaxed 0 - Normal timing is generated by the GPCM.

  • Page 128: System Clock

    Programming Model Programming Model Table 7-6 Clock Distribution (continued) Clock Tree Device Clock Signal Frequency Source CLK_XMC1 100MHz ICS9FG108 DIFF QorIQ P20x0 SD_REF_CLK 100MHz ICS9FG109 DIFF TSI384 CLK_PCIEC1 100MHz ICS9FG110 DIFF TSI384 CLK_PCIEC3 100MHz ICS9FG111 DIFF CLK_88SE6121_PCIE_ 88SE6121 100MHz ICS9FG112 DIFF 100MHZ FPGA...

  • Page 129: Real Time Clock Input

    Programming Model 7.7.2 Real Time Clock Input The RTC clock input is driven by a 1MHz clock generated by the FPGA. This provides a fixed clock reference for the QorIQ P20x0 PIC timers which the software can use as a known time reference.
  • Page 130 Programming Model Programming Model MVME2500 Installation and Use (6806800L01T)

  • Page 131: Replacing The Battery

    Appendix A Replacing the Battery Replacing the Battery The figure below shows the location of the board battery. Figure A-1 Battery Location MVME2500 Installation and Use (6806800L01T)
  • Page 132 The battery provides seven years of data retention, summing up all periods of actual data use. Penguin Edge therefore assumes that there is usually no need to replace the battery except, for example, in case of long-term spare part handling.

  • Page 133: Related Documentation

    Technical documentation can be found by using the Documentation Search at or you can obtain electronic copies of https://www.penguinsolutions.com/edge/support documentation by contacting your local sales representative. Table B-1 Penguin Edge Documents Document Title Document Number MVME2500 Release Notes 6806800L02 MVME2500 Quick Start Guide...

  • Page 134: Related Specifications

    Related Documentation Related Specifications For additional information, refer to the following table for related specifications. As an additional help, a source for the listed document is provided. Please note that, while these sources have been verified, the information is subject to change without notice. Table B-3 Related Specifications Organization...
  • Page 135 Table B-3 Related Specifications (continued) Organization Document Serial ATA International Serial ATA (SATA) Specification Revision 2.6 Organization (SATA-IO) Serial ATA II: Extensions to Serial ATA 1.0 Revision 1.0 Trusted Computing TPM Specification 1.2, Level 2 Revision 103 Version 1.2 Group (TCG) USB Implementers Universal Serial Bus Specification (USB) Revision 2.0 Forum (USB-IF)
  • Page 136 Related Documentation MVME2500 Installation and Use (6806800L01T)
  • Page 138 Penguin Solutions is a trade name used by SMART Embedded Computing, Inc., a wholly owned subsidiary of SMART Global Holdings, Inc. Penguin Edge is a trademark owned by Penguin Computing, Inc., a wholly owned subsidiary of SMART Global Holdings, Inc. NXP and QorIQ are trademarks of NXP B.V.

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