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5
HDMI/Audio Blo C k
CDB_DA
]
HDMIB-HPDIN
HOT PLUGB
AG22
PCMADR [8]/CI_ A[8] T S0D ATA_ [4
]AM22
HOTP LUG B_H DMI2 0_5 V
H OTP LUG B_HDMI 20_ 5V NC
PCMADR[ 9] /CI _A[9] TS 0DATA _[ 5]
Not e : P ort A
N
PCMADR[ 1 0]/C I_ A[ 10] T S0D ATA_ [6]
C
PCMADR[ 1 1]/C I_ A[ 11] T S0D ATA_ [7]
HDMID-RX0N
RXD 0N NC
PCMADR[ 1 2]/C I_ A[ 12] T S0C L K
needs
HDMID-RX0P
R XD0 P
AJ2 2
PCMADR[ 13]/CI_ A[13 ] TS0 VA
LIDA L20
HDMID-RX1N
RXD 1N I2 S_ OUT _BC K
I2 S_ BCK_OUT
PCMADR[ 1 4]/C I_ A[ 14] T S0SYNC
HDMID-RX1P
R XD1 P I2 S_ OUT _MCK
I2 S _MCK_OUT
AJ2 3 AF 15
TS2 _CLK SPI _CSB
HDMID-RX2N
RXD 2N I2 S_ OUT _WS
HDMID-RX2P
I 2S _D ATA _OUT
I2S_ LRC K_ OUT
AJ2 0 AG 16
T S2 _D0 S PI _MOSI
shieldi ng
AUVAGAUVAG
HDMID-RX2P
R XD2 P I2 S_ OUT _SD
HDMID-CLKN
I2S _DAT A _OUT
AH2 0 AH15
T S2_ SYNC S PI_SCK
HDMID-CLKN
RXDCKN
U5RX
PCMW EN
grou nd al l
DCK
PCMCD/CI _CD
P
PCMRST/CI_R ST
HDMID-SDA
U4
AG21
PCMRE G/CI_CLK
HDMID-SDA
DDCDD_D A
signa l pair
HDMID-HPDIN
HOTPLU GD GPI O_PM14
PCMIO WR /CI_ WR
PCMW AIT /CIWACK
MHL_CAB L E_D ET
AG17
HOTP LUGD_HDMI 2 0_ 5V
Y
PCM2 _RE SET
PCM2 _ WA IT_N
2
3D_F L AG
K4
D
S
C
P
D I
6
F
NAND Flash
I
_
N
SPDI F_ OUT
5
NAND-CE1Z NAND-A LE
G 2
S P
NAND-CE 1Z
N AND_ AL E/ EMMC_ IO15 /SD IO_D[1]
H
D
NAND-WEZ
NAND_ WPZ/ EMMC_ IO17 /SD IO_D[ 2]
NAND-W EZ N AND-W PZ
D
F
I
_ O
NAND-WPZ
NAND_CEZ/ EMMC_IO9
M
U
NAND-REZ
NAND_CLE/ EMMC_ IO14 /SD IO _D[ 0]
T
NAND-ALE
NAND_REZ /EMMC_I O1 0
NAND-A LE N AND-RE Z
I
NAND-CEZ N AND-WEZ
0
C77
NAND-CEZ
NAND_WEZ/ EMMCI O16/ SDI O_D [3 ]
NAND-CLE NAND-RBZ
NC/3 3pF
NAND-CL E
NA ND_R BZ/ EMMC_ IO11
-
NAND-RBZ
NAND_CEZ 1/EMMC_ IO12 /SD IO_CMD
MSD6 A8 2 8/M
NAND-DQS
NAND_DQS/ EMMC_ IO8 VIF P
DIF P
R
SD6 488
SDIO _C LK
DIFM
X
U
1 EMMC_IO1 3/SDI O_C LK VIFM
D IFM
0
1
NAND-AD
0D1
0
D3NAND_AD0/ EMMC_IO 6
P
NAND_ AD1 /EMMC_I O7
0
NAND_ AD2 /EMMC_I O2
C
NAND_ AD3 /EMMC_I O1 IF_A GC
IF- AGC
C
NAND-AD
5A2
6
A3NAND_ AD5/ EMMC_I O 3
A K 8
NAND_ AD6 /EMMC_I O4 TGPI O0
WIFI _CTL
6
H
AM4
D
TGPI O2/SCK 1
T _SCL
M
TGPI O3/SDA 1
T _SDA
I
0
-
NAND-AD[ 7: 0]
R
X
MSD6 A82 8/MSD 648 8
1
N
H
PCMCIA
D
M
I
0
CHIP_CONFIG[3: 0] {P AD_LED1, P AD_P M_ SPI_DI,P AD_P M_LED0, PAD_P W M_P M}
-
R
X
U
1
N
R
X
IC CONF IGUR ATI ON S ELECT ION
A
1
N
1
+3.3 V _Sta ndb y
L
I
R175 4. 7K Ω
N
E
0
R179 NC/4 .7KΩ
PM_ LED1
_
R958
I
N
_
R181 4. 7K Ω
S PI-SDI
1
R183 4. 7K Ω
L
R959 NC/4 .7KΩ
PM_ LED0
H
0
R960 NC/4 .7KΩ
D
PM_P WM
M
R185 4. 7K Ω
I
0
B
-
CHIP _CONFI G[ 3: 0]
A
R
{PAD _PM _LED 1, PAD _PM _ SP I_DI , PAD _PM _LED 0, P AD_ PWM_ PM}
X
H
1
Val ue Mo de
2
Descrip tio n
P
4'b1 0 00 S B51 _ExtS PI
8
5 1 bo ot fro m S PI
P
4'b1 0 01 HEMCU_E xt SPI
C
ARM bo ot fro m S PI
R
M
X
4'b1 0 10 HEMCU_ROM _ EMMC ARM b o ot fr o m R OM; outer st orag e is eMMC
D
C
A
A
4'b1 0 11 HEMCU_ROM _NAND ARM bo ot fro m R OM; out er st orag e is N AND
T
1
A
P
4'b1 1 00 DBUS
[
f or test onl y
0
4'b0 0 00 S B51 _ExtS PI +Aut hentic ati on 5 1 bo ot fro m S PI wi th ARM a uthe ntic ati on
]
L
/
I
4'b0 0 01 HEMCU_E xt SPI +A ut he ntic ation ARM boo t fr o m SPI wit h au then tica tion
C
I
N
4'b0 0 11 HEMCU_ROM _NAND +Aut h en ticati o n ARM b o ot from R OM wit h au th entic atio n; o ut er st or ag e is NAND
_
E
_
D
A
I
T
N
A
[
_
0
1
]
R
P
H
C
D
M
D
M
A
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0
T
A
-
R
[
X
1
2
]
N
/
C
R
I
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_
D
A
2
A
T
N
A
L
[
1
I
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]
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7
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0
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2
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2
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[
N
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2
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1
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1
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8
M
P
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0
D
-
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[
K
3
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]
/
C
R
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A
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[
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3
H
]
D
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0
A
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T
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[
K
]
2
P
P
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D
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[
D
4
]
M
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0
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-
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C
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A
T
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A
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[
4
C
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C
S
1
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0
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[
S
3
]
D
A
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C
D
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[
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A
/
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0
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1
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0
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P
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I
[
N
4
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]
P
O
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A
T
A
A
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[
I
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6
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]
/
_
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C
U
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T
_
_
0
D
A
R
T
A
A
A
[
3
6
]
A
K
T
S
6
1
D
C
A
2
T
A
3
5
_
[
UGA _H
HOTP L
5
5V
DMI2 0_
]
H
T
D
S
M
1
I
B
D
A
-
R
T
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A
0
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N
[
7
T
]
2
A
T
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6
_
S
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P
N
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C
A
P
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R
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[
0
-
]
L
/
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C
D
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R X
A
[
0
0
N
R
]
X
B
0
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1
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C
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P
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N
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0
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[
R
1
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B
]
0
/
P
C
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A
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[
H
1
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N
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[
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7
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D
P
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[
2
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]
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R
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1
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[
2
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]
D
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0
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5
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[
R X
3
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V 2
/
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5
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L
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4
HD M I 0 - R X 0 N
R X A 0 N LI N E _ I N _ 0 L
V G A _ A U L _ I N
HD M I 0 - R X 0 P
R X A 0 P L I N E _ I N _ 0 R
V G A _ A U R _ I N
C
2
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C15 310 0nF
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1
1
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Ω
/
1
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M
H
z
P
C
M
D
A
T
A
[
7
]
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C
I
_
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A
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A
[
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]
T
S
1
D
A
T
A
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[
6
]
T
S
_
C
L
K
R
1
7
5
7
N
C
/
1
0
0
Ω
T
S
2
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V
L
D
S
P
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_
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R
8
1
2
40
3
2
1
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