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12. IC PIN CONFIGURATION
12.1
Logic Symbol Chart
Positive Logic
Negative
Logic
Truth T
able
Pos
itive
Log
ic
Negat
ive
Log
ic
T
ru th
T
able
Ve,:;
r
t
WE
,/
Vee
cs,
NOT
NANO
INVERT
-OR
A
B
C
As
As
A
-{)»-
c
A
{>--
c
~
C=A
C=A
L
L
H
~
=C}-
c
~D-c
L
H
H
H
L
H
C
=
AB
C
=
A
+
B
H
H
L
As
3
22
A•
A5
5
24
A9
A•
4
2
1
A,
6
23
A11
WE
A3
5
20
OE
AJ
7
22
OE
BUFFER
OR
INVER
T-
NANO
A
B
C
A2
6
19
A,o
A2
8
21
A,o
A
-[>-
c
AVG
~
C=
A
C
=A
:=D-c
~D--c
L
L
L
L
H
H
H
L
H
C
=
AB
H
H
H
C
=
A
+
B
A,
7
18
cs
20
cs,
cs
17
VO•
Ao
VO.
As
16
vo,
vo,
AND
INVERT-NOR
B
C
A
:
D-
c
L
L
L
~D-c
L
H
L
H
L
L
NOR
INV ERT-AN
D
A
B
C
~
=[>-
c
~D-c
L
L
H
L
H
L
H
L
L
1/
0
2
1/
0 6
1
/
02
vo,
o,
GND
vo,
C=
AB
C=
A
+
B
H
H
H
C
=
A+B
C
=
AB
H
H
L
IC 102
RO
M
IC103
STATIC RAM
IC301
STATIC RAM
"'
'
(PE
W
l10
11ZA) KX-
W5 0TH
(HM61 16 P-4)
(HM6264L
P)
'\.
_..
-./
(PEWI 1021 ZA
)
KX-W60
TH
(KX-W50
TH
only)
(KX-W60TH
only)
12.2 Pin
Configuration (Top View)
(FUNCTION TABLE)
0
E
XTAL
RD
~
~
~
DR
IC
101
C
PU
}'""
RES
BA
(HD
6303X P)
STBY
Do
NMI
o,
OUTPUTS
0,
D:,
BCD
INPUTS
DECIMAL OUTPUTS
No.
A
B
C
D
0
1
2
3
4
5
6
7
8
9
0
L
L
L
L
L
H
H
H
H
H
H
H
H
H
1
H
L
L
L
H
L
H
H
H
H
H
H
H
H
2
L
H
L
L
H
H
L
H
H
H
H
H
H
H
3
H
H
L
L
H
H
H
L
H
H
H
H
H
H
4
L
L
H
L
H
H
H
H
L
H
H
H
H
H
5
H
L
H
L
H
H
H
H
H
L
H
H
H
H
0.
:
I
OU"""
o.
p,.
0.
p,.
'
NMI
:
Non M
aska ble
Interr
upt
~
--;;;?
~
A2
RD:
Rea
d
Strobe
IC105
Ps,
Po,
A,
W
R:
Writ
e
Stro
be
(TC40H042P)
p.,
Ao
RES: Rese
t
p,,.
1
Aa
A,
MPo,
MP,:
Mode
Pro
gra
m
~
=
Don
t
care
6
L
H
H
L
H
H
H
H
H
H
H
H
H
H
7
H
H
H
L
H
H
H
H
H
H
H
L
H
H
8
L
L
L
H
H
H
H
H
H
H
H
H
L
H
9
H
L
L
H
H
H
H
H
H
H
H
H
H
L
10
>f
H
X
H
H
H
H
H
H
H
H
H
H
H
15
~
'>(
H
H
H
H
H
H
H
H
H
H
H
H
LIA
:
Load
Instru ction Re gist er
A9
BA
:
Bus Ava ilable
Po,
Pa,
A11
p
..
AIJ
Al5
-58
-
-59-
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