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IC BLOCK DIAGRAM & DESCRIPTION
IC831 PT6313-S(LED Driver)
28
DIN
DOUT
27
CLK
1
Interface
STB
2
OSC
26
Pin Name
SG1/KS1 to SG8/KS8
SG9/GR8 to SG12/GR5
GR4 to GR1
Control
Serial
Data
Display Memory
Timing Generator
OSC
Key Matrix Memory
3
K1
I/O
Description
Clock Input Pin
CLK
I
This pin reads serial data at the rising edge and
outputs data at the falling edge
Serial Interface Strobe Pin
The data input sfter the STB has fallen is processed
STB
I
as a command
When this pin is "HIGH" CLK is ignored
Key Data Input Pins
K1 to K2
I
The data sent to these pins are latched at the end
of the display cycle
VSS
-
Logic Ground Pin
VDD
-
Logic Power Supply
High Voltage Segment Output Pins
O
Also acts as the Key Souree
VEE
-
Pull Down Level
O
High voltage Segment/Grid Output Pins
O
High Voltage Grid Output Pins
Oscillator Input Pin
OSC
I
A resistor is connected to this pin to determine the
oscillation frequency
Data Output Pin (N-Channel, Open Drain)
DOUT
O
This pin outputs serial data at the falling edge of
the shift clock (starting from the lower bit)
Data Input Pin
DIN
I
This pin inputs serial data at the rising edge of the
shift clock (starting from the lower bits)
Dimming Circuit
4
6
5,25
15
K2
VDD
GND
VEE
- 30 -
7
SG1/KS1
8
SG2/KS2
9
SG3/KS3
Segment
10
SG4/KS4
Driver/
11
SG5/KS5
12
SG6/KS6
Grid
Driver/
13
SG7/KS7
14
SG8/KS8
Key Scan
16
SG9/GR8
Output
17
SG10/GR7
18
SG11/GR6
19
SG12/GR5
23
GR1
22
GR2
Grid
Driver
21
GR3
GR4
20
Pin No.
1
2
3,4
5,25
6,24
7 to 14
15
16 to 19
20 to 23
26
27
28
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