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Table of Contents
Summary of Contents for Xaoc Devices Drezno II
- Page 1 binary conversion komputor ii Model of 1989 operator’s manual rev. 1989/2.0...
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Page 2: Installation
+12V and +5V rhythms, etc. Even on its own, Drezno II can be power lines. used for waveshaping of analog signals and voltages based on their binary representation. -
Page 3: Binary Code
(when bit 0 is affected), and vice versa: small changes in signal amplitude often affect only the lower bits, while the highest bits react mostly to big changes. fig. 1: connecting drezno ii to other leibniz components, e.g. lipsk... - Page 4 2: drezno ii interface...
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Page 5: Module Overview
Leibniz data output. It MODULE OVERVIEW accepts gate, trigger, and clock signals, and re- Drezno II (fig. 2) consists of two sections that acts to the rising edge. can work independently or as a linked pair. - Page 6 THE PRINCIPLE OF OPERATION range and a narrower 10+ octave range (128 The ADC section of Drezno II converts analog semitones) by ignoring the lowest significant signals to digital numbers. This process con- bit and scaling everything down by 1/2.
- Page 7 Feeding a time-varying signal to the ADC in- and 0V is being quantized, it falls exactly at put of Drezno II results in the bit outputs the middle of the scale, resulting in 128. The changing in response (fig. 4 and 5). At each...
- Page 8 10000000, which means 128 in the decimal system. This is the The DAC section of Drezno II converts digital middle number of the 0...255 range of num- numbers to voltages. It features a clock-driv-...
- Page 9 Please keep in mind that the above solution only compensates for the conversion latency. The internal clock of Drezno II is nearly 2MHz, It will not magically help if your clock's rising which helps handle wideband signals without edge arrives after the change of input signal.
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Page 10: Patch Examples
+10.58V when the code is 11111111. stalled at the back), processing of signals and There is nothing wrong with clipping when it voltages through ADC+DAC of Drezno II causes is used intentionally. For example, setting the only a subtle 8-bit quantization effect. Modify-... - Page 11 6, and replacing bit 6 with bit 4 binary outputs (compare figs 4 and 5). • Generating trigger patterns: feeding an LFO • Drezno II can be combined with other logic or any repeating CV into the ADC yields gate modules (like AND, OR, XOR, etc.), operating patterns (produced from the bit outputs) on individual bits or whole 8-bit numbers.
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Page 12: Warranty Terms
WARRANTY TERMS FEATURES Universal XAOC DEVICES WARRANTS THIS PRODUCT TO BE FREE OF DEFECTS IN MATERIALS OR WORKMANSHIP AND TO CONFORM WITH THE SPECIFICATIONS AT THE TIME OF SHIPMENT FOR ONE YEAR FROM THE analog-to-digital DATE OF PURCHASE. DURING THAT PERIOD, ANY MALFUNCTIONING OR DAMAGED UNITS WILL BE and digital-to-an- REPAIRED, SERVICED, AND CALIBRATED ON A RETURN-TO-FACTORY BASIS.