Table of Contents
Advertisement
the
top of
the front
panel's
RF Level
control.
The wiper
of the
RF Level control
is then
applied
to
the AM MOD
+
DC REF input
of
the Wideband Amplifier board
(A17
A2).
The de component on
thjs
input controls
the
average power
output, and the
ac component
provides
AM.
On
systems
under Remote
option
control,
the
wiper of the
RF Level
control
is
connected to a
pro-
grammable attenuator on the
IEEE!RS-232 Interface
board
and t hen
to the AM MOD
+
DC REF input
of
the Wide band Amplifier. T
his
allows
remote
control
of
the
RF output
power.
2.8
FREQUENCY COUNTER
Three possible
signal sources
can
be
connected to the
frequency
counter.
Two
of the signals are internal to
the
system:
one
is used
to
determine
the error fre-
quency
of
the
monitored carrier
(IF/BFO),
and
the
other
is used to decode the off-the-air
signal
sequences.
The third input
is
from
the external
input port
(Counter
In) on the front panel.
A block diagram of
the
frequency counter
is
shown
at the end
of
the
section
in
Figure
2-8.
The
Receiver's
(AS) DEMOD CAL AUDIO
output,
which is used for
signal-sequence
decoding, is routed
through
a gai
n-selectable amplifier and the
Scope/
DVM Control
board (A7) and to the
Front-Panel
Interface
board
(A15).
A
switch
on the
Front-Panel
Interface board
routes this
signal or
the signal
from the
front panel's
external
input
port to
the
range
atten-
uator.
The range
attenuator
provides stepped
sensi-
tivity
settings
according to the
setting
on
the
front
panel's
vertical
range
switch.
An
amplifier following
the
range
attenuator amplifies and
limits
the
signal
amplitude for the frequency-counter
input.
A
select
switch
on
the Processor Interface board
(Al
l
}
routes either the frequency-counter output
from
the
Front-Panel Interface board
or the
IF/BFO
out-
put
from
the
Receiver
to the frequency-counter
cir-
cuitry.
The
signal selected
is determined by
the
system's
operating
mode
and
controlled
by
the
pro-
cessor.
The
frequency
counter uses two
different
measur-
ing
techniques: the direct
count and the
reciprocal
count.
A 16-bit gated accumulator
is
used
in
the direct-
count
method
to
determine the
input
frequency. Gate
times
from 1
msec
to 10
sec
are
user-selectable or
automatically selected
by the
processor
to
give
the
maximum possible
resolution
.
The
gate
times are
derived from the
SYN'TH 1 KHz
signal
coming
from
the Audio
Synthesizer
board
(AlO).
The
same
16-bit
accumulator
is
used in
the
recip-
roca l-cou
nt
method.
The
accumulator counts
the
number
of clock cycles coming from
a clock generator
during
one
period
of
the unknown
signal. Clock
rates
from
10
MHz
to
100 kHz
are user-selectable
or
auto-
matically selected
by
the
processor to
give the
maxi-
mum possible resolution.
The
clock
rates are
derived
from
the
SYNTH
10 MHz signal
coming from the
RF
ynthesizer
module
(A9}.
2-7
The
16-bit
frequency-counter
output
is
transferred
directly to the processor
bus
through
a
peripheral-
interface adapter
(PIA).
The
processor,
in
turn,
adjusts
the data for the
gate time used
and then processes
the
information
to
obtain
the
required
frequency
display.
2.9
DIGITAL VOLTMETER (DVM)
The
DVM
circuitry
allows
t he
processor
to
access
many
voltages
throughout the
system.
From this
information,
the
processor is able to determine
and
display parameters
such
as
output
power
level,
mod
-
ulation level, input
power
level, etc.
In addi
tion,
an
external
voltage applied
to
the
DVM input port
on
the
front
panel
can be measured and
displayed.
A
block diagram of the DVM function
is
shown at
the
end
of
the
section
in figure 2-9.
Internal
voltage
measurements
are selected
and
ranged
over
two
decades
by
t
he
internal DVM-select
switch
and the Xl.O/X0.1
attenuator,
respectively, on
the
ScopeiDVM
Control
board
(A7).
The resulting 0
to 1-Vdc
signal
is routed
to the
internal/external DVM-
select
switch
on
the
Processor
Interface
board
(A
ll
}
which applies the voltage
to
the
AID
converter.
The
A/
D
converter
converts
the input voltage
into
a
10-bit
digital
number
which
is
input to
the
processor.
One
of
eight internal
voltages
may be
selected
for
measure-
ment as required by
t
he
processor to
determine dis-
play data.
Inputs
to the
AID
must be less than
1
Vdc;
therefore,
with
the
decade-ranging
attenuator
(Xl.O/
XO.l)
,
the
maximum input
voltage to the internal
DVM
is
10
Vdc.
The Xl.O
position
gives
improved
res-
olution
for
reading
voltages
less
than
1
Vdc. To keep
CRT information
current, each of
the
required
mea-
surements
is
made in
sequence,
at
an
approximate
rate
of thirty per
second.
T
he
following signals can be
connected
to
the
DVM
input:
•
Two
modulation
signals
(MOD
CAL
AUDIO
and
CARRIER
+
MOD LVL)
and a
demodulated
sig-
nal
(DEMOD
CAL
AUDIO} are made available to
the peak
detectors.
Measuring the
positive
and
negative
peaks
of the selected
signal
enables the
processor to determine the level
of
modulation.
•
A
low-pass
filter (LPFL) removes the ac compo-
nent
from
the
CARRIER
+
MOD LVL
signal so
that the
output level of
the
generated RF
can
be
determined. (See
paragraph
2.3.4.)
•
The
SIG STRENGTH
VOLTAGE line
from
t he
logarithmic amplifier on
the Receiver board
(A8)
provides
a
de level proportional to
the
strength
in
dBm of
the
on-channel
received
signal.
•
The
RF INPUT POWER signal line from the
RF
Input
module provides
the
processor
input for the
internal wattmeter (paragraph
2.4).
Inputs for
the
external wattmeter
element
(EXT
FWD
PWR and
EXT RFL
PWR)
from
the front panel's
port
pro-
vide
the in format ion for the
t>xternal-wattmeter
display.
Advertisement
Table of Contents
Troubleshooting
