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4-2. Serial Interface
Parameter
SCLK clock period
SCLK "L" pulse width
SCLK "H" pulse width
SCLK rise time
SCLK fall time
SYNC "H" pulse width
SYNC rise time
SYNC fall time
SYNC delay time
SYNC "L" pulse width
SYNC → SCLK setup time
SDIN setup time
SDIN hold time
SDIN rise time
SDIN fall time
Note) T
=-40 to 85°C, DVDD=3.3±0.3V, Capacitor load=50pF
OP
Symbol
Min.
430
Tsclk_period
200
Tsclk_low
200
Tsclk_high
Trise_sclk
Tfall_sclk
100
Tsync_high
Trise_sync
Tfall_sync
0
Tdelay_SYNC
100
SYNC_low
50
Tsetup_SYNC
50
Tsetup_SDIN
50
Thold_SDIN
Trise_din
Tfall_din
-40-
YMF795
Typ.
Max.
Unit
ns
ns
ns
20
ns
20
ns
-
ns
20
ns
20
ns
ns
ns
ns
ns
ns
20
ns
20
ns
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