Aiwa HV-FX5700 Service Manual page 41

IC, µPD16311GC-AB6
Pin No. Pin Name
1 ~ 4 SHTL1 ~SHTL4
5 DATA OUT
6 DATA IN
7 IC
8 CLOCK
9 FLD ENV
10 KEY1
11 KEY2
12 KEY3
13 KEY4
14 Vdd
15 ~ 26 P1 ~ P12
27 ~ 32 P13 ~ P16
33 Vdd
34 Vcc
35 NC
36 ~ 44 G1 ~ G9
45 Vdd
46 ~ 48 NC
49 OTPB LED 'H'
50 NC
51 Vss
52 OSC
I/O
I 4-bit general-purpose input pins
Serial data output.
O Lower bits are first output synchronized with the trailing edge of shift clock. (The
output is Nch open drain.)
Serial data input.
I
Lower bits are first input synchronized with the leading edge of shift clock.
– Must always be set to open (set to VDD voltage)
I Serial data is input at the leading edge, and data is output at the trailing edge.
The leading or trailing edge initializes the serial I/F to stand by for receiving a
command. The data input after the STB trailing edge is processed as a command.
When command or data is being processed, the processing is interrupted and the serial
I/F is initialized. When STB is "H", CLK is ignored.
I
I
Data input to these pins is latched in the final stage of display cycle.
I
I
5 V ± 10%
–
O Exclusively used for segment outputs
O Segment/grid outputs swicthable
5 V ± 10%
–
– Vdd – 35 V MAX.
Not connected
O Exclusively used for grid outputs
5 V ± 10%
–
O Not connected
O OTPB LED Driver (OTPB mode "H")
O Not connected
– Connected to system ground
– For the connection of resistors that determine the oscillation frequency
57
Description