Samsung LNT4669F Training Manual page 59

Ⅱ. Inside of Peony2
SCALER: SVP-LX64
The CPU can write OSD data to the OSD memory located in the frame buffer at any time.
When the frame buffer allocates one area for display, the CPU can write new OSD data into
another area of the frame buffer for future display. The CPU can also choose the OSD area for
current display. All OSD data on the screen is treated as one block in the frame buffer.
The block is in rectangular shape and is defined by four registers. These four registers describe
the horizontal start position, the horizontal end position, the vertical start position, and the
vertical end position of the OSD block on the screen. An OSD block consists of a pixel bitmap
of the OSD, 4/8-bits per pixel. There are a total of 16 colors for OSD display.
There is a 16x29 bits Look-Up table in the SVP™LX. Each 4-bit OSD index corresponds to a
29-bit color attribute, including 24 bits for RGB true color data and 1 bit for the blink function,
which enables/disables color blinking. A register controls the blinking frequency. Another 4
bits are defined as a blend factor, which blends one of the 16-transparency degrees of current
OSD color with the Understand OSD.