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Trademarks EVOC is a registered trademark of EVOC Intelligent Technology Co., Ltd. Other product names mentioned herein are used for identification purposes only and may be trademark and/or registered trademarks of their respective companies.
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Safety Instructions Please read this manual carefully before using the product; Leave the board or card in the antistatic bag until you are ready to use it; Touch a grounded metal object (e.g. for 10 seconds) before removing the board or card from the anti-static bag;...
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Contents Chapter 1 Product Introduction..................1 Overview ........................1 Mechanical Dimensions, Weight and Environment ............1 Power Feature .......................1 Chapter 2 Installation....................2 Product Outline......................2 Assembly Instructions ....................3 Locations of Connectors ....................4 Structure ........................5 Dip Switch Setting......................6 Reset Button .........................6 Serial Port ........................6 SFP Optical Fiber Connector ..................7 Network Indicator......................7 System Operating Status Indicator................8 Connector for CPLD Burning..................8...
1. Remove the upper cover; 2. Remove the bottom cover; 3. Remove the radiator. Warning! Please adopt appropriate screws and proper installation methods (including board allocation, CPU and heat sink installation, etc); otherwise, the board may be damaged. VPX-6424 - 3 -...
Serial Port The board provides one three-wire RJ45 RS-232 serial port, which is used to debug the CPU MPC8377 on-board. The pin definitions are listed as follows: Signal Name COM1 - 6 - VPX-6424...
The board provides twelve sets of dual-layer green LEDs (D1 ~ D12 corresponds with 24 LEDs), which indicate the Link and Active status for the 24-lane 10/100/1000Mbps network. The detailed functions are listed as follows: Indicator Status Status Indicator Unlinked LED1, LED2..LED24 Linked Blink LAN activity status indicator VPX-6424 - 7 -...
Un-electrified or system error SYSTEM LED Green Normal operation Blink System is booting Normal LAN function FAULT LED Yellow Un-electrified or network function error Connector for CPLD Burning Signal Name Signal Name JTAG1 (Pitch: 2.0 mm) - 8 - VPX-6424...
RTS# VPX Backplane Connector Pin definitions for P0: Wafer Type POWER POWER POWER -12_Aux SYSRST# NVMRO GAP# 3.3V_Aux +12_Aux DIFF TRST# DIFF REFCLK- REFCLK+ RESBUS- RESBUS+ Note: SE – Single End Signal. DIFF – Differential Signal. VPX-6424 - 9 -...
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System reset, all the slots are interconnected; reset switch SYSRST# on panel Non-volatile read-only memory, all the slots are NVMRO interconnected REFCLK+/- Reserved pin, all the slots are interconnected RESBUS+/- Reserved pin, all the slots are interconnected Undefined pin in VPX standard - 10 - VPX-6424...
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Fat Pipe control channel 3 receives differential signal CP04_TX[1-4]+/- Fat Pipe control channel 4 sends differential signal CP04_RX[1-4]+/- Fat Pipe control channel 4 receives differential signal VBAT Battery voltage SYSCON# System control signal, input HGE_MDC, 10 GbE network control bus HGE_MDIO Undefined - 12 - VPX-6424...
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CPtp08_DA+ CPtp08_DD- CPtp08_DD+ CPtp08_DC- CPtp08_DC+ Detailed instructions for signals: Signal Name Description Digital ground CPtpxx_DA+/-, CPtpxx_DB+/- Thin Pipe xx control channel differential signal CPtpxx_DC+/-, CPtpxx_DD+/- ETH_TD+, ETH_TD-, ETH_RD+, System controller network management ETH_RD-, ETH_LINK, ETH_ACT Undefined VPX-6424 - 13 -...
Note: Bit 7 is msb while Bit0 is lsb. Table 3-4 Hardware Version Register Content Remark BR[3:0] is used to indicate the hardware version for BR[3:0] single board. LR[3:0] is used to indicate the logical (CPLD) version. LR[3:0] - 18 - VPX-6424...
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Table 3-6 Bit Definitions for Watchdog Control Register Content Remark Watchdog Enable. When watchdog is disabled, both of the watchdog clock pre-scale counter and watchdog counter will be disabled and hold the current counter values. 0: Disable Watchdog; 1: Enable Watchdog. VPX-6424 - 19 -...
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Watchdog Timer Count Register is read only; its value is the current counter value of the watchdog timer. Table 3-9 Watchdog Timer Count Register Watchdog Timer Count Register Register 0xF1000003 Address WTC3 WTC2 WTC1 WTC0 Content Default Value Note: Bit 7 is msb while Bit0 is lsb. - 20 - VPX-6424...
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Reading this register will always get a return value of 0. System Status LED Register (SSLR) System Status LED Register reflects the status of the kernel system and the network function. VPX-6424 - 21 -...
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When SESL = 1, the network switch chip error occurs. System Reset Register (SRR) System Reset Register realizes the reset operation when the software is operating. Table 3-15 System Reset Register System Reset Register Register 0xF1000006 Address Content Default Value - 22 - VPX-6424...
C1 are used to output IPMI I C bus. The following devices are connected with I C2 bus: Temperature monitoring chip TMP75 with the address 0x48; EEPROM, saving the IPMI information with the address 0x51; VPX-6424 - 23 -...
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