Sony VAIO PCV-RX270DS Reference Manual page 89

Chip Configuration Sub-Menu
SDRAM Configuration
SDRAM CAS Latency
SDRAM RAS to CAS Delay
SDRAM RAS Precharge Time
SDRAM Cycle Time (Tras, Trc)
SDRAM Page Closing Policy
CPU Latency Timer
CPC
Graphics Window Size
Video Memory Cache Mode
AGP 4X Support
Memory Hole At 15M-16M
PCI 2.1 Support
High Priority PCI Mode
Onboard PCI IDE Enable
* Enabled only when Configuration is set to User Define.
CMOS Setup Options
[By SPD]
User Define
*
[3T]
*
[3T]
*
[3T]
[6T, 8T]
5T, 7T
[All Banks]
One Bank
[Enabled]
Disabled
[Enabled]
Disabled
[64MB]
32MB
[UC]
USWC
[Enabled]
Disabled
[Disabled]
Enabled
[Enabled]
Disabled
[Enabled]
Disabled
[Both]
Primary
Secondary
Disabled
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