Atmel ATA5278 Manual
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Atmel ATA5278 Manual

Atmel ATA5278 Manual

Stand-alone antenna driver
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Features
•
SPI for Microcontroller Connection with Up to 1 Mbit/s
•
Internal Data Buffer for Timing-independent Data Transmission
•
Programmable Driver Current Regulation
•
One-chip Antenna Driver Stage for 1A Peak Current
•
LF Baud Rates Between 1 kbaud and 4 kbaud
•
Quick Start Control (QSC) for Fast Oscillation Build-up and Decay Timing
•
Integrated Oscillator for Ceramic Resonators
•
Power Supply Range from 7.5V to 16V Direct Battery Input
(Up to 28V With Limited Function Range)
•
Amplitude Shift Keying (ASK) Modulation
•
Phase Shift Keying (PSK) Modulation
•
Carrier Frequency Range from 100 kHz to 150 kHz
•
Operational Temperature –40°C to +105°C
•
EMI and ESD According to Automotive Requirements
•
Highly Integrated — Less External Components Required
Applications
•
Hands-free Car Access (Passive Entry/Go)
•
Tire Pressure Measurement
•
Home Access Control
•
Care Watch Systems
Benefits
•
Diagnosis Function and Overtemperature Protection
•
Load Dump Protection Up to 45V for 12V Boards
•
Power-down Mode for Minimum Power Consumption
1. Description
The ATA5278 device is an integrated BCDMOS antenna driver IC dedicated as a
transmitter for Passive Entry/Go (PEG) car applications and for other hands-free
access control applications.
It includes the full functionality of generating a magnetic LF field in conjunction with an
antenna coil to transmit data to a receiver in a key fob, card or transponder. A micro-
controller can access the chip via a bi-directional serial interface.
Stand-alone
Antenna Driver
ATA5278
Rev. 4832C–RKE–02/06

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Summary of Contents for Atmel ATA5278

  • Page 1 • Power-down Mode for Minimum Power Consumption 1. Description The ATA5278 device is an integrated BCDMOS antenna driver IC dedicated as a transmitter for Passive Entry/Go (PEG) car applications and for other hands-free access control applications. It includes the full functionality of generating a magnetic LF field in conjunction with an antenna coil to transmit data to a receiver in a key fob, card or transponder.

  • Page 2: Pin Configuration

    OSCI OSCO NRES CLKO Boost S_CS PGND1 converter Oscillator regulator S_CLK PGND2 control Voltage interface PGND3 S_DI ATA5278 S_DO CBOOST HS driver Control DRV1 status Driver control LS driver register logic Current and LF data buffer zero crossing VSHUNT sensing...
  • Page 3 ATA5278 Table 2-1. Pin Description Symbol Function PGND1 Boost transistor ground PGND2 Boost transistor ground PGND3 Boost transistor ground Driver voltage supply input DRV1 Antenna driver stage output CBOOST External bootstrap capacitor connection QSC transistor-gate driver-stage output VSHUNT Antenna current-shunt resistor connection...

  • Page 4: Functional Description

    SPI activity and can be monitored with the MODACTIVE pin. Power-down Mode The ATA5278 should be kept in power-down mode as long as the LF channel is not used, because not only is the current consumption minimal, but the internal logic is also reset. The antenna driver stage is in high impedance mode.
  • Page 5 Legend: X = do not care Z = high impedance Note that if command 4 is omitted and only the chip-select line is disabled, the ATA5278 stays operational (i.e., the oscillator keeps running, an eventually running LF data modulation is not interrupted).
  • Page 6 In case the microcontroller is not able to communicate properly with the ATA5278 or any other disturbance has occurred, it can trigger a reset (like a power-on-reset, POR) in the chip by pull- ing the NRES pin to ground, which will bring the logic back to the startup state, i.e., all configurations are at default and the IC is in power-down mode.
  • Page 7 This interface prevents possible compensa- tion currents, as the control logic of the ATA5278 is supplied by the internal 5V regulator. It is capable of handling I/O voltages between 3.15V and 5.5V, determined by the voltage applied to the VIF pin.
  • Page 8 The control interface of the ATA5278 consists of an eight-bit synchronous SPI. It has a clock input (S_CLK) which supports frequencies up to 1 MHz, a chip select line (S_CS) which enables the interface, a serial data input (S_DI) and a serial data output (S_DO). The output pin is of a tristate type, which will be set to high-impedance state as soon as the chip-select line is dis- abled.

  • Page 9: Spi Commands

    Output bit 1 Second Possible Serial Timing, S_CLK Polarity 1, Phase 1 SPI Commands The microcontroller can access the following functions of the ATA5278 via the SPI: • Read from/write to configuration register 1 • Read from/write to configuration register 2 •...
  • Page 10 SR: 0 system not ready, 1 system ready RTS: 0 modulator not ready, 1 modulator ready D6..0: number of logical LF bits to be written into buffer HB7..0: LF half bits (2 for one logical bit) B7..0: input bit from the previous controller data word ATA5278 4832C–RKE–02/06...

  • Page 11: Command Description

    ATA5278. Each command consists of one or more data words which the controller has to trans- fer to the SPI of the ATA5278. An SPI data word is always eight bits in width and has to be transferred starting with the least significant bit (LSB).
  • Page 12 • The status register of the ATA5278 can be read out with command 9. As soon as the internal diagnosis stage detects a fault, it is stored in the status register until a fault reset command is given or a power-on-reset occurs. Note that the power stages of the chip are disabled as long as a power stage fault (i.e., a short-circuit at the driver stage output pin, open load,...
  • Page 13 3.10 LF Data Modulation The LF modulator stage of the ATA5278 is fed with data from the LF data buffer. It is started after a successfully received SPI command 11. Two half bits are loaded at a time and brought...
  • Page 14 LF data in the buffer. Taking the same data sequence as in the previous example, the dia- gram changes shown in Figure 3-10. Figure 3-10. LF Data Modulation with PSK Half bit values Driver control input Driver control signal Resulting antenna signal MODACTIVE pin Bitlength Bitlength Start of modulation End of modulation ATA5278 4832C–RKE–02/06...
  • Page 15 If data rates above 2 kbauds are demanded or the PSK modulation mode is selected, the use of an external antenna current loop switch is mandatory. This switch has to be controlled in a defined way which is supported by the ATA5278. For further details on this topic, please refer to the section “QSC Feature”...

  • Page 16: Driver Stage

    The gate of the external transistor is driven by the QSC pin of the ATA5278. The signal provided here is suited to drive standard MOSFETs (i.e., no logic-level FETs). During power-down mode or a fault shutdown, the external transistor is switched off. Otherwise, this would lead to a con- ducting state as long as no data modulation takes place.

  • Page 17: Current Regulation

    3.13 Current Regulation A main feature of the ATA5278 is its ability to generate a stabilized magnetic field with a con- nected LC antenna, mainly independent of the battery voltage and the frequency mismatch between the driver output frequency and the antenna resonance frequency.

  • Page 18: Boost Converter

    3.14 Boost Converter The ATA5278 provides the supply current for its driver stage by means of a Switch Mode Power Supply (SMPS) in boost configuration. A low-side switch that charges the inductor, and the therefore needed control circuitry is integrated. The other necessary components such as the inductor, the free-wheeling diode and the charging capacitor have to be applied externally.

  • Page 19: Current Adjustment

    ATA5278 3.15 Current Adjustment The maximum reachable output current in the antenna circuit can be calculated as follows: × ---------------------------- - A π × ant,eff Here, V is the maximum reachable driver voltage and Z the antenna’s impedance (including the R of the QSC MOSFET, the shunt resistor and the driver output resistance).

  • Page 20: Fault Diagnosis

    QSC transistor are also both active in standby mode, faults concerning these devices are also monitored then. Only during power-down, no fault monitoring is active. Figure 3-15 on page 21 illustrates the fault shutdown timing sequence. ATA5278 4832C–RKE–02/06...
  • Page 21 The clock signal is directly derived from the clock source connected to the OSCI/OSCO pins of the ATA5278 and is available as long as the ATA5278 is not in power-down mode. The fre- quency can be selected with the prescaler (PS) bit in configuration register 2, which is 0 for the...

  • Page 22: Application Hints

    3.18 MODACTIVE Output Pin The MODACTIVE pin of the ATA5278 can be used to directly control a timer/counter stage of the microcontroller. The signal indicates LF data modulation activity. In conjunction with suited timers and counting stages in the microcontroller, it enables the software to precisely know the progress of the LF data transmission.
  • Page 23 • The clock supply for the ATA5278 can be either an active clock source connected to the OSCI pin, or a passive device like a crystal or a ceramic resonator. When using a crystal, the prolonged oscillation build-up time (typically up to 1 ms) needs to be considered.
  • Page 24 The static thermal resistance of the chip, soldered onto a PCB can hardly be lowered beneath 30 K/W. Hence, a static operation of ATA5278 is not possible in all cases. But as most applica- tions require only a temporary LF field, the dynamic thermal effects (i.e., the thermal capacitances) are important parameters that must be taken into account.
  • Page 25 ATA5278 Figure 3-18. Operation Cycle Duration versus Power Dissipation Ta = 85°C Ta = 105°C Power Dissipation [W] Note that the upper limit of this diagram (0.6s) is not a design parameter but just for representa- tion reasons. The graphs continue to increase beyond the top line. For this diagram, following parameters have been taken: •...

  • Page 26: Absolute Maximum Ratings

    6. Operating Range Parameters Symbol Value Unit Power supply range 7.5 to 16.5 BATT Operating temperature range -40 to +105 °C Note: 1. For details, please refer to the section “Application Hints” on page 22 on maximum allowed operation temperature. ATA5278 4832C–RKE–02/06...

  • Page 27: Electrical Characteristics

    ATA5278 7. Electrical Characteristics 6.5V < V < 16.5V, T = 25°C unless otherwise specified. All values refer to GND pins. 6V possible with approximately 30% decrease BATT of maximum output power, 28-V operation possible (jump start), but output current stability is not guaranteed in that case.
  • Page 28 Current step 1, Integrator current for –0.834 +1.11 µA VSHUNT,p SMPL1 antenna current step 1 278 mV *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter ATA5278 4832C–RKE–02/06...
  • Page 29 ATA5278 7. Electrical Characteristics (Continued) 6.5V < V < 16.5V, T = 25°C unless otherwise specified. All values refer to GND pins. 6V possible with approximately 30% decrease BATT of maximum output power, 28-V operation possible (jump start), but output current stability is not guaranteed in that case.
  • Page 30 +105°C = 8V Switch-on signal rise = 2 nF Load r,QSC time 10% to 90% transition *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter ATA5278 4832C–RKE–02/06...
  • Page 31 ATA5278 7. Electrical Characteristics (Continued) 6.5V < V < 16.5V, T = 25°C unless otherwise specified. All values refer to GND pins. 6V possible with approximately 30% decrease BATT of maximum output power, 28-V operation possible (jump start), but output current stability is not guaranteed in that case.
  • Page 32 °C/s Peak temperature in preheat zone 100 to 140 °C Minimum 10 Duration of time above melting point of solder Maximum 75 Peak reflow temperature 220 to 225 °C Peak Maximum cooling rate 2 to 4 °C/s rPeak ATA5278 4832C–RKE–02/06...

  • Page 33: Ordering Information

    ATA5278 9. Ordering Information Extended Type Number Package Remarks 7 mm × 7 mm, taped and reeled, Pb-free ATA5278-PKQI QFN28 10. Package Information 4832C–RKE–02/06...
  • Page 34 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY...

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