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ALPHA SoM Series
αSMARC-RZ/G2E
Hardware Manual
Rev 1.0
RZ/G2E System on Module
©2023 Alpha Project Co., Ltd.

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  • Page 1 Cove ALPHA SoM Series αSMARC-RZ/G2E Hardware Manual Rev 1.0 RZ/G2E System on Module ©2023 Alpha Project Co., Ltd.
  • Page 2 Japan any items that fall under the regulated goods (technologies) stipulated in said law. ■ Alpha Project Co., Ltd. owns the copyright to the manual that comes with this product. It is prohibited to divert, post, transfer, or distribute this manual without permission.
  • Page 3 Names of other companies and products are registered trademarks or trademarks of each company. ■ Alpha Project Co., Ltd. is a member of SGeT (Standardization Group for Embedded Technologies). ■ Alpha Project Co., Ltd. is a member of SDA (SD Association).
  • Page 4: Table Of Contents

    3.5 SDIO ......................25 3.6 AUDIO I2S ....................26 3.7 SPI .........................27 3.8 USB 2.0 ......................28 3.9 USB 3.0 ......................29 3.10 Serial Port ....................30 3.11 CAN BUS ....................31 3.12 PCI Express ....................32 3.13 GPIO ......................33 αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 5 5.4 Heat Dissipation Measures................42 6. Related Products 6.1 SMARC2.1 Compliant Carrier Board ............43 6.2 αSMARC-RZ/G2E Development Kit ............43 6.3 Card Edge Connector ..................43 7. Product Support Information 8. Information on Engineering Services αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 6: Overview

    A carrier board and Linux BSP are provided that allow you to start software development immediately. The circuit diagram of the carrier board has been opened to the public, so it can be used as a reference. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 7: About Smarc

    SMARC Hardware Specification 2.1.1 https://www.sget.org/standards/smarc/ 1.4 About Linux BSP This module uses Linux as the standard OS. LinuxBSP (Linux Board Support Package) is included in the development kit. For details, see our website. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 8: Specifications Overview

    Temperature: -20 to +60˚ C (no condensation) Use Environment Conditions Dimensions 82 mm (W) × 50 mm (D) Circuit Board FR-4 (UL94-V0) Environmental Support RoHS directive (2015/863/EU) Table 1.5-1 Hardware specifications αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 9: External Specifications

    JTAG I/F Connecter MAC Address Serial Number UART Connecter MODE SW RZ/G2E Cortex-A53 Dual 1.2GHz P1-P156 (Parts side) S1-S158 (Back side) SMARC edge terminal When a heat sink is attached Fig 1.6-1 Appearance αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 10: Circuit Configuration

    2.5 V UART ISL80505 UART 1.35 V SW-REG 1.8 V / 3.3 V ISL8023 ISL80505 3.3 V SW-REG ISL8023 RESET Power Sequencer Power supply connector Fig 1.7-1 αSMARC-RZ/G2E configuration block diagram αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 11 UART Connecter HEADER 10p (5px2) 1.27 mm Pitch JTAG Connector SM05B-SRSS-TB / JST Power Connecter Table 1.7-3 Connector List *1 Please note that parts may be changed to equivalent products without notice. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 12: Address Map

    Reserved H’FF_00000000 Reserved Fig 1.8-1 Address Map *1 Internal registers are assigned to the Legacy Area. For details on the address map, see the “RZ/G Series 2nd Generation User's Manual: Hardware”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 13: Functions

    This module has a 4 MByte SPI FLASH. It is connected to the RZ/G2E SPI Multi I/O Bus Controller (QSPI0) and can be used as a boot device when updating firmware. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 14: Other

    Clock Generator 9FGV0441A SCLK SDATA 25 MHz DIF0 PCIE0_CLK DIF1 USB3S0_CLK Device Code = 1101 DIF2 PCIE_A_REFCK Controller ISL68200 Device Code = 1000/1100/1110/1111 Fig 2.3-2 I2C control device circuit connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 15: Smarc Interface

    LVDS LCD LVDS0 Should 24 bit Single or Dual LVDS1 HDMI HDMI Should Display Port Camera CSI0 CSI1 Should SDIO SDIO Should SPI0 Should eSPI1 Should Audio I2S0 Should Should αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 16 Should POWER_BTN# Should RESET_IN# Should RESET_OUT# Should CHARGING# Should CHARGE_PRSNT# Should BATLOW# Should SLEEP# Should SMB_ALERT# Should TEST# Should BootSelect BOOT_SEL[0:2]# Shall ForceRecov FORCE_RECOV# Should VDD_RTC Should POWER VDD_IN Shall Shall αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 17 3.3 V O.D GBE0_MDI1- GBE0_MDI1+ GBE0_CTREF GBE0_MDI0- GBE0_MDI0+ VDD_IO P.U 10K SDIO_WP 3.3 V P.U 10K SDIO_CMD 3.3 V/1.8 V P.U 47K SDIO_CD# 3.3 V P.U 10K SDIO_CK 3.3 V/1.8 V P.U 47K αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 18 3.3 V O.D P.U 10k USB3+ USB3- 3.3 V P.U 10k USB3_EN_OC# 3.3 V O.D P.U 10k PCIE_A_RST# 3.3 V P.U 47k 3.3 V P.U 10k PCIE_A_REFCK+ PCIE_A_REFCK- PCIE_A_RX+ PCIE_A_RX- PCIE_A_TX+ PCIE_A_TX- αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 19 VDD_IO P.U 2.2k P140 S140 I2C_LCD_DAT VDD_IO P.U 2.2k P141 S141 LCD0_BKLT_PWM VDD_IO P.D 470k P142 S142 GPIO12 VDD_IO P.U 470k P143 CAN0_TX VDD_IO S143 P144 CAN0_RX VDD_IO P.U 470k S144 αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 20 High-Level Output Voltage VDDIO × 0.65 VDDIO - 0.4 Low-Level Output Voltage High-Level Input Voltage VDDIO × 0.65 VDDIO + 0.3 Low-Level Input Voltage VDDIO × 0.35 Table 2.4-4 SMARC interface DC characteristics αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 21: Settings

    Short circuit Open 1.8 V (SMARC standard) Factory settings Open Short circuit 3.3 V Other Settings not possible Do not make this setting. Doing so can cause damage. Fig 2.5-2 VDD_IO settings αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 22: Led Indicator

    Fig 2.6-2 Monitor LED Circuit Configuration 2.6.2 Power LED The power supply LED lights up when the module powers on. Power supply status Light On Light Off Table 2.6-3 Power LED status αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 23: Uart Connector

    The following is an example of connection when using PC-USB-04. Cable*1 PC-USB-04 NH6P (JST) SH4P (JST) *1 A cable is not included with the product. Please prepare one yourself. Fig 2.7-3 Connection example with PC-USB-04 αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 24: Jtag Connector

    Table 2.8-2 JTAG Connector Pin Assignment ARM core JTAG interfaces include 10 pin (half pitch), 20 pin (full pitch), 20 pin (half pitch), etc. When connecting to this board, use 10 pin (half pitch). αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 25: Power Supply Connector

    Power Supply Control Unit SMARC I/F Signal Name Remarks VDD_IN VDD_IN POWER_BTN VDD_IN POWER_BTN VDD_IN PWR_BTN Low Active Power supply connector (CN4) pin assignment Fig 2.9-2 Power supply connector circuit configuration and pin assignment αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 26: Interface Function Details

    The LCD power supply and back light control signal are relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 27: Gigabit Ethernet

    Fig 3.2-1 Gigabit Ethernet circuit connection configuration “GBE_LINK_ACT#” is controlled by the PHY function. “GBE_LINK100#” and “GBE_LINK1000#” are connected to the RZ/G2E port and controlled by software. See the “KSZ9131RN (Microchip)” datasheet for information on compatible transformers. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 28: Camera

    It is connected to CSI2 RZ/G2E and supports a maximum transfer rate of 1.1 Gbps. The supported input formats are YUV422 8/10bit, RGB888, Embedded 8bit, and User Defined 8bit. SMARC I/F RZ/G2E CSI1_CK CSI0_CLK CSI0_DATA[0..1] CSI1_RX[0..1] Fig 3.3-1 CAMERA circuit connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 29: I2C

    It is connected to the RZ/G2E IIC Bus Interface (I2C). SMARC I/F RZ/G2E I2C_CAM1_CK SCL3 SDA3 I2C_CAM1_DAT I2C_GP_CK I2C_GP_DAT SCL_PMIC I2C_PM_CK SDA_PMIC I2C_PM_DAT SCL0 I2C_LCD_CK SDA0 I2C_LCD_DAT Fig 3.4-1 I2C circuit connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 30: Sdio

    It is connected to the RZ/G2E SD card interface (SDHI), and SDCLK supports up to 200 MHz (SDR104). SMARC I/F RZ/G2E SDIO_WP SD1_WP SD1_CD SDIO_CD SD1_CLK SDIO_CK SD1_CMD SDIO_CMD SD1_DATA[0..3] SDIO_D[0..3] GP0_17 SDIO_PWR_EN Fig 3.5-1 SDIO circuit connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 31: Audio I2S

    The I2S signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 32: Spi

    The SPI signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 33: Usb 2.0

    OverCurrent USBx_EN_OC# in/out Clear Latch USBx_OVC (RZ/G2E) Fig 3.8-2 USBx_ENC_OC# control USBx_OVC is held active (Low) at the falling edge of USBx_EN_OC# (overcurrent detection), and cleared (High) when USBx_PWEN is released. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 34: Usb 3.0

    Fig 3.9-1 USB 3.0 circuit connection configuration The RZ/G2E USB3.0 port consists of a Super-speed USB3S0 port and High-speed, Full-speed, and Low-speed USB3HS0 ports. See Figure 3.8-2 for the USBx_EN_OC# signal. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 35: Serial Port

    The Serial Port signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 36: Can Bus

    The CAN BUS signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 37: Pci Express

    PCI Express supports 1 lane x 1 channel. It is connected to the RZ/G2E PCIE Controller. SMARC I/F RZ/G2E PCIE_A_RX+/- PCIE0_RX_P/M PCIE_A_TX+/- PCIE0_TX_P/M PCIE_A_RST# GP6_07 GP6_06 PCIE_WAKE# PCIE_A_REFCK+/- CLOCK GENERATOR PCIE0_CLK_P/M Fig 3.12-1 PCI Express circuit connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 38: Gpio

    SSI_WS78 GPIO6 GP5_12 MSIOF0_TXD SSI_SDATA7 GPIO7 GP5_13 MSIOF0_SYNC SSI_SDATA8 GPIO8 GP5_14 MSIOF0_SS1 GPIO9 GP5_15 MSIOF0_SS2 GPIO10 GP5_16 AUDIO_CLKC GPIO11 GP5_17 GPIO12 GP5_18 SCK0 GPIO13 GP5_19 Table 3.13-2 GPIO combination terminal function αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 39: Power Supply And System Control

    The FORCE_RECOV# signal is used for firmware updates. Signal Name Input/Output Function FORCE_RECOV# Input Forced recovery signal When the module is started with FORCE_RECOV# set to Low, it boots from SPI FLASH. Table 4.2-2 FORCE_RECOV# signal αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 40 The connection configuration of the power supply part is shown below. SMARC I/F RZ/G2E Power Circuit 1.1 V VDD_IN 1.5 V 1.8 V Standby# VIN_PWR_BAD# 2.5 V 3.3 V CARRIER_PWR_ON Power Good GP6_08 GP1_00/IRQ0 POWER_BTN# Fig 4.2-5 Power supply connection configuration αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 41 The BOOT_SEL signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 42 The TEST signal is relayed through the LEVEL SHIFTER and bi-directionally converted to 3.3 V and VDD_IO. The standard setting for VDD_IO voltage is 1.8 V. For details, see “2.5.2 VDD_IO Settings”. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 43: Technical Data

    5.1.1 Module External Dimensions Circuit Board Maximum height of rear parts Thickness Fig 5.1-1 αSMARC-RZ/G2E dimensional drawing For more detailed external dimensions, see the SMARC standard specifications. SMARC Hardware Specification 2.1.1 https://www.sget.org/standards/smarc/ αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 44 For the mounting holes for fixing, implement a tapped standoff on the carrier board side and screw it down. M2.5 screws MXM3.0 SMARC SoM Connector (Reference) Carrier Board Tapped standoff TH-1.6-xx-M2.5 (MAC8) Fig 5.1-3 SoM standoff 9774xxx151R (Wurth) αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 45: Compatible Connectors

    2. With the SMARC module inserted into the card edge connector, push it down so that it is parallel to the carrier board. 3. Secure the SMARC module with screws. Fig 5.2-1 Installation to carrier board αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 46: Designing The Carrier Board

    PCIe, and LVDS. 4. About ESD countermeasures Each signal of the SMARC interface is not subject to ESD countermeasures on the module. Take these measures as necessary on the carrier board. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 47: Heat Dissipation Measures

    This module is equipped standard with a natural air-cooling heat sink, so additional measures such as fans are not required in environments where there is air convection. However, heat dissipation should be considered when using it in sealed enclosures or high temperature environments. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 48: Related Products

    It includes all the equipment and software necessary for development, so development can start right away. αSMARC-RZ/G2E αSMARC-EVB1 AC adapter 6.3 Card Edge Connector Alpha Project can provide MXM3.0 card edge connectors that are compatible with SMARC modules. Please inquire with us. αSMARC-RZ/G2E Hardware Manual ©2023 Alpha Project Co., Ltd. https://www.apnet.co.jp...
  • Page 49: Product Support Information

    αSMARC-RZ/G2E Alpha SoM Series 7. Product Support Information Alpha Project’s product support accepts user registration, repairs, inquiries, etc. See the page below for information. Product Support Page* https://www.apnet.co.jp/support/index.html * Japanese site only. User Registration Please do user registration before requesting repairs or making inquiries.
  • Page 50: Information On Engineering Services

    Alpha SoM Series 8. Information on Engineering Services Alpha Project accepts orders for custom products and system development based on our products. We provide integrated service from design to OEM supply according to customers specifications. For details, contact our sales office.
  • Page 51 αSMARC-RZ/G2E Alpha SoM Series Revision History Version Number Date Revision Contents Version 1.0 July 26, 2023 Create a new entry...
  • Page 52 The content of this document has been prepared with the utmost care. However, if you find any suspicious parts or mistakes, please contact us. ■ Please note that Alpha Project Co., Ltd. does not take responsibility for any damages that may occur as a result of operating the application based on the contents of this document.

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