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The Pericom PI7C21P100 PCI-X bridge evaluation board demonstrates the bridge and allows testing of key features either before or during design / layout stages. The PI7C21P100 PCI-X Bridge complies with PCI-X Addendum to the Local Bus Specification Revision 1.0a, as well as PCI Local Bus Specification Revision 2.2, PCI-to PCI Bridge Architecture Specification Revision 1.1 and PCI Power Management Interface Specification Revision 1.1.
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Components and Jumper Reference TABLES: U4 PI6C2510-133EL Clock Buffer a) A table on the front shows the default U17 Pericom 7C21P100 PCI-X Bridge setting for SW1. U31 Voltage Regulator b) Table of tests points TP4, TP13, TP33, U32 Voltage Regulator TP34, TP69, TP70, TP71, TP85, TP91, TP92 and TP86 …TP90.
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Looking from the front of the motherboard, the small lip on our reference board points to the back of the motherboard, and the component side with the PI7C21P100 bridge chip is on the left hand side. Normally you won’t need to connect power to the reference board through header J5, unless you are cascading bridges.
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“A1”, “B1”, “A94”, “B94” at the 4 corners of each slot, as a reminder where pin 1 is on each connector. At this point, the Pericom PI7C21P100 reference board is ready for you to use. Test Points Description...