Philips 42PF9945 Service Manual page 50

Circuit Descriptions, Abbreviation List, and IC Data Sheets
of the OTC the same way the +8V protection is
implemented. The set must also go into protection.
If a +8V or a +5V dropout is detected, the protection input
should be checked several times, every 200ms. If the
protection input is active for five consecutive times, the set
must go into protection.
DC protection (from audio amplifier)
Because of the symmetrical supply of the audio amplifier, a
DC-blocking capacitor between the amplifier and the speaker
is not necessary. However, it is still necessary to protect the
speaker for DC voltages. If a DC protection is activated, the
OTC will set the TV in protection. A specific error code is not
generated. For a detailed description, see paragraph "Audio
Amplifier".
Protections with detection via I2C bus
Tuner protection
The tuner is supplied by the +5V_SW, which is delivered by the
standby supply. When this supply is short-circuited, the
standby supply will hiccup. If the tuner does not acknowledge
on its I2C address for five consecutive times, the set goes into
protection and error "13" is generated. Maximum time allowed
before protection: 1.5 s.
9.10 PDP Panel
9.10.1 Introduction
The PDP, which is used in this chassis, is a product of SDI
(Samsung Display Industry).
When defect, a new panel must be ordered, and after receipt,
the defective panel must be send for repair in the packing (flight
case) of the new ordered panel.
9.10.2 Operation
Plasma displays work by applying a voltage between two
transparent display electrodes on the front glass plate of the
display. The electrodes are separated by an MgO dielectric
layer and surrounded by a mixture of neon and xenon gases.
When the voltage reaches the 'firing level', a plasma discharge
occurs on the surface of the dielectric, resulting in the emission
of ultra violet light.
This UV light then excites the phosphor material at the back of
the cell and emits visible light. Each cell or sub-pixel has red,
blue or green phosphor material and three sub-pixels combine
to make up a pixel. The intensity of each colour is controlled by
varying the number and width of voltage pulses applied to the
sub-pixel during a picture frame. This is implemented by
dividing each picture frame into sub-frames. (For 50 Hz-mode
there are 12 sub frames, for the 60 Hz-mode there are 10 sub
frames). During a sub-frame, all cells are first addressed -
those to be lit are pre-charged to a specific address voltage -
then during the display time the display voltage is applied to the
entire screen lighting those that were addressed.
Each sub-frame has a weighting-factor. (Time-entity depends
on size and number of pixels on the screen). This is a purely
digital PWM control mechanism, which is a key advantage as it
eliminates any unnecessary digital to analogue conversions.
9.10.3 LVDS Interface
•
Standard single ended signal (TTL).
–
This requires 28 signal lines and more than 14
grounds.
–
Single ended signals up to 3 V.
–
Wide flat ribbon cable.
–
EMI/EMC problems.
FTP1.1E
–
Feasible up to VGA/NTSC resolution (limited to 250
Mb/s).
•
LVDS
–
Five low voltage (350 mV) differential pairs: one clock
pair and four data pairs.
–
Five grounds.
–
EMI/EMC friendly.
–
WXGA and HD-1280x720p (up to 1 Gb/s).
LVDS offers superior performance compared to the standard
single ended signal (TTL).
It is even "protocol independent" so it requires no software.
- Lower Voltage Swing (only 350 mV vs. 3 V)
- Allows faster Clocking
- Standard open Ended: 250Mbps
- LVDS: >1 Gbps
Standard Single Ended
1
- Differential Signals (Two Signals) ...Low Noise!
- Receiver reads a 1 or 0 based on the delta of the two signals.
- Noise Impacts both lines and cancels out each others.
Low Voltage Differential Signalling
1
Two Signals & Smaller Voltage Swing
Figure 9-13 LVDS technology
9.11 Software Upgrading
9.11.1 Introduction
In this chassis, you can upgrade the software via ComPair.
This offers the possibility, to replace the entire SW image
without having to remove the flash-memory from its socket.
You can find more information on how this procedure works in
the ComPair file. It is possible that not all sets are equipped
with the hardware, needed to make software upgrading
possible. To speed up the programming process, the firmware
of the ComPair interface can be upgraded. See Chapter
"Service Modes ...", paragraph "ComPair" - "How To Order" for
the order number.
9.11.2 Specifications
Some specifications are:
•
The upgrade feature makes use of I2C to transfer a new
SW image (4 MB).
•
It requires the ComPair interface Box (RS232 to I2C).
•
The I2C bus is available at the rear side of the set.
•
It uses a ZIP-compressed BIN image to speed up the
transfer process (1/2 size).
•
The complete procedure takes less than 20 minutes with
an upgraded ComPair interface:
–
About 90 seconds to erase a 4 MB flash-memory.
–
Less than 10 minutes to transfer the file (max 1.9 MB).
–
About 5 minutes to decompress/program the flash-
memory.
Note: It takes about 85 minutes with a standard interface.
Constraints:
•
Needs the EPG flash memory, so this device must be
placed also for non-EPG regions like AP and USA.
9. EN 109
Single Signal & Larger
Voltage swing
0 1 0
Noise
0 1 0
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