Sony STR-DH810 Service Manual page 61

Pin No. Pin Name
52 INPUTHSN
53 INPUTVSN
54 CORE_VDD
55 CORE_VSS
INPUTC[0], INPUTC[1],
INPUTC[2], INPUTC[3],
56 to 63
INPUTC[4], INPUTC[5],
INPUTC[6], INPUTC[7]
64 I/O_VDD
65 I/O_VSS
66, 67 INPUTC[8], INPUTC[9]
68 CORE_VDD
69 CORE_VSS
INPUTY[0], INPUTY[1],
INPUTY[2], INPUTY[3],
70 to 77
INPUTY[4], INPUTY[5],
INPUTY[6], INPUTY[7]
78 I/O_VDD
79 I/O_VSS
80 CORE_VDD
81 CORE_VSS
82, 83 INPUTY[8], INPUTY[9]
84 TRSTN
85 TCK
86 TDO
87 TDI
88 TMS
89 to 91 SEL[0], SEL[1], SEL[2]
92 I/O_VDD
93 I/O_VSS
94 RED[0]
95 CORE_VDD
96 CORE_VSS
RED[1], RED[2],
97 to 100
RED[3], RED[4]
I/O
I Input Horizontal Sync
I Input Vertical Sync
- Core Power Supply (+1.8V)
- Core Ground
I Chroma Video Input Data (Use bits 7:2 for 8-bits inputs)
- I/O Power Supply (+3.3V)
- I/O Ground
I Chroma Video Input Data (Use bits 7:2 for 8-bits inputs)
- Core Power Supply (+1.8V)
- Core Ground
I Luma Video Input Data (Use bits 7:2 for 8-bits inputs)
- I/O Power Supply (+3.3V)
- I/O Ground
- Core Power Supply (+1.8V)
- Core Ground
I Luma Video Input Data (Use bits 9:8 for 8-bits inputs)
JTAG - Reset
I
Pull-down to ground if not used
JTAG - Clock
I
Pull-up to 3.3V if not used
O JTAG - Data Out
JTAG - Data In
I
Pull-up to 3.3V if not used
JTAG - Mode Select
I
Pull-up to 3.3V if not used
General purpose outputs - programmed by software
The state of these pins are latched during hardware reset
SEL0 only an input during reset, function reserved. This pin should be either pulled-up or
pulled-down
SEL1
I/O Pull-down - use internal PLL for generating video output clock
Pull-up - use external PLL
SEL2
Pull-down - normal operation
Pull-up - reserved
Input only used during reset
- I/O Power Supply (+3.3V)
- I/O Ground
O Output Red Video Data
- Core Power Supply (+1.8V)
- Core Ground
O Output Red Video Data
Description
STR-DH810
61