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Summary of Contents for BLUE CHIP PCI-PIO
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PCI-PIO PCI Digital Input/ Output Card User Manual...
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Document Issue Level Manual covers PCBs identified PCI-PIO Issue. 2.x (x is any digit) All rights reserved. No part of this publication may be reproduced, stored in any retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopied, recorded or otherwise, without the prior permission, in writing, from the publisher.
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Amendment History Issue Issue Author Amendment Details Level Date 13/10/97 First Issue as P/N 127-187 4/12/97 On board oscillator changes from 1MHz. to 4MHz. Add description of DOS program 20/01/98 Refer to readme.txt file. Amendments to CISReg A & B 20/03/98 Update headers and footers...
One PCI interrupt line may be selectively driven by the seven interrupt sources on the board, the interrupting source being readily identified by the board. The PCI-PIO is intended to be installed with the minimum of user interaction. The board is configured by the system BIOS and by the application drivers and no on-board links are required to select functionality.
This manual is organised into four chapters. Each chapter covers a different aspect of using the PCI-PIO. In order to get the best results from the product, the user is urged to read all chapters, paying particular note to Chapter 1 which deals with the initial installation of the card.
Installation Page 3 CHAPTER 1 INSTALLING THE PCI-PIO The card is installed by removing the cover of the host computer and inserting the card into a free PCI slot. The rear panel of the card should then be secured to the rear panel of the host computer with the screw supplied with the computer.
PIO2 port C, b7 (PBC7) 16 PIO1 port B, b7 (PAB7) PIO2 port B, b0 (PBB0) Digital Ground or Counter I/O 17 PIO1 port C, b0 (PAC0) Digital Ground and/or Interrupt source or Counter I/O Page 4 01270187.doc Blue Chip Technology Ltd.
Driving conventional relay coils is not recommended without external protection even if the coil current required is less than the PCI-PIO can provide. Relay coils are inductive and as such can generate large flyback voltages when de-energised which will destroy the device outputs.
A typical sequence of events to use this feature would be : • Decide on the mix of input/outputs required and write the appropriate code to the Control Register. • Read from the selected input port or write to the selected output port. Page 6 01270187.doc Blue Chip Technology Ltd.
A summary of the codes required to change the port operations are given later. Address Map The address map for the PCI-PIO occupies a 16-byte block of addresses. All the following addresses are relative to PCI base address register 2, located at address 18 (hex) in the PCI configuration space.
Mode 1 enables the transfer of data to or from a specified 8 bit port (A or B) in conjunction with strobes or handshaking signals on port C. These handshaking signals may be used to drive interrupt channels if required. Page 8 01270187.doc Blue Chip Technology Ltd.
The following modes of operation exist by programming the control register within the i8254 / µPD71054. N.B. The interrupts may be generated when the Counter/timer outputs go low or high, selected by bits in the counter control registers. Blue Chip Technology Ltd. 01270187.doc Page 9...
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This mode is similar to mode 2 but the output pin pulses when the count reaches zero instead of 1. Mode 5 This mode is similar to mode 4 except that the count sequence is triggered by the gate line. Page 10 01270187.doc Blue Chip Technology Ltd.
D-type connector. Consequently this port must be set as an input in the relevant 71055 device to avoid contention. This same condition applies to any port line which is used for a counter/timer function. Blue Chip Technology Ltd. 01270187.doc Page 11...
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PBB0 as a count input, PBB2 as an enable input, and PBB1 as a count output. Other combinations are possible, but because of the flexibility which is permitted, care must be exercised to avoid conflicting uses of the same port lines. Page 12 01270187.doc Blue Chip Technology Ltd.
• INT7 is the output from Counter/timer 2, and may be used to generate interrupts on timed events. The use of interrupts is not essential but greatly enhances the functionality of the card. Blue Chip Technology Ltd. 01270187.doc Page 13...
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Port BC0 interrupt control occurred Port AC3 interrupt control occurred Port AC0 interrupt control occurred Having serviced an interrupt, the source may be cleared by momentarily clearing the relevant bit in the Interrupt Enable Register. Page 14 01270187.doc Blue Chip Technology Ltd.
Register selectable to 3 Counter/timer outputs, and 4 PIO handshake control lines. Interrupt Levels Supported: All PCI interrupts Address Overhead: 16 contiguous addresses in 16 byte block Board Power Requirement: +5 Volts, 1.2 W maximum Blue Chip Technology Ltd. 01270187.doc Page 15...
“pig-tail”. Standard ribbon cable will not be adequate unless it is contained wholly within the cabinetry housing the industrial PC. Page 16 01270187.doc Blue Chip Technology Ltd.
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Class A Conducted Class A & B Immunity EN 50082-2:1995 incorporating: Electrostatic Discharge EN 61000-4-2 Performance Criteria B Radio Frequency Susceptibility ENV50140 ENV50204 Performance Criteria A Fast Burst Transients EN 61000-4-4 Performance Criteria B Blue Chip Technology Ltd. 01270187.doc Page 17...
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Do you have a question about the PCI-PIO and is the answer not in the manual?
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