Acorn computer Z80 Second Processor Service Manual

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Page 3 Z80 SECOND PROCESSSOR SERVICE MANUAL Part No. 0409,015 Issue 2 August 1984...
Page 4 Within this publication the term 'BBC' is used as an abbreviation for 'British Broadcasting Corporation'. °Copyright Acorn Computers Limited 1984 Neither the whole or any part of the information contained in, or the product described in, this manual may be adapted or reproduced in any material form except...
Page 5: Table Of Contents
Reset Interrupt Handling DRAM Control DRAM R e f r e s h Desynchronising Logic 5.10 The Tube Fault Finding on the Z80 Second Processor General Fault Conditions Circuit Checks Appendix Diagnostic Flowcharts Z80 Second Processor - Block Diagram Circuit Diagram...
Page 6 WARNING: THE Z80 SECOND PROCESSOR MUST BE EARTHED Important: The wires in the mains lead for the. Z80 second processor are coloured in accordance with the following code: Green and yellow Earth Blue Neutral Brown Live As the colours of the wires may not correspond with the coloured...
Page 7: Introduction
1. Introduction This manual is intended to provide the information required to diagnose and repair faults on the Z80 second processor (a part of the BBC Microcomputer system) which was designed by Acorn Computers Ltd. of Cambridge, England. The information contained in this manual is aimed at Acorn dealers and service engineers who will be servicing the Z80 second processor on behalf of Acorn Computers Ltd.
Page 8: Packaging And Installation
2. Packaging and Installation. The Z80 second processor is supplied in a two-part moulded polystyrene packing which is further packaged within a cardboard sleeve. Supplied with the second processor is a DNFS ROM with fitting instruction sheet, a set of reminder cards for the red function keys, 7 floppy...
Page 9: Specification
3. Specification 3.1 The Z80 second processor A second processor for the BBC Microcomputer model B, operating through the Tube, providing the ability to run sophisticated software under the CP/M 2.2 operating system. The second processor is housed in a rigid injection moulded...
Page 10 4. Disassembly and assembly To service the Z80 second processor, disconnect it from the BBC Microcomputer and the mains supply and undo the three fixing screws; two at the top of the back panel and one underneath the unit, nearest the front and equidistant between the two rubber feet.
Page 11: Circuit Description
5.3 ROM Latch The Z80 second processor features a "shadow" ROM to boot the system upon power-up and also to ensure proper handling of NMI interrupts from the host processor via The Tube. The ROM is enabled at the proper times by the latch IC15A.
Page 12: Reset
0 (t ). TP7 a11ows observation of the WAIT signal. 5.5. Reset The Z80 second processor may be reset at any time, by the host processor via the Tube. The Z80 requires that a reset signal should not occur immediately after an instruction fetch cycle, otherwise corruption of DRAM data might result.
Page 13: Interrupt Handling
signal to the CPU is a pulse of approx. 4µs duration, sufficient to produce a reset without delaying the refresh to the DRAMS and so losing data. The reset to the CPU also clears the ROM latch IC15A, bringing the shadow ROM into the memory-map. The Schmitt NAND gate IC19C provides a Power-Up reset to' the Z80 from the delay network R1, C2 (time-constant 100ms).
Page 14 CAS is enabled if: i. the memory cycle is a write cycle low, to IC20C pin 11). or ii. the memory cycle is a read cycle and instruction-fetch cycle (IC18B not preset by Ml, RED signal to IC20 pin 9). or iii.
Page 15: Dram Refresh
Fig. 3 Instruction-Fetch cycles 5.8 DRAM Refresh After each instruction-fetch, the Z80 CPU performs a Refresh cycle for the DRAMS in the period while the instruction is being decoded. A seven-bit refresh address is output onto the address-bus (A0 to A6, A7 =0) for approx.
Page 16: Desynchronising Logic
memory control signals go active. The Refresh address is incremented by the CPU after each time. Once the MREQ signal goes active, the "D" latch 1C18B produces CPOP and hence RAS as normal. The CAS is not required for a Refresh cycle, and is not enabled since none of the conditions listed in section 5.7.
Page 17: The Tube
(IC1) Acorn custom which provides parallel asynchronous communication between two processor systems, the BBC Microcomputer (Host) and the Z80 second processor (Parasite). To each processor system, resembles conventional peripheral device comprising 4 read-only and 4 write-only, 8-bit registers. The Z80 accesses these registers via its I/O structure.
Page 18 F i g . 6 S c h e m a t i c d i a g r a m o f T u b e r e g i s t e r s...
Page 19 The fo11owing tables show the relative address and type of each register in the Tube, firstly for the Host system, and secondly for the parasite system (second processor). Table 1 Host system registers Address Read Status flags and Register 1 flags Register 1 (24 byte FIFO read only) Register 2 flags Register 2 (1 byte read only)
Page 20 As can be seen from Fig. 6 and Tables 1 and 2, each numbered register (e.g. register 1) is actually two registers, one for reading and one for writing. The register selected is determined by R/W on the Post system and by NRDS/NWDS on the Parasite system (see Tube Pinout Diagram).
Page 21 Reset (RST) line to parasite processor PNM1 Non-maskable interrupt to parasite PIRQ Interrupt to Host (not used by Z80 second processor) DMA lines Request for DMA transfer DACK DMA acknowledge from DMA controller DMA facility is not used by the Z80 second processor...
Page 22 5.10.3 Tube Timing Diagram Fig. 8 Tube Timing Diagram N.B.The timing reference for the Post is 0 and R/W gives the direction of transfer. For the parasite, the PCS direction is given by PNRDS or PNWDS, and timing by PCS. 1 R/W SET UP TO 02 35ns 2 TIMING STROBE PULSE WIDTH...
Page 23: Fault Finding On The Z80 Second Processor
6. Fault Finding on the Z80 Second Processor 6.1 General The Z80 second processor has three socketed IC's (IC 1 - 3) - these may easily be replaced if necessary. Test points are provided on the Z80 PCB, as fo11ows:...
Page 24: Circuit Checks
Normal Operation until BREAK reset attempted; system fails. Most probably caused by failure of reset circuit (IC15b, IC14 and associated components). BBC Microcomputer fails when Z80 Second Processor connected to Tube socket Probable causes misconnected...
Page 25 6.3 Circuit Checks 6.3.1 Clock Using an oscilloscope, check that a 12MHz signal is being generated at pin 13 of IC22D. If not, check the crystal X1, resistor values and operation of inverters IC24D/E. Trace the signal to pin 9 of IC17A where it should appear as a clearly defined 6MHz square wave (0).
Page 26 If WAIT is permanently low, or high, check TP7 after pressing BREAK; the WAIT signal should go low and then high. If not, check that (0) is clocking IC16A and B and IC30A and B (for HCS/PCS WAIT) and that the desync.
Page 27 6.3.5 Desynchronising Logic and PCS Disable HCS After power-up, check that PCS is active at pin 18 of IC1. If not, then either the Tube 1C1 or IC29 has failed on the second processor side, there is a ribbon cable/connector fault, or the Host is faulty. After pressing BREAK, check that a low signal appears simultaneously at pins 1 and 2 of IC22A and that this appears at pin 3.
Page 28 address lines are shorted together and that all data lines are operating and not tied together. 6.3.9 Power Supply Check the 250 mA. type T mains fuse, accessible at the rear of the unit (see section 2). Check for any loose, disconnected or broken leads. After making sure that the second processor is disconnected from the mains supply, check the mains switch at the rear of the unit.
Page 29 Fig. 9 Position of +5V Trimmer on Power Supply PCB. If the current is zero, the second processor PCB has gone open circuit. Check fuse FS1 and connectors and tracks. If the fuse is blown, the fault is a short circuit on the PCB. If the current is higher than it should be, measure the voltage.
Page 31: Diagnostic Flowcharts
Diagnostic Flowcharts Note: The letters in circles refer to the relevant flowcharts which follow. Master Flowchart...
Page 41 Power Supply...
Page 43: Z80 Second Processor - Block Diagram
Z80 Second Processor Functional Block Diagram...
Page 45 Z 8 0 s e c o n d P r o c e s s o r P C B C i r c u i t D i a g...
Page 49: Z80 Pcb
Z 8 0 P C B S i l k S c r e e n...
Page 51 Power Supply Circuit Diagram...
Page 53 Z 8 0 S e c o n d P r o c e s s o r G e n e r a l A s s e m b l y...
Page 55 ITEM PART No. DESCR1PTION QTY REMARKS Z80 Second Processor General Assembly (SEE PAGE 47) 201,110 * CASE LOWER MOULD1NG 201,109 * CASE UPPER MOULDING 201,742 * CASE LABEL, LOWER (REAR) 201,108 * CASE LABEL UPPER 831,000 * POWER SUPPLY ASSEMBLY...
Page 56 (SEE PAGE 41) - cont'd Z80 PCB Assembly 704,164 * INTEGRATED CIRCUIT 8264 IC6-13 742,123 * INTEGRATED C1RCUIT 74LS123 IC14 741,074/ 1NTEGRATED CIRCUIT 74S74/74F74 IC15 748,074 * 742,074 * INTEGRATED CIRCUIT 74LS74 IC16-18,30 742,132 * INTEGRATED CIRCUIT 74LS132 IC19 742,011 * INTEGRATED CIRCUIT 74LS11 IC20 742,000 *...