Advertisement
Service Modes, Error Codes, and Fault Finding
Figure 5-44 Screen display "Vertical lines"
One or Several Horizontal Lines on the Screen
1. It may be caused by:
–
Open or short on SCAN FPC attached panel.
–
Defect on SCAN IC attached panel.
2. Replace Y DRV board.
Figure 5-45 Screen display "Horizontal lines"
Low Brightness of Displayed Picture
1. In this case, Z board operation is not correct.
2. Check the power cord of Z board.
3. Check the connector of Z board and CTRL board.
4. Replace the CTRL board or Z board.
Partially Other Colour on Full White Screen or Partially
Discharge on Full Black Screen.
1. Check the declination of Y board set-up and set-down
wave.
2. Measure each output wave with oscilloscope (> 200 MHz)
and compare the data with below figure data. Adjust the Y
board Set_up (A) and Set_down (B) declination by
changing VR1 and VR2 as written on the adjustment label.
–
Measuring Point of Y board: B39
A(VR1) Set_up : 10 5us
Vs(187V 1)
Vs
Y
Vs(187V)
0V
1 SF
B(VR 2) Set_dn : 100us
Figure 5-46 Y output voltage waveform
No Specified Brightness at Specified Colour
1. Check the connector of CTRL board input signal.
2. Replace the CTRL board.
It may show several vert.
lines in a quarter or other
division part of screen
including left case
F_15590_021.eps
040705
It may show several horizontal
lines including left case
F_15590_022.eps
040705
Approximately 60 V
( non adjustable )
VR4 Vy (-80
1V)
H_15593_002.eps
120707
LGE PDP 2K5
5.2.3
Checking for Component Damage
Y IPM (IC 15) or Z IPM (IC 2)
When the internal Sustain_IGBT or ER_FET of Y IPM (IC15) or
Z IPM (IC2) is damaged, VS fuse is open and there will be no
picture.
•
Test Point: B32-GND (Y board), B28-GND (Z board).
•
Wave format: B32 (Y board) or B28 (Z board) has no output
wave.
•
Measure position: Sustain section, B32 wave of Y board
and B28 wave of Z board (full white pattern).
Y IPM
Y IPM
Z IPM
Z IPM
Figure 5-47 IPM normal output
Pass_Top FET (Y board: HS2)
When the Pass_Top FET is damaged, electric discharge of the
entire screen is generated.
•
Test Point: GND-B32 (Y board)
•
Wave format: When the Set_dn does not descend until -Vy.
Vs
Y
0V
1 SF
Figure 5-48 Pass-Top FET defective
FET Assy (Y board: HS1)
When Set_Up FET is damaged, there will be no picture.
1. Test Point: GND-B32 (Y board)
–
Wave format: Set_up waveform is not generated.
2. When Set_Down FET is damaged, electric discharge of
entire screen is generated.
–
Test Point: GND-B32 (Y board)
–
Wave format: Set_down waveform is not generated.
–
Measure position: Reset wave of B32 (Y board) (full
white pattern)
5.
EN 19
F_15590_024.eps
060605
H_15593_003.eps
120707
Advertisement
