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SD-SH111H
1-BIT AMP. PWB-F1/2/3
A
BIA106A/B/C
R-CH_IN
1
1
AGND
2
2
L-CH_IN
3
3
B
A+5V
1
1
1
AGND_AD
2
2
2
D+5V
3
3
3
DGND_AD
4
4
4
RESET
5
5
5
C
D
E
F
G
H
• NOTES ON SCHEMATIC DIAGRAM can be found on page 86.
1
CA211
0.1
CA288
LFA01
0.1
LFA02
+B
CA197
47/25
CA289
0.1
RA153
1K
RA100
3.3K
DA126
CA287
1SS361
0.1
1
3
2
CA165
DA127
1SS361
100/10
2
3
1
CA109
RA176
10/10
2.2K
CA194
47/16
ZDA110
MA8051M
RA154
1.5K
-B
D+5V
+B
2
3
Figure 76 SCHEMATIC DIAGRAM (15/23)
FM SIGNAL
R_CH
A+5V
+B
CXA100
11.2896MHz
CA182
0.1
RA101
3.3K
RA174
8.2K
CA286
0.1
1
3
2
CA164
DA129
1SS361
13 14 15 16 17
100/10
2
3
1
RA175
DA128
2.2K
1SS361
+B
RA202
1K
RA183
RA181
120K
120K
VRA100
VRA101
4.7K
4.7K
RA182
RA184
120K
120K
L-CH OUTPUT
OFFSET
ADJUSTMENT
R-CH OUTPUT
OFFSET
ADJUSTMENT
–B_DRIVER
4
– 76 –
QUAD 2 INPUT AND G
+B
D+5V
RA124
RA115
RA123
100
CA104
CA184
47/10
0.1
CA102
0.1
CA185
0.001
9
8
7
6
5
4
3
2
12
11
10
ICA100
1
2
IX0498AW
18 19 20
21
22 23 24
CA106
CA181
10/10
100P
4
(CH)
CA105
10/10
CA187
0.001
CA107
0.1
CA186
47/10
+B
7TH ORDER ∆∑ MODULAT
CONVERSION LSI
5
ICA110
TC74AC8T
+B
DA103
1
100
KDS160
CA155
2
12P(CH)
2.2K
DA102
4
KDS160
CA154
5
18P(CH)
RA114
2.2K DA101
10
CA153
KDS160
9
18P(CH)
RA122
100
RA113
DA100
13
2.2K
KDS160
12
RA121
100
14
1
RA112
CA152
2.2K
12P(CH)
CA2
100/
+B
3
RA104
75K
RA105
75K
RA108
75K
RA109
75K
ICA100
IX0498AW
6
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