Page 1 Training Manual 50PV450 50PV450 Plasma Plasma Display Display Advanced Single Scan Troubleshooting 50" Class Full HD 1080p Plasma TV (49.9" diagonally) Published May 13 , 201 1...
Page 2: Troubleshooting
• X Drive Boards (3) Drives 15 TCPs (5 per/board). Each TCP drives 384 vertical electrodes. • Main Board: • Main Board: • Front IR/Intelligent Sensor • Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet. May 201 1 50PV450 Plasma...
Page 3 S th T h i i ld b bl t Id tif th Ci Boards and have the ability and knowledge necessary to safely remove and replace any Circuit Board or Assembly. May 201 1 50PV450 Plasma...
Page 4: Lg Contact Information
Also available on the Plasma Page: PDP Panel Alignment Handbook, Plasma Control Board ROM Update (Jig required) Published May 2011 by LG Technical Support and Training LG Electronics Alabama, Inc. 201 James Record Road, Huntsville, AL, 35813. May 201 1 50PV450...
Page 5: Preliminary Matters (The Fine Print)
When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty but may lead to property damage or user injury modifications will not only void the warranty, but may lead to property damage or user injury.
Page 6: Esd Notice
Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help. May 201 1 50PV450 Plasma...
Page 7 1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy. 2. Check the model label. Verify model names and board model matches. 3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc. May 201 1 50PV450 Plasma...
Page 8: Basic Troubleshooting Steps
The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer. May 201 1 50PV450 Plasma...
Page 9 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer. May 201 1 50PV450 Plasma...
Page 10 50PV450 50PV450 PRODUCT INFORMATION SECTION PRODUCT INFORMATION SECTION This section of the manual will discuss the specifications of the 50PV450 Ad 50PV450 Advanced Single Scan Plasma Display Television. d Si May 201 1 50PV450 Plasma...
Page 11 • 600Hz Max Sub Field Driving • Full HD 1080p Resolution • Full HD 1080p Resolution • ENERGY STAR® Qualified • Picture Wizard II Picture Wizard II • Intelligent Sensor • Smart Energy Saving • ISFccc® Ready May 201 1 50PV450 Plasma...
Page 12 Enjoy twice the picture quality of standard HDTV with almost double the pixel resolution. See sharper details like never before. Just imagine a Blu-ray disc or video game seen on your new LG Full HD 1080p TV. Clear Voice Clearer dialogue sound...
Page 13: 600Hz Sub Field Driving
600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process (vs. Comp. 8 sub-field/frame) • No smeared images during fast motion scenes Original Image 10 Sub Fields Per Frame Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals. May 201 1 50PV450 Plasma...
Page 14 50PV450 50PV450 Remote Control Remote Control p/n AKB72914053 TOP PORTION BOTTOM PORTION May 201 1 50PV450 Plasma...
Page 15 50PV450 50PV450 Rear and Side Input Jacks Rear and Side Input Jacks USB port for Software Upgrades, Music, Videos and Photos SIDE INPUTS AC In HDMI 3 Composite Video/Audio REAR INPUTS INPUTS May 201 1 50PV450 Plasma...
Page 16: Generic Plasma Usb Automatic Software Download Instructions
Do not remove AC power or the USB Flash Drive. restarted. Do not turn off Power, during the upgrade 8) When download is completed, you will see process. “COMPLETE”. Software Files are now available from 9) Your TV will be restarted automatically. LGTechassist.com May 201 1 50PV450 Plasma...
Page 17: Manual Software Download
WARNING: Use extreme Caution when using the Manual “Forced” Download Menu. Any file can be downloaded when selected and may cause the Main board to become inoperative if the incorrect file was selected. May 201 1 50PV450 Plasma...
Page 18 DTV SNR: Digital Television Signal to Noise Ratio Over the Air: 8VSB (Above 20 is good) Over the Air: 8VSB (Above 20 is good) Cable Digital: QAM 64 (Above 24 is good) Cable Digital: QAM 256 (Above 30 is good) May 201 1 50PV450 Plasma...
Page 19: Accessing The Service Menu
2) Press “In-Start” 3) A Password screen appears. 4) Enter the Password. Note: A Password is required to enter the Service Menu. Enter; 0000 te ; 0000 Note: If 0000 does not work use 0413. MKJ39170828 105-201M May 201 1 50PV450 Plasma...
Page 20 50PV450 Service Menu First Page 50PV450 Service Menu First Page Bring up the Service Menu using the Service Remote And pressing “In-Start” enter password 0413. : 50PV45*-U* MODEL V3.04.0 Sensor V0.05(0x05) Software Version S/W VER ADC CAL. Unit’s Total Time RGB : OK To Reset press “In Stop”...
Page 21: Clear All
50PV450 Power Off History 50PV450 Power Off History : 50PV45*-U* MODEL V3.04.0 Sensor V0.05(0x05) S/W VER POWER OFF HISTORY LAST HISTORY1 AC DET OFF ADC CAL. RGB : OK LAST HISTORY2 NO SIGNAL OFF YPbPr(SD) : OK LAST HISTORY3 NO SIGNAL OFF...
Page 22 50PV450 DTV SNR Screen 50PV450 DTV SNR Screen : 50PV45*-U* MODEL V3.04.0 Sensor V0.05(0x05) S/W VER ADC CAL. RGB : OK YPbPr(SD) : OK YPbPr(HD) : OK EDID : RGB(OK) HDMI(1:0K 2:0K 3:OK) 0. TOOL OPTION 1. AREA OPTION 2. EPA 3.
Page 23 50PV450 Power Error History 50PV450 Power Error History POWER ERROR HISTORY : 50PV45*-U* MODEL V3.04.0 Sensor V0.05(0x05) S/W VER LAST HISTORY1 VA UVP LAST HISTORY2 VS OCP ADC CAL. LAST HISTORY3 ------------- RGB : OK YPbPr(SD) : OK YPbPr(HD) : OK...
Page 24 50PV450 Adjust Menu: Downloading EDID Data 50PV450 Adjust Menu: Downloading EDID Data 1) Press “ADJ” key. Password is required 2) Scroll down and select item 4 EDID D/L 3) In the EDID D/L screen, press the Cursor Right key. 0. ADC CALIBRATION EDID data is downloaded.
Page 25 50PV450 Adjust Menu: Module Control Shows Control Board Information 50PV450 Adjust Menu: Module Control Shows Control Board Information Press the “ADJ” key on the service remote to bring up the Adjust Menu then enter the password. Item 7 is the Module Control, highlight and cursor right.
Page 26 50PV450 Lip Sync Screens 50PV450 Lip Sync Screens 0. ADC CALIBRATION 1. ADC ADJUST 2. SUB B/V ADJUST 3. 2/B ADJUST 4. EDID D/L 5. 2HOUR OFF : ON 6. UART DOWNLOAD 7. MODULE CONTROL 8. DEBUG MODE : OFF 9.
Page 27 50PV450 Dimensions There must be at least 4 inches of Clearance on all sides 2" 46-5/16" 50.8mm 1176.02mm 23-1/8" Center Center 588.01mm 5-15/16" 135mm 15-1/8" 15-3/4" 384mm 400mm Center 14" 355.6mm 30-5/16" 15-3/4" 769.62mm 400mm 28" Model No. 711.2mm Serial No.
Page 28: Disassembly Section
DISASSEMBLY SECTION This section of the manual will discuss Disassembly, Layout and Circuit Board Identification of the 50PV450 Advanced Single Scan Plasma Display Panel Board Identification of the 50PV450 Advanced Single Scan Plasma Display Panel. Upon completion of this section the Technician will have a better...
Page 29: Removing The Back Cover
Indicated by the arrows. (The Stand does not need to be removed). PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH Of the screws when replacing the back cover. Improper type can damage the front. May 201 1 50PV450 Plasma...
Page 30: Circuit Board Layout
Control M i B Main Board Y-Drive Heat Sink Lower Side AC In Input (part of main) Left “X” Center “X” Right “X” S ft T Soft Touch Invisible Invisible IR/LED Board Keypad Speaker Speaker April 201 1 50PV450 Plasma...
Page 31 50PV450 Connector Identification Diagram PANEL p/n: EAJ61527904 (PDP50R30000.ASLGB 50Inch 1920X1080) Y-DRIVE p/n: EAJ61527931 (PDP50R30000.ASLGB 50Inch 1920X1080) Z-SUB Board UPPER p/n: EBR71728001 Board P203 Z-SUS P811 SMPS Board P218 POWER SUPPLY p/n: EBR71727901 P111 P214 Board P210 P204 P101 p/n: EAY62171101...
Page 32: Disassembly Procedure For Circuit Board Removal
Note: Y-SUS, Z-SUS and Y-Drive Boards are mounted on board stand-offs that have a small collar. The board must be lifted slightly to clear these collars. Behind each board are Rubber pieces that act as a cushion. They may make the board stick when removing. May 201 1 50PV450 Plasma...
Page 33 Remove the board. (Note: Chocolate piece behind upper left of board, move to new board). Front IR / Key Pad / Intelligent Sensor Board Front IR / Intelligent Sensor and Key Pad Board: (Not Removable) attached to front glass. May 201 1 50PV450 Plasma...
Page 34 Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to th b the board. Remove the 5 screws holding the defective X-Drive board in place. Remove the board. Reassemble in reverse order. Recheck VA / VS / VSC / -VY / Z-Bias. May 201 1 50PV450 Plasma...
Page 35: Getting To The X Circuit Boards
Getting to the X Circuit Boards Stand Bracket Blowup k t Bl Left Right Right Warning: Never run the TV with the TCP Heat Sink removed TCP Heat Sink removed Ground Wire Heat Sink Remove the tape. May 201 1 50PV450 Plasma...
Page 36 Gently lift the locking mechanism upward on all TCP connectors L ft X P201 205 Left X: P201~205 Center X: P201~205 Cushion (Chocolate) Right X: P201~205 And pull the TCP from the connector. Flexible ribbon cable connector May 201 1 50PV450 Plasma...
Page 37: Tcp (Tape Carrier Package) Generic Removal Precautions
Ribbon Cable out. Note: TCP is usually stuck down to the Chocolate heat transfer Chocolate material, be Very Careful when lifting up on the TCP ribbon cable lifting up on the TCP ribbon cable. May 201 1 50PV450 Plasma...
Page 38 Remove the screws indicated from the X-Board being removed. All X-Boards pass R G B signals to 5 TCP’s across the bottom of the panel All X-Boards pass R, G, B signals to 5 TCP s across the bottom of the panel. May 201 1 50PV450 Plasma...
Page 39: Circuit Operation, Troubleshooting And Circuit Alignment Section
At the end of this Section the technician should understand the operation of each circuit board and how to adjust the controls. The technician should then be able to troubleshoot a circuit board failure, replace the defective circuit and perform all necessary adjustments. May 201 1 50PV450 Plasma...
Page 40 50PV450 Signal and Voltage Distribution Block Display Panel SMPS OUTPUT VOLTAGES IN STBY STBY_5V (3.47V) Horizontal Y Drive Upper SMPS OUTPUT VOLTAGES IN RUN Electrodes FPCs STBY_5V, AC Det, Error, +5V, 17V to Main Board Sustain Vs, Va and M5V to Y-SUS,...
Page 41: Panel Label Explanation
(12) Panel Model Name (5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White) (6) Trade name of LG Electronics (14) Max. Volts (7) Manufactured date (Year & Month) (7) Manufactured date (Year & Month) (15) Max Amps (15) Max.
Page 42: Adjustment Notice
2) When a “Mal-Discharge” problem is encountered All label references are from a specific panel All label references are from a specific panel. 3) When any abnormal picture issue is They are not the same for every panel encountered. encountered May 201 1 50PV450 Plasma...
Page 43: Switch Mode Power Supply Section
P d t id tif th number. (It may vary in your specific model number). On the following pages, we will examine the Operation of this Power Supply. May 201 1 50PV450 Plasma...
Page 44: Switch Mode Power Supply Overview
There are 2 adjustments located on the Power Supply Board VA and VS. The Adjustments M5V is pre-adjusted and fixed. All adjustments are made referenced to Chassis Ground. Use “Full White Raster” 100 IRE VR901 VR501 May 201 1 50PV450 Plasma...
Page 45 50PV450 SMPS Layout Drawing 50PV450 SMPS Layout Drawing Example Panel Label: Model : PDP 50R3### P811 VA TP VS TP Voltage Setting: 5V/ Va:55/ Vs:201 1) VS N.A. / -190 / 150 / N.A. / 130 2) VS Max Watt : 360 W (Full White)
Page 46: Power Supply Circuit Layout
4Amp/250V VA Source VA VR501 Fuse F302 160.1V Stby 17V Source 390V Run 2.5Amp/250V Bridge Bridge Rectifiers STBY 5V, 5V Source RL103 RL103 To MAIN P701 Main Fuse F101 P813 AC Input 10Amp/250V SC 101 May 201 1 50PV450 Plasma...
Page 47: Power Supply Basic Operation
(opened), it pulls up and places the Controller (IC701) into the Auto mode. In this state, the Controller turns on the power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect. May 201 1 50PV450 Plasma...
Page 48 50PV450 Television Turn On Sequence 50PV450 Television Turn On Sequence F302 In Stand-By Primary side is 160.1V F801 In Run (Relay On) Primary side is 390V (SMPS) AC In Relays Stand By 5V Reg Regulator STBY 3.47V 5.14V RL On...
Page 49: Turn On Sequence Text
When the M5V from the SMPS through the Y-SUS arrives on the Control board, the control develops 3.3V and 1.8V for internal use and 3.3V which is routed down to the each X-Board for each TCP’s low voltage processing voltage. May 201 1 50PV450 Plasma...
Page 50 Pin 1 or 2 Pin 5 Vs Adjust: Place voltmeter on VS TP. Adjust VR901 until the reading matches your Panel’s label. Va Adjust: Place voltmeter on VA TP. Adjust VR502 until the reading matches your Panel’s label. May 201 1 50PV450 Plasma...
Page 51: Power Supply Static Test With Light Bulb Load
AC_DET WILL NOT be present until set comes on, but it’s not used. If AC_DET is missing to the Main board, it will Mute the Audio. Error line WILL NOT be present until set comes on, but it’s not used. May 2011 50PV450 Plasma...
Page 52: Power Supply Static Test (Forcing On The Smps In Stages)
(C) Add a 100Ω ¼ watt resistor from any 5V line to M_ON to make the (Monitor) M5V, VS and VA lines operational. P811 (VS pins 1 and 2) and (VA pins 6) P811 (VS pins 1 and 2) and (VA pins 6). P811 (M5V pin 7) May 201 1 50PV450 Plasma...
Page 53 Note: Pin 18 is grounded on the Main. If opened, the power Odd on top row. supply turns on automatically. Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 54 P811 "Power Supply“ to Y-SUS “P210” Label Diode Check *201V *201V Open *55V Open 5.0V 1.38V * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 55 FG 23.77V Used in the Development of the Drive Waveform (Measured from Floating Gnd) -Vy and VSC generated when Vs arrives on the board. FG10.9V, FG23.77V and 18V generated when M5V arrives on the board. May 201 1 50PV450 Plasma...
Page 56 Distributes Y-Drive Upper Board Logic FG5V Receive Y-Scan Waveform Logic signals needed to scan Display the panel Panel Y-Drive Lower Board Receive Y-Scan Waveform Logic signals needed to generate drive waveform and Scan the Panel May 201 1 50PV450 Plasma...
Page 57 Y-Scan Pins 11~12 P216 To Y-Drive Lower Ribbon Logic Signals from P213 the Control Board P102 WARNING: Do not run set if P213 Va to Left X Board P203 is removed. Damage will occur. Pins 5~7 May 201 1 50PV450 Plasma...
Page 58 To run the 18V and Floating Ground 12) OC1_T 1.74V 1.85V 24V and 10V, Ground CTRL_OE and 13) Gnd 1-2) Gnd supply 5V to Y-SUS 14) CLK 0.68V 1.85V 3) n/c 15) STB 4.27V 1.85V 4-5) VA Referenced to Chassis Gnd May 2011 50PV450 Plasma...
Page 59 2) Adjust VSC (VR501) to Panel’s Label voltage (+/- 1/2V) Voltage Reads Positive -Vy Voltages Reads Positive R548 R548 VSC TP VR501 VSC Adj R527 -Vy TP VR500 VR500 Location: -Vy Adj Center Top Left of board Location: Top Right of board May 201 1 50PV450 Plasma...
Page 60 There is another test point on the Upper Y-Drive board that can be used. Adjustment Area Basically any output pin to any of the FPC X10 Sub Field Firing to the panel are OK to use. (600Hz) Video Video May 201 1 50PV450 Plasma...
Page 61 Note, this TP (VS_DA) can be used as an External Trigger for scope when locking onto the Y-Scan (Scan) or the Z-Drive signal. This signal can also be used to help lock the scope when observing the LVDS video signals. May 201 1 50PV450 Plasma...
Page 62 SET-UP can be made using VR402 and the FIG4 SET-DN can be made using VR401. 40uS It will make this adjustment easier if you use the Area for Set-Dn “Expanded” mode of your scope Expanded mode of your scope. adjustment 180 uSec May 201 1 50PV450 Plasma...
Page 63: Set Up And Set Down Adjustments
(345V p/p ± 5V) SET-DN ADJUST: 2) Adjust VR401 and set the (B) time of the signal to match ADJUSTMENT the waveform above. (180uSec ± 5uSec) LOCATIONS: Center of the VR402 board. May 201 1 50PV450 Plasma...
Page 64: Set Up/Down Adjustments Too High Or Low
This will cause Then reconnect LVDS cable, The black Portions of the select White Too Low Picture to Wash and adjust 88.8uSec Lighten. correctly. Black floor Up Black floor Up. May 201 1 50PV450 Plasma...
Page 65 Y-Drive boards are removed completely. The same is true for P221/P121 and the Upper Y Drive true for P221/P121 and the Upper Y-Drive. TIP: Do not use C540 Left leg to adjust the Y-Scan signal. May 201 1 50PV450 Plasma...
Page 66 4.89V 1.40V PASS_TOP 1.02V Open 4.89V 1.40V DELTA_VY_DET 0.35V Open OC2_TOP 1.98V Open Location Bottom Right of board Location: Bottom Right of board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 67 P203 "Y-SUS" to "X-Drive Left" P121 Label Diode Check Open *55V Open * Note: This voltage will vary in accordance with Panel Label To Left X-Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 68 P210 Label Diode Check *201V Open *55V Open 5.0V 1.38V To SMPS * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 69 OC1_B 1 73V 1.73V 1 85V 1.85V OC2_T 2.73V Open DATA_T 1.85V OC1_T 1.74V 1.85V Y-SUS Board Diode Mode Readings taken with 0.68V 0.68V 1.85V 1.85V all connectors Disconnected. DVM in Diode Mode. 4.27V 1.85V May 201 1 50PV450 Plasma...
Page 70 Pin 14 (9.08V p/p) DATA_T OC1_T Pin 15 (11.15V p/p) Pin 8 (10.67V p/p) All scope settings at 5mSec per/div / 5V per/div All scope settings at 5mSec per/div / 5V per/div All signals taken from Chassis Ground May 201 1 50PV450 Plasma...
Page 71 FG10.9V 4.89V Open 0.55V Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 72 FGnd FGnd FGnd FGnd Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 73 FGnd FGnd FGnd FGnd Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 74 Vscan 107V Open Open Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 75 P218 "Y-SUS" to "Z-SUS" P203 Label Label Diode Check Diode Check *201V Open ER_PASS *98V~102V Open * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 76 P102 pins 6~8 on P214 pins 1 and 2 Tip: Remove board, Ground J81 (CTRL_OE) Jump any 5V supply to pin 7 of P210 or FS202 and it will turn on these supplies for test. May 201 1 50PV450 Plasma...
Page 77 Checked at Cathode Side D505. Floating Ground. Run: 190V Diode check: Open (Black lead on FGnd) Diode check: Open (Black lead on FGnd) Use pins 3~12 on P214 0.56V (Red lead on FGnd) May 201 1 50PV450 Plasma...
Page 78 Board Connected 10A / 125V 10A / 125V Diode Check readings Diode Check readings FS201 (VA) FS201 Va or FS203 Vs 4A / 125V Open FS202 M5V 0.73V FS501 (18V) FS501 18V 2A / 125V 1.28V May 201 1 50PV450 Plasma...
Page 79 0.35V ~ 0.45V Y-SUS D605 O.L. (Overload) Reverse EBR69839001 D602 Q603,Q605 Q610,Q612 HS603 Forward 0.35V ~ 0.45V 0.35V ~ 0.45V 0.4V ~ 0.5V Reverse O.L. (Overload) P102 P216 Q606 Q610 D609 Q607 Q603 D610 P203 P213 May 2011 50PV450 Plasma...
Page 80 Scanning is synchronized by receiving Logic scan signals from the Control board. The 50PV450 uses 12 Driver ICs on 2 Y-Drive Boards commonly called “Y-Drive Buffers” but are actually Gate Arrays connected to 1080 horizontal electrodes across the panel.
Page 81 P121 pins 21~30 to P221 pins 1~9 for the lower P112 P112 with just P121 disconnected. ith j t P121 di Y-Drive buffers. Can not read pins because they are You must remove the Upper covered in silicon. Y-Drive board completely. P121 May 201 1 50PV450 Plasma...
Page 82 It receives FG10.9V from the Y-SUS on P111 pins 11~12 and routs this voltage to IC191 which regulates it down to 5VFG it down to 5VFG. P112 D191 Anode 5VFGnd C th d Cathode 10.9VFGnd 10 9VFG d May 201 1 50PV450 Plasma...
Page 83 FGnd FGnd FGnd FGnd Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 84 Vscan 107V Open 1.54V Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 85 2.4V YT_OC1 2.2V Can not read the pins because YT_LE(STB) 2.6V they are covered in silicon YT_CLK 0.8V YT_DATA 17~20 SUS_DN (FG) FG5V 4.97V 21~23 FG5V FG5V 27~30 27~30 All voltages are from Floating Ground May 201 1 50PV450 Plasma...
Page 86 Y-Scan logic data to all the Buffers, (Gate arrays) on the upper and lower Y-Drive boards. These signals are routed to the Upper Y-Drive through P221 to P121 on the upper. Can not read pins because they are covered in silicon. May 201 1 50PV450 Plasma...
Page 87 FGnd FGnd FGnd FGnd Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 88 Vscan 107V Open 1.54V Black Lead on Red Lead on Floating Gnd Floating Gnd All readings from Floating Ground Y-Drive Upper Y-SUS Board Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 89 Can not read the pins because YT_LE(STB) 2.6V they are covered in silicon YT CLK YT_CLK 0 8V 0.8V YT_DATA 17~20 SUS_DN (FG) FG5V 4.97V 21~23 SUS_DN (FG) 24~30 All voltages are from Floating Ground May 201 1 50PV450 Plasma...
Page 90 Black Lead on Chassis Gnd on pin on pin All voltage readings taken from Chassis Ground All voltage readings taken from Chassis Ground Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 91 Pin 1 (11.15V p/p) Pin 8 (10.67V p/p) OC1 T OC1_T All scope settings at 5mSec per/div / 5V per/div All scope settings at 5mSec per/div / 5V per/div All signals taken from Chassis Ground May 201 1 50PV450 Plasma...
Page 92 To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1). May 201 1 50PV450 Plasma...
Page 93 Tab on the Ribbon cable was improperly seated at the top. This can cause bars, lines, t d t th t intermittent line and other abnormalities in the picture. Remove the ribbon cable and re-seat it correctly. May 201 1 50PV450 Plasma...
Page 94: Front Side
8 Ribbon cables communicating with the Panel s (Horizontal Electrodes) totaling 1080 lines determining the Panel’s Vertical resolution pixel count. Any of these output lugs can be tested. Look for shorts indicating a defective Buffer IC May 201 1 50PV450 Plasma...
Page 95: Operating Voltages
Control Board then to the Z-SUS Generated on the Y-SUS then to the Y SUS Supplied Y-SUS Supplied Control Board then to the Z-SUS. Control board does not use the 18V. Developed on Z-SUS Z Bias May 201 1 50PV450 Plasma...
Page 96: Control Board
Circuits generate erase, Generates VZB (Z Bias) Flexible Printed sustain waveforms 130V Circuits NO IPMs FET Makes Drive waveform Display Simplified Block Diagram of Z SUS (Sustain) Board Simplified Block Diagram of Z-SUS (Sustain) Board Panel May 201 1 50PV450 Plasma...
Page 97 No IPMs FS202 FS202 P204 4A/125V P205 M5V from SMPS to the Y-SUS, +18V generated on the Y-SUS are routed To Z-SUB through the Control board. P206 P201 Logic Signals generated on the Control board. May 201 1 50PV450 Plasma...
Page 98 50PV450 Z-SUS Board Drawing P203 1-2) ER 57VRMS 3) n/c P203 4-5) VS 7-8) Gnd 6) n/c 100uSec 261V p/p 7-8) Gnd 6) n/c 4-5) VS FS201 (VS) 3) n/c VR101 6.3A / 250V 1-2) ER VZB Adj Example: Q109...
Page 99 TIP: The Z-Bias (VZB) Adjustment is a DC level adjustment. This is only to show the effects of Z-Bias on the waveform. This Waveform is just for reference to observe the effects of Z Bias adjustment May 201 1 50PV450 Plasma...
Page 100 Negative Set screen to “White Wash” Lead mode or 100 IRE White input. Adjust VR101 VZ (Z-Bias) while VZB (Z Bias) reading across R156 to match R156 your Panel’s Voltage Label (± 1/2V) Positive Lead May 201 1 50PV450 Plasma...
Page 101 Pin 1 *201V Open 7~18 * Note: This voltage will vary in accordance with Panel Label There are no Stand-By voltages on this connector Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 102 Open Pin 1 ER_UP 0.87V Open ZBIAS 1.9V Open P201 Location: Bottom Left hand side There are no Stand-By voltages on this connector Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 103 50PV450 Z-SUS Board FET Locations P203 1-2) ER Z-SUS 3) n/c 4-5) VS EBR71727901 6) n/c 7-8) Gnd HS10 FS201 (VS) 6.3A / 250V Q109 Q104 Q113 Q106 Q114 D118 D110 HS10 Q102 P204 D111 D114 D108 Q107 Q110 Q103...
Page 104 Tip: If the DC to DC converter generating 18V is running on the Y-SUS, you can jump any 5V to the Y-SUS M5V input pin, leave P105 connected and there will be no need to jump the 17V or the M5V to the Z-SUS. May 201 1 50PV450 Plasma...
Page 105: Control Board Section
(Not used by the Control Board) Developed on the Control Board +1.0V (IC61) for internal use +1.8V (IC52) for internal use. Silk screened as IC25. +3.3V (IC51) for LVDS Power +3.3V (IC53) for the X-Boards (TCPs) May 201 1 50PV450 Plasma...
Page 106: Control Board Component Identification
Control Board Component Identification Control Board Component Identification p/n: EBR71727801 May 201 1 50PV450 Plasma...
Page 107 50PV450 Control Board Layout Drawing 18V To Z-SUS (In P105 pins 23-25) (Out P2 pins 14-15) Diode Check All Connectors 14-15) 18V 18.34V Connected 1.28V IC25 13) n/c (n/c) 11-12) M5V 4.89V P105 1) 0.8V 8) 2.95V 4.89V To Z-SUS...
Page 108: Control Board Temperature Sensor Location (Chocolate)
CONTROL BOARD LOCATION Pin 1 IC103 04) 3.3V 03) Gnd 05) Gnd 05) Gnd 02) Gnd 02) Gnd CONTROL BOARD TEMPERATURE CONTROL BOARD TEMPERATURE 06) 3.3V 01) 3.3V SENSOR LOCATION May 201 1 50PV450 Plasma...
Page 109: Control Board Tp Tips
AUTO AUTO Auto Gen (Internal Automatic Generator) Short these two pins together to generate patterns on the screen for a Panel Test. l T t If patterns do not appear, try removing the LVDS Cable. May 201 1 50PV450 Plasma...
Page 110: Checking The Crystal X1"Clock" On The Control Board
The frequency of the sine wave is 25 MHZ. Mi i Missing this clock signal will halt operation of the panel l ill h lt f th drive signals. Osc. Check: 25Mhz Bottom Leg CONTROL BOARD CRYSTAL LOCATION 1 10 May 201 1 50PV450 Plasma...
Page 111: Control Board Signal (Simplified Block Diagram)
5 per/X-Board 5760 Vertical Electrodes 128 Lines per Buffer 3.3V to Board TCPs 384 Lines output Total 1920 Total Pixels (H) To Center To Center T Ri ht To Right X-Board X-Board 1 1 1 May 201 1 50PV450 Plasma...
Page 112 Voltages and Diode Check Voltages and Diode Check Control board, it is routed to the t l b d it i t d t th from more details. Z-SUS leaving on P2 Pins 14~15. 1 12 May 201 1 50PV450 Plasma...
Page 113 Open ER_DN 0.09V 2.81V 4.89V Open BLOCKING 1.02V 2.84V 4.89V Open DELTA_VY_O 0.35V 2.81V OC2_TOP 1.98V 2.84V Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. 1 13 May 201 1 50PV450 Plasma...
Page 114: Control Board Lvds P31 Signals
Pins 12~17, 22~25, 28~33, 38~41, 44~49, 60~65, 70~73 are video. Pins 19~20, 35~36, 51~52, 67~68 are Clock signals for synchronizing. Pin 79 is active high when the set is placed into 3D mode. Pins are close together. 1 14 May 201 1 50PV450 Plasma...
Page 115: Control Board Lvds P31 Connector Voltages And Diode Check
1.05V * Indicates video signal * Indicates video signal Note: There are no voltages in Stand-By mode. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. 1 15 May 201 1 50PV450 Plasma...
Page 116: Control Board P2 Connector Pin Id And Voltages
0.15V Open VZB2 2.49V Open ER_DN 0.1V Open VZB1 2.53V Open ER_UP 0.87V Open ZBIAS 1.9V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. 1 16 May 201 1 50PV450 Plasma...
Page 117: Control Board (Emi Filter) Explained
The left and right are the B+ route the two side solder points are Chassis Gnd The left and right are the B+ route, the two side solder points are Chassis Gnd. FL1, FL2 and FL5 (5V EMI filters) 1 17 May 201 1 50PV450 Plasma...
Page 118 1 32V 1.32V BLK0 BLK0 1 89V 1.89V 1 32V 1.32V TCP3 RSDS A3P TCP3_RSDS_A3P 1.18V TCP3_RSDS_A2N Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. 1 18 May 201 1 50PV450 Plasma...
Page 119 TCP7 RSDS A3P 1.25V 1.36V TCP9 RSDS A1N 1.18V 3.08V BLK1 1.89V 1.32V TCP7_RSDS_A2N 1.18V 1.36V TCP9_RSDS_A1P 1.25V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. 1 19 May 201 1 50PV450 Plasma...
Page 120 1 18V 1.18V 3 08V 3.08V BLK1 BLK1 1 89V 1.89V 1 32V 1.32V TCP12_RSDS_A2N 1.18V 1.36V TCP14_RSDS_A1P 1.25V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 121 Then it leaves on P321 and goes to the Right X P320 pins 1~2. Control board develops 3.3V (IC53) and routes to each X- Board via ribbon connectors P110 P310 and P310 Board via ribbon connectors P110, P310 and P310. May 201 1 50PV450 Plasma...
Page 122 128 pins to the vertical electrodes So there are a total of 45 buffers output 128 pins to the vertical electrodes. So there are a total of 45 buffers feeding the panel’s 5760 vertical electrodes. Divide 5760 by 3 to determine the horizontal resolution of the panel (1920). May 201 1 50PV450 Plasma...
Page 123 NEVER run the television with this heat sink removed. Damage to the TCPs will occur and cause a defective panel. The Vertical Address b ff buffers (TCPs) have (TCP ) h one heat sink indicated by the arrow. It protects all 15 TCPs. May 201 1 50PV450 Plasma...
Page 124: Tcp 3.3V B+ Check
You can only check for continuity back to IC53, you can not run the set with heat sink removed you can not run the set with heat sink removed, unless you disconnect VA from the Y-SUS to the Left X-Board. May 201 1 50PV450 Plasma...
Page 125 To Test EC. Do not run the set with the heat sink removed. Disconnect VA from all X-Boards by disconnecting Y-SUS. EC reads 27.76V. EC Diode Test: Red Lead on EC (Open). Black lead on EC (Open). TCPs connected or disconnected. VA test: Explained on page 131. May 201 1 50PV450 Plasma...
Page 126 Back side of TCP Ribbon Logic Control Board 3.3V Chocolate 256 total lines 192 lines 384 lines 192 lines Taped Carrier Package ac age 384 Vertical Electrodes Long Black Attached directly Heat Sink to Flexible cable May 201 1 50PV450 Plasma...
Page 127: Tcp Testing
TCP Testing TCP Testing 50PV450 X Board TCP Connector Distribution Any X Board to Any TCP (L) P101~P105 or (C) P201~P205 or (R) P201~P305 Va: Comes from Y-SUS P203 4~5 Va: Comes In on: Va: Comes In on: Arrives Left X : P121 pins 1~2...
Page 128: Tcp Visual Observation. Damaged Tcp
Cause a “Single Pixel Width Line” defect. The line can be Red, Green or Blue. e) A dirty contact at the connector can cause b, c and d also. “TCP” Taped Carrier Package Look for burns, pin holes, damage, etc. May 201 1 50PV450 Plasma...
Page 129 There are no Stand-By voltages on this connector. P320 Center X P120 Left X P320 Right X P321 Center X Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 130 On Va (0.42) Y-SUS connector removed, TCPs connected. removed, TCPs connected. On Va (Open) all connectors removed On Va (Open) all connectors removed, On Va (Open) all connectors removed On Va (Open) all connectors removed, TCPs disconnected. TCPs disconnected. May 201 1 50PV450 Plasma...
Page 131: Drive Connector
* Note: This voltage will vary in accordance with Panel Label. There are no Stand-By voltages on this connector. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 132 43 TCP2_RSDS_A3N 1.18V Open TCP4_RSDS_A1N 1.18V Open White hash marks 57~60 pins count as 5 count as 5 3.3V TP Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 133 43 TCP7_RSDS_A3N 1.18V Open 22 TCP9_RSDS_A1N 1.18V Open 57~60 pins White hash marks 3.3V TP 3.3V TP count as 5 Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 134 43 TCP12_RSDS_A3N 1.18V Open 22 TCP14_RSDS_A1N 1.18V Open 57~60 pins White hash marks 3.3V TP 3.3V TP count as 5 Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 135: Main Board Section
Distributes Key_CTL_0 and Key_CTL_1 to the Front IR Board for Front Key Pad detection. • Receives Intelligent Sensor data from the Front IR/Key Board (via SCL/SDA). • Drives front Power LEDs. • Distributes +3.3V_ST and 5V_MST to the Front IR Board. May 201 1 50PV450 Plasma...
Page 136: Main Board Layout And Identification
Main Board Layout and Identification Main Board Layout and Identification P701 LVDS P301 to SMPS Microprocessor Video processor P704 to Ft IR USB 1 HDMI 3 P801 Speakers Silicon Silicon Tuner HDMI 2 HDMI 1 May 201 1 50PV450 Plasma...
Page 137 50PV450 Main (Front and Back) Layout Drawing P301 "Main" to P813 "SMPS" Label Stby Diode P701 MAIN BOARD 0.46V 5.1V 0.88V 5.1V p/n: EBU60952917 or 2.87V 4.9V 3.05V Error_Det p/n: EBR72650101 9-12 13-14 3.4V 5.1V 1.02V Stby_5V 2.4V 2.6V RL_ON AC_Det 4.4V...
Page 138 50PV450 Main Front Layout Drawing MAIN BOARD p/n: EBU60952917 or p/n: EBR72650101 P701 P301 IC201 L313 IC308 1.3V_VDDC IC203 P704 Flash Memory HDMI3 Mstar IC402 To Speakers IC801 X402 (All Pins 8.5V) 25Mhz Micro/Video 12Mhz Microprocessor PVSB Processor Audio Amp...
Page 139 50PV450 Main Board Front Side Component Voltages IC203 inbond Serial Q402 Tuner CVBS Flash Pin Buffer (Analog) [1] 3.3V [9] 0V [B] 1.1V [2] 3.3V [10] Gnd [E] 1.7V [3] n/c [11] n/c [C] Gnd [4] n/c [12] n/c [5] n/c...
Page 140 50PV450 Main Back Layout Drawing MAIN BOARD p/n: EBU60952917 or p/n: EBR72650101 IC301 3.3VST 3 2 1 Q301 IC302 IC202 IC501 1.8V_MST Q302 IC704 5V_MST NVRAM HDCP USB 5V IC303 3.3V_MST Q504 IC304 Q304 Q303 RS232 Buffer +1.2V_DVDD IC504 D502 +3.3V_MST...
Page 141 50PV450 Main Board Back Side Component Voltages IC202 NVRAM IC703 RS232 Tx/Rx Q702 RS232 Pin Tx Buffer IC304 1.2V_DVDD Reg IC502 IC503, IC504 [1] 3.3V [B] 0.6V [1] Gnd Dig Ch Only EDID Data [2] 5.6V [C] 0V [2] Gnd...
Page 142: Main Board Tuner Explained
The Tuner in this set is discreet components (Silicon Tuner) and no longer a self contained unit (can). Check for Tuner B+: 3.3V on IC306 and 1.8V on IC307 Back Side bottom left hand side Front bottom right hand side Front bottom right hand side May 201 1 50PV450 Plasma...
Page 143 Right Side 3.50V p/p X1 R X1 Runs all the time (Micro Crystal) ll th ti t l) X402 25MHZ X402 X402 1.6V 1.48V Left Side 2.8V p/p Right Side 4.2V p/p MAIN Board Crystal Location May 201 1 50PV450 Plasma...
Page 144 Note: AC Det line if missing, the TV will attempt to turn on, but shut right back off. Note: Pin 18 is grounded on the Main. If opened, the power supply turns on automatically. Diode Mode Check with the Board Disconnected. DVM in the Diode mode. May 201 1 50PV450 Plasma...
Page 145 3.3V 1.3V 3.3V_MST 1.24V 3.3V_Multi is actually is actually LED_BLUE 1.02V +5V_MST Touch_Ver_Check 0.19V 0.19V 1.75V Soft Touch Key board sensitivity board sensitivity Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 146 Voltage and Diode Check P801 P801 "Main" to "Speakers" Label Diode Check 8.5V Open 8.5V Open 8.5V Open 8.5V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 147: Audio Out
Main Board Location For P801 Diode Check I2C Master Clk pin 15 I2C Master Clk pin 15 DATA pin 23 DATA pin 23 AC_DET pin 19 SCLK pin 24 LRCLK pin 20 TAS_RESET pin 25 May 201 1 50PV450 Plasma...
Page 148 (2) Pull the Cable from the (2) Pull the Cable from the Connector Connector May 201 1 50PV450 Plasma...
Page 149: Main Board
Main Board P701 Location TIP: Use the Control Board side for measurements. Test Points are available. Use the Pin cross Use the Pin cross reference chart on the left because the pins are inverted on the Control Board. May 201 1 50PV450 Plasma...
Page 150 PC_SER_CLK 0.5V 0.98V Note: RE1+ 1.3V 0.73V Use the Control Board for Voltage Measurements. See Pin cross reference t bl table on preceding page. Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 151 Pin 13 is Touch Version Check pin to adjust the sensitivity of the Soft Touch Keys. The IR/STKB also has the Power LEDs. The control for the Power LEDs is routed in P100 pins 5 (LED RED) and 12 (LED BLUE) (LED_RED) and 12 (LED_BLUE). May 201 1 50PV450 Plasma...
Page 152 After removing the bottom metal shield plate, the panel screws must be removed to lift up the panel in order to see the board. IC102 IR IC102 IR Receiver Receiver Receiver Label Readings V: B+ 3.24V O: Output 2 85V 2.85V G: Ground May 201 1 50PV450 Plasma...
Page 153 3.49V 1.15V LED_B/BUZZ 1.48V 1.45V +3.3V_Normal 0.35V 3.34V 0.53V LED_R/BUZZ 2.67V S/T_SCL 3.55V 3.49V 1.86V S/T_SDA 3.55V 3.49V 1.86V Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. May 201 1 50PV450 Plasma...
Page 154 This in turn pulls down the Key 1 and Key 2 lines to be interpreted P900 “Main” (No Key Pressed) by the Microprocessor. L b l Label STBY STBY KEY 1 3.26V 3.28V KEY 2 3.26V 3.28V May 201 1 50PV450 Plasma...
Page 155: Invisible Speaker System Section
Invisible Speaker System Overview (Full Range Speakers) p/n: EAB62028901 The 50PV450 contains the Invisible Speaker system The 50PV450 contains the Invisible Speaker system. The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports.
Page 156 When Printing the Interconnect diagram, print from the Adobe version and print onto 1 1X17 size paper for best results. version and print onto 1 1X17 size paper for best results. t 1 1X17 i t 1 1X17 i May 201 1 50PV450 Plasma...
Page 157 50PV450 (50R3 Panel) CIRCUIT INTERCONNECT DIAGRAM 50PV450 (50R3 Panel) CIRCUIT INTERCONNECT DIAGRAM FS201 Vs Diode Check reads Open with Board P813 "SMPS" to P301 "Main" P203 Connect Scope between Waveform TP J54 on Disconnected or Note a: VR402 345V p/p ± 5V...
Page 158 50PV450 LVDS P31 Control Board from P701 Main Board Waveform Samples P701 Control Main RA1_- Video Signal RB1_- Video Signal RC1_- Video Signal CLK1_- Clock Signal P31 LVDS (Pin 12) 10Msec / 613mV P31 LVDS (Pin 14) 10Msec / 627.5mV...
Page 159 50PV450 Main Board (Front Side) Component Voltages IC203 Winbond Serial IC308 +1.3V_VDDC Q402 Tuner CVBS Reset D504 B+ Routing Flash Pin Regulator Pin Buffer (Analog) Pin Speed Up Pin to IC503 [1] 3.3V [1] 0.8V* [B] 1.1V [A1] Gnd [A1] 5.1V [2] 3.3V...
Page 160 End of End of the 50PV450 Presentation the 50PV450 Presentation This concludes the Presentation Thank You Thank You May 201 1 50PV450 Plasma...

LG 50PV450 Manual

Quick Links

Troubleshooting

Related Manuals for LG 50PV450

Summary of Contents for LG 50PV450

Table of Contents