North Star HRAM-64 User's & Technical Manual

Horizon random access memory

Advertisement

Quick Links

N o r t h S t a r ^
North Star Computers, Inc.
14440 C a ta lin a St., San Leandro, C A 94577 USA
(415) 3 5 7 -8 5 0 0
TWX/Telex (910) 366-7001
HRAM
HORIZON Random Access Memory
USER /TECHNICAL MANUAL
HORIZON is a registered trademark of North Star Computers, Inc.
Copyright © 1981, by North Star Computers, Inc.
All Rights Reserved
00406B

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the HRAM-64 and is the answer not in the manual?

Questions and answers

Summary of Contents for North Star HRAM-64

  • Page 1 (415) 3 5 7 -8 5 0 0 TWX/Telex (910) 366-7001 HRAM HORIZON Random Access Memory USER /TECHNICAL MANUAL HORIZON is a registered trademark of North Star Computers, Inc. Copyright © 1981, by North Star Computers, Inc. All Rights Reserved 00406B...
  • Page 3: Table Of Contents

    CONTENTS Pag£ Section INTRODUCTION General Description Warranty Information Specifications INSTALLING AND REMOVING THE HRAM Installation Removal IMPLEMENTING HRAM OPTIONS Example Memory Configurations 3.1.1 Example 1: Three Banks 3.1.2 Example 2: Three Banks 3.1.3 Example 3s Four Banks Bank Switching 3.2.1 Designating Switched Areas 3.2.2 Designating I/O Port Control Bit...
  • Page 4 Page Section 3.5.1 Designating I/O Port Control Bits 3-20 3.5.2 Designating Parity Error Response 3-21 3.5.3 Software Instructions 3-22 3.6 Board and Schematic Revision Levels 3-22 TESTING THE HRAM THEORY OF OPERATION Overview Address Multiplexer Refresh Logic Port CO Detector Address Latch Address Decoder Jumper Area JP1...
  • Page 5 APPENDICES RAM Chip Location Chart Bus Signals Used by HRAM HRAM 64K - Parts List HRAM 64K - Schematics Reader Response Form HRAM USER/TECHNICAL MANUAL...
  • Page 7: Introduction

    GENERAL DESCRIPTION The HRAM board is a random access memory board designed for use in the HORIZON computer system. There are three versions of the HRAM board: HRAM-64 with 64K bytes, HRAM-48 with 48K bytes, and HRAM-32 with bytes.
  • Page 8 The item should be returned to the dealer from whom the product was purchased, for implementation of the warranty. When sending the item to the factory repair, the dealer must call the North Star Technical Hotline receive a Return Material Authorization (RMA) number to accompany the item to the factory.
  • Page 9: Specifications

    The HRAM specifications are given in Table 1-1. Table 1-1 HRAM Specifications Storage 32K bytes for the HRAM-32 Capacity 48K bytes for the HRAM-48 64K bytes for the HRAM-64 Bits per Byte Eight data bits and one parity bit. Access Time 300 ns typical HRAM...
  • Page 11: Installing And Removing The Hram

    INSTALLING AND REMOVING THE HRAM CAUTION The electronic components on the HRAM board may be damaged by the static electricity which often builds up in the human body. Before touching the HRAM board, discharge this electricity by touching a grounded metal object, such as the chassis of a Horizon which is plugged into the wall outlet.
  • Page 12: Installation

    INSTALLATION To install the HRAM in the HORIZON, hold the memory board in one hand and touch the metal chassis of the HORIZON with the other hand as shown in Figure 2-2. This will eliminate any difference in static potential between the memory board and the computer.
  • Page 13: Removal

    REMOVAL WARNING NEVER REMOVE THE HRAM BOARD UNTIL THE POWER IS COMPLETELY OFF IN THE HORIZON. To remove the HRAM, grasp the upper edge of the board. Avoid putting excessive pressure board components, and be careful of the sharp wire tips that project out of the back of the board.
  • Page 15: Implementing Hram Options

    IMPLEMENTING HRAM OPTIONS HRAM options are implemented by inserting and removing mini jumper plugs at various locations on the PC board and by changing the setting of the Memory Address switches. Figure 3-1 shows the locations of the jumper areas and the address switches on a 64K revision E board.
  • Page 16 Jumper Plug Areas and Memory Address Switches Component;. üs£ - Select the active memory areas. - Selects the bank status on reset and selects I/O control bits for bank switching and parity. - Selects areas to be bank switched. - Selects the parity error response. - Implements the First Quadrant option.
  • Page 17: Example 1: Three Banks

    HORIZON system. 3.1.1 EXAMPLE 1: THREE BANKS In this example, the HORIZON contains three HRAM-64 Revision B boards, a standard Micro-Disk Controller board at E800H, and a Floating Point board at EFFOH. The switches and jumper plugs are shown in Figure 3-2.
  • Page 18 In this case, the system contains three banks with the maximum 56K apiece and a resident operating system of 6K that is always left on. Each bank is switched off and on as a single unit. Bank 1 is configured to be turned on after the system is powered up or reset.
  • Page 19: Example 3S Four Banks

    0000H. All are bank switched off and on as single units, and all are programmed to be turned off when the system is powered up or reset. Parity checking is left in the standard North Star configuration. HRAM USER/TECHNICAL MANUAL...
  • Page 20 Parity checking is left in the standard North Star configuration. HRAM...
  • Page 21: Bank Switching

    BANK SWITCHING Bank switching is a capability that allows multiple memory boards to take turns using the same address region. Different memory "banks" are swapped in and out of the address region under software control, thus extending the HORIZON'S memory capability beyond the limitation set by the processor's 16 address bits.
  • Page 22 Table 3-1 Bank Switching Configurations Jumper Area JP2 Description Both halves of the board a l w a y s B a n k switching is disabled on this board. • • Both halves of the board bank switchable. • •...
  • Page 23: Designating I/O Port Control Bit

    The last 8k portion of the HRAM board, E000H through FFFFH, may be enabled in a manner different than that described above, depending upon the setting of the Memory Address switches (see Section 3.3). 3.2.2 Designating I/O Port Control Bits The user can choose any one of the six available I/O bits in Port COH to control the switching of each bank.
  • Page 24: Software Instructions

    64K cannot be divided into two different 32K banks. It is possible to use earlier North Star RAM-32 or RAM- 16 boards in conjunction with HRAM boards to create a bank switching system.
  • Page 25: Bank Status On Reset

    Take care to allow only one bank to be on at a time. Section 3.2.4 describes the method for insuring that only one bank comes on when power is first turned on. When switching banks, the previous bank must be switched off before the next bank is switched on.
  • Page 26 To enable bank switching, designate one bank as the bank to be turned on whenever the system is powered up or reset. On the board(s) that constitute that bank, move the jumper plug (s) to the position shown in Figure 3-8. This will cause all the memory in this bank to be on after the system is powered up or reset.
  • Page 27: Memory Address Switches

    MEMORY ADDRESS SWITCHES 3.3.1 Revision B Board The Memory Address switches allow the HRAM Board to respond to some sections of the memory address space and not to others. The correspondence between the Memory Address switches SI and S2 on the revision B board and the address space is shown in Figure 3-10.
  • Page 28: Revision E Board

    Each of the switches in SI corresponds to one 8K section of the address space. The last 8K section is further divided into IK sections by the switches in S2. For addresses 0000H through DFFFH, each 8K section is controlled by the switches in SI and the bank switching scheme described in Section 3.2.
  • Page 29 Memory Address Switches - Revision E Board I/O INSTRUCTIONS MEMORY ADDRESSES MEMORY ADDRESS SWITCH S2 3-15 USER/TECHNICAL MANUAL HRAM...
  • Page 30 Each of the switches in SI corresponds to one 8K section of the address space. The last 8K section is further divided into IK sections by the switches in S2. For addresses 0000H through DFFFH, each 8K section is controlled by the switches in SI and the bank switching scheme described in Section 3.2.
  • Page 31 Table 3-2 S2 Switch Pairs Description Switch Pair in S2 Corresponding 2K section is always off. Corresponding 2K section w h e n bank s w i t c h e d off. This configuration normally used. Corresponding 2K section is on when bank is switched Corresponding 2K section is always on.
  • Page 32: 32K Board

    3.3.3 32K BOARD If the switches in Memory Address switch SI are not set properly, the HRAM-32 can respond to more than 32K of address space. For example, if switch 0 and 8 of SI are both on, the same 8K of me mory responds addresses 0000H through 1FFFH and 8000H through 9FFFH.
  • Page 33: First Quadrant Option (Revision E Board Only)

    FIRST QUADRANT OPTION The First Quadrant option is only available on the revision E HRAM board and is used only with the 48K version of the board. When the option is implemented, it causes the board to respond to the last 48K of the memory address space (4000H through FFFFH) instead of the first 48K (0000H through BFFFH).
  • Page 34: Parity Checking

    PARITY CHECKING The parity checking feature makes it possible to detect a memory read or write error and generate a program interrupt if an error occurs. 3.5.1 Designating I/O Port Control Bits The HRAM uses I/O port COH to arm and disarm parity error interrupts.
  • Page 35: Designating Parity Error Response

    3.5.2 Designating Parity Error Response When the parity logic is armed and an error occurs, one of ten possible interrupts can be generated. The position of the mini-jump in JP3 allows the user to select one of eight vectored interrupts (VIO - VI7), one nonvectored interrupt (PINT), or one non-maskable interrupt (NMI) .
  • Page 36: Software Instructions

    JP3 Set to Disable Parity Error Interrupts Figure 3-14 3.5.3 Software Instructions The following instructions indicate how to arm and disarm parity checking. This example assumes that bit 6 has been selected. MVI A,41H ; Clear any previous parity errors and OUT OCOH ;...
  • Page 37: Testing The Hram

    TESTING THE HRAM It is always advisable to test the HRAM board before actually using it. To test the HRAM, install it in a HORIZON system and run the RAMTEST3 or RAMTEST5 diagnostic programs. These programs are on the DOS 5.2 diskette. They are described in the System Software Manual Addendum, dated July 1980.
  • Page 39: Theory Of Operation

    RAM chip known as the 4116. These chips are arranged in rows to form 16K 9-bit bytes. The HRAM-64 contains four rows of RAM chips, the HRAM-48 has three rows, and the HRAM-32 has two rows. Since each byte includes a...
  • Page 40 HRAM Block Diagram PROCESSOR ------ > . + 18V +12V VOLTAGE REGULATORS -18V Figure 5-1 USER/TECHNICAL MANUAL HRAM...
  • Page 41: Address Multiplexer

    The 16-bit memory address enters the board on the A Bus and is used by the HRAM in the following ways: The four most significant bits are used by the Address Latches and decoders to determine if this board should respond to the memory address. The two most significant bits are used by the Cycle Control and Strobe Generator to determine which of the four rows of RAM chips should respond.
  • Page 42: Port Co Detector

    PORT CO DETECTOR The Port CO Detector examines the low order eight bits of the memory address (AO through A7) and brings signal PORT MATCH to a slow level when these bits contain a hexadecimal CO. PORT MATCH is used to determine when an output instruction is being issued to the HRAM board.
  • Page 43: Jumper Area Jp1

    Each switch pair can cause its associated memory address space to be always on, always off or switched along with the memory bank. JUMPER AREA JPl This jumper area is used to select the following options on the HRAM Board: It determines the status of the memory bank on this HRAM Board when the RWR signal in low (see Section 3.2.4).
  • Page 44: Strobe Generator

    It determines which interrupt to generate in response to a parity error (see Section 3.5.2). j u m p e r plug area J P 3 m a k e s this determination by connecting the PARITY INT signal to one oflO interrupt lines: V10 THROUGH V17, NMI and PINT.
  • Page 45 The Strobe Generator selects one of four rows of RAM chips by generating one of four row address strobes: RAS 1, RAS 2 , RAS 3 or RAS 4. The strobe that is generated depends on the memory address, the size of the memory and in some cases, on whether or not the First Quadrant option is selected (see Section 3-4).
  • Page 46 Table 5-2 Chip Selection-64K or 48K, First Quadrant Option active R O W Address Range Chip Locations Address Strobe 0000H - 3FFFH RAS “1 4A-4J — 2A-2J 4000H - 7FFFH RAS 2 2A-2J 8000H - BFFFH RAS 3 3A-3J 3A-3J C000H - FFFFH RAS 4 1A-1J...
  • Page 47: Voltage Regulators

    5.10 VOLTAGE REGULATORS There are three voltage regulators on the HRAM board. These regulators produce +12 volts, +5 volts and -5 volts. All three of these voltages are used by the RAM chips. The +5 volts is also used by the digital logic chips.
  • Page 49: Troubleshooting

    TROUBLESHOOTING The procedures in the following sections may be used to troubleshoot the HORIZON system when it is suspected that the HRAM board is not functioning properly. WARNING DO NOT REMOVE THE COVER FROM THE HORIZON UNTIL THE POWER IS OFFf THE STOPPED, INDICATOR LIGHT ON THE FRONT PANEL HAS FULLY DIMMED.
  • Page 50: Change Board Slots

    CHANGE BOARD SLOTS Turn off the HORIZON power. Move the HRAM to another slot in the card cage and insert the board firmly in the connector. Turn the power back on, and test the HRAM again. CHECK HRAM CONFIGURATION Turn off the HORIZON power. Remove the HRAM and recheck the jumper plugs and the Memory Address switches.
  • Page 51: Replace Hram

    Turn the power back on, and test the system with the spare board installed. REPAIR PROCEDURES If it is determined that the HRAM board is defective, it can be returned to any North Star Authorized Service Center for repair. HRAM USER/TECHNICAL MANUAL...
  • Page 53 APPENDIX A HRAM CHIP LOCATION CHARTS HRAM-64 E000 6000 8000 A0 00 0000 2000 4000 c o o o HRAM-48 F000 0000 2000 4000 8000 A000 COOO 6000 — — — HRAM-32 F000 4000 6000 8000 A0 00 c o o o...
  • Page 55 HRAM INTERFACE SIGNALS APPENDIX B Type of Signal Signal Name Description 16 bits of address from Address A15-A0 the processor Data D17-DI0 8 bits of data to the processor D07-DO0 8 bits of data from the processor Cycle Status SMEMR True on memory reads SOUT T r u e...
  • Page 56 Description Type of Signal Signal Name Miscellaneous PHASE 2 Clock from processor- True when processor is being reset due to power on clear logic or the rear panel reset switch. PHANTOM Not used in a standard HORIZON HRAM User/Technical Manual...
  • Page 57 HRAM-64 PARTS LISTS APPENDIX C REVISION B BOARD ITEM DESCRIPTION 00127 HRAM PC BOARD 43045 IC 74S00 SCHOTTKY 5Cf 6C 43047 IC 74S10 SCHOTTKY 5B, 7C SCHOTTKY 43048 IC 74S20 43050 IC 74S74 SCHOTTKY 43051 IC 74S113 SCHOTTKY 43001 IC 74LS00...
  • Page 58 DESCRIPTION RESISTOR NETWK 2.2K (6 POS) 61003 CAPACITOR 22 MF 20V 01041 C8,C9,CIO CAPACITOR 6.8 MF 35V 01022 Cl ,C2 01021 CAPACITOR 2.2 MF 25V C4-C7 CAPACITOR 47 PF 01002 BY-PASS CAPACITOR .047 MF CER 01001 VOLTAGE REGULATOR 7805 65002 VOLTAGE REGULATOR 79L05 65003 VOLTAGE REGULATOR 79L05...
  • Page 59 REVISION E BOARD ITEM DESCRIPTION 64K RAM FAB D00127 00127 IC 74S00 5C, 6C 43045 SCHOTTKY 5B,7C SCHOTTKY 43047 IC 74S10 IC 74S20 SCHOTTKY 43048 SCHOTTKY 43050 IC 74S74 IC 74S113 SCHOTTKY 43051 43001 IC 74S500 43004 IC 74S504 IC 74S508 43006 43009 IC 74S514...
  • Page 60 DESCRIPTION ITEM 61001 RESISTOR NETWORK 22 OHM 16P, RESISTOR NETWORK 4.7KUOPOS) 61006 61003 RESISTOR NETWORK 2.2K(6POS) 01041 CAPACITOR 22MF 20V 08,09,010 CAPACITOR 6.8MF 35V 01022 C1,C2 01043 CAPACITOR 2.2MF 35V C4,C5, CAPACITOR 47PF 01002 C6,C7 BY-PASS CAPACITOR .047MF CER. 01001 VOLTAGE REGULATOR 7805 65002 VOLTAGE REGULATOR 7812...
  • Page 61 DESCRIPTION ITEM 13093-08 HEADER, DOUBLE ROW 3 PIN 13093-04 HEADER, DOUBLE ROW 4 PIN 13093-10 HEADER, DOUBLE ROW 10 PIN 13087 CONN. PCB-"MINI-JUMPER" JPK3EA) JP4(2EA) JP2(2EA) JP3(3EA) 1309302 HEADER, DOUBLE ROW, 2 POS 1309802 HEADER, SINGLE ROW, 2 POS HRAM User/Technical Manual...
  • Page 63 HRAM SCHEMATICS NOTES Use revision A schematics with an assembly revision B board. This designation is marked on the component side of the board. Use revision C schematics with an assembly revision E board. This designation is marked on the component side of the board.

Table of Contents