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Summary of Contents for Rockchip RK3568 EVB
- Page 1 RK3568 EVB User Guide Release Version: V1.2 Release Date: 2022.01.25...
- Page 2 The products, services or features you purchase shall be bound by the commercial contracts and terms of Rockchip, and all or part of the products, services or features described in this document may not be within the scope of your purchase or use. Unless otherwise agreed in the contract, Rockchip Electronics Co., Ltd. makes no express or implied representations or warranties regarding the contents of this document.
- Page 3 Overview This document is intended to introduce the basic functions and hardware characteristics, multi-function hardware configurations and software debug methods of RK3568 EVB, aiming to help developers to get start with RK3568 EVB and solution more quickly and correctly. Product version...
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Page 4: Revision History
Revision History This revision history recorded description of each version. Revision Date Version No. Author Revision History 2021-02-05 V1.0 Initial Release 2021-06-24 V1.1 Detailed description of optimization 2021-09-07 V1.2 Detailed description of optimization Copyright @ 2022 Rockchip Electronics Co., Ltd. -
Page 5: Acronyms
Video Graphics Array 电脑显示视频Figure像标准接口 Android Debug Bridge 安卓调试桥 Infrared Radiation 红外线 SPDIF Sony/Philips Digital Interface 索尼/飞利浦数字音频接口 Real-time clock 实时时钟 RGMII Reduced Gigabit Media Independent Interface 精简吉比特介质独立接口 WIFI Wireless Fidelity 无线保真 Camera Interface 摄像头接口 Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 6: Table Of Contents
3.10 JTAG Debug Interface ......................... 21 3.11 SPDIF Audio Interface ......................... 21 3.12 TF Card Interface ..........................22 3.13 MIPI Input Interface ..........................22 3.14 MIPI/LVDS Output Interface ......................24 3.15 HDMI Output Interface ........................26 Copyright @ 2022 Rockchip Electronics Co., Ltd... - Page 7 3.19 CIF/EBC/RGMII/BT656 Extension Interfaces ................... 31 3.20 USB OTG/HOST Interface ........................32 3.21 Ethernet Interface ..........................33 3.22 PCIe Interface ............................34 3.23 SATA Interface ............................. 34 3.24 WIFI ..............................35 4 Notice ................................... 36 Copyright @ 2022 Rockchip Electronics Co., Ltd...
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Page 8: Figures
RK3568 EVB User Guide Figures Figure 1-1 RK3568 Block Diagram ....................1 Figure 1-2 RK3568 EVB System Diagram ..................2 Figure 1-3 EVB TOP Surface ......................5 Figure 1-4 EVB Bottom Surface ....................... 6 Figure 1-5 Driver Installed Successfully................... 7 Figure 1-6 Loader Flashing Mode .................... - Page 9 Table 3-3 MIPI DSI _TX1 Signal Definition ................. 25 Table 3-4 eDP Video Signal Definition ..................27 Table 3-5 Audio MIC Array Signal Definition ................30 Table 3-6 CIF, EBC, RGMII, BT656 Extension Interfaces Signal Definition ....... 32 Copyright @ 2022 Rockchip Electronics Co., Ltd VIII...
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Page 10: Overview
There are high-performance external memory interfaces in RK3568 to ensure high-capacity and high- stability system operating memory bandwidth, and it supports multiple memory models such as DDR3, DDR3L, LPDDR3, DDR4, LPDDR4, LPDDR4X, etc. 1.2 RK3568 Block Diagram Figure 1-1 RK3568 Block Diagram Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 11: System Introduction
1.3 System Introduction 1.3.1 System Diagram RK3568 EVB system takes RK3568 as a core chip, with PMIC RK809-5 power management chip， peripheral BUCK and LDO power chips, DDR4, eMMC and SATA/PCIe and other functional external device interfaces, integrating a stable and mass produced solution. The detailed system block diagram is as follows:... -
Page 12: Functional Interfaces
SARADC: 5-channel ADC 2.54mm standard male pin; UART: Support external 3 UART + 2 UART (Option) function devices; CAN: Support one CAN bus; SPDIF: Support digital audio interface 1.3.3 Functional Interfaces Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 13: Table 1-1 Pcb Functional Interfaces Introduction
RGMII 10M/100M/1000M （ 2 Port ） Audio(SPK 、 MIC 、 Headphone) SATA3.0 Interface PCIe3.0 Interface IR Receive Gyroscope+G-Sensor UART Debug UART （ 5 Port ） JTAG Interface System Key SARADC （ 5 Port ） SPDIF Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 14: Functional Modules Layout
RK3568 EVB User Guide 1.3.4 Functional Modules Layout EVB functional interfaces layout are showed as follows： Figure 1-3 EVB TOP Surface Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 15: Components
RK3568 EVB User Guide Figure 1-4 EVB Bottom Surface 1.4 Components RK3568 EVB package includes the following components: One RK3568 EVB One DC adapter: input 100V AC~240V AC, 50Hz, output DC12V/2A Screen: 5.5 inch MIPI screen with 1920*1080 resolution ... -
Page 16: Firmware Upgrade
The driver file almost covers all current operating systems which can be supported. Figure 1-5 Driver Installed Successfully 1.6.2 Firmware Upgrade There are two ways to upgrade RK3568 EVB firmware: Enter Loader upgrade mode: Ensure that SARADC_VIN0 is low before the system is powered on, and the system will enter the Loader state. -
Page 17: Figure 1-6 Loader Flashing Mode
5. Click Execute to enter the upgrade state. The right side of the tool is the progress display bar, which displays the download progress and verification status. Figure 1-7 Maskrom Flashing Mode Serial Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 18: Port Debugging
1.5M (RK3568 supports 1.5M baud rate by default), and finally click the "open" button to enter the serial debugging interface. Figure 1-9 Serial Port Tool Configuration Interface Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 19: Adb Debug
3. On the PC, Click start ---run ---cmd, enter the directory where the adb.exe tool is located, and input "adb devices" if the connected device is searched, indicating that the connection is successful; 4. Input "adb shell" to enter ADB debug. Figure 1-11 ADB Connected Successfully Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 20: Hardware Introduction
RK3568 EVB User Guide 2 Hardware Introduction 2.1 EVB Picture Figure 2-1 EVB Picture Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 21: Power Diagram
Max: GiGa PHY0/1 IO Max: Figure 2-2 RK3568 EVB Power Diagram 2.3 I2C Address The EVB reserves a reach peripheral interfaces. I2C peripherals debugging is relate to I2C channel multiplexing. Table 2-1 shows the match relation between I2C address of the EVB and voltage level, to avoid address conflicts and mismatched. -
Page 22: Extension Connectors
Users may use extension boards in practical use. There are several types of connectors for development boards: J5200, J5400, J5600, JP7700 are vertical double-row 30pins with 0.5mm pins and 1mm pitch (corresponding to the FPC cable with 0.5mm pitch, 30pin), the dimensions are as follows: Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 23: Figure 2-3Vertical Double Row 30 Pin Pcb Package With 1Mm Pitch
RK3568 EVB User Guide Figure 2-3Vertical Double Row 30 PIN PCB Package with 1mm Pitch Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 24: Reference Materials
0.5mm, 40pin), the dimensions are as follows: Figure 2-4 Flip and 0.5mm Pitch and 40 PIN FPC PCB Package 2.5 Reference Materials The reference diagram and PCB version information of the EVB are as follows: RK_EVB1_RK3568_DDR4P216SD6_V10_20200908.DSN RK_EVB1_RK3568_DDR4P216SD6_V10_20200908GXL.brd Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 25: Evb Modules Introduction
There is a Maskrom key reserved on the EVB for access to Maskrom to upgrade firmware easily SPI/NAND Flash The EVB reserves SPI/ NAND Flash location The DDR on the EVB is two 512Mx16bit DDR4, with a total capacity of 2GB Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 26: Figure 3-2 Ddr4, Emmc And Reserved Nand Flash Location
Figure 3-2 DDR4, eMMC and Reserved NAND Flash Location Figure 3-3 Reserved SPI Flash Location The key Location of EVB for entering Maskrom flashing mode: Figure 3-4 The Key Location for Entering Maskrom Flashing Mode Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 27: Rtc Circuit
RECOVER key on the EVB; in addition, there is also a RESET key on the board, which is convenient for resetting and restarting the device through hardware; and several other commonly used keys: V+, V-, ESC, MENU, POWERON. Their location are as follows: Figure 3-6 EVB Keys Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 28: Infrared Receiver
The EVB reserves 5 UART interfaces, which communicate with the controller through UART3, UART4, UART5, UART6, and UART9 serial ports. The external standard 4 PINS 2.54mm male socket is convenient for UART peripheral debugging. Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 29: Uart Debug Interface
Figure 3-10 UART Debug Interface 3.9 CAN Bus Interface The CAN bus of the development board takes TCAN1044V driver chip, which is used to convert logic level and signal level, and supports 1.7V-5.5V Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 30: Jtag Debug Interface
There is a standard 20pin JTAG debugging interface on the EVB, which is convenient for customers to debug through JTAG. Figure 3-12 JTAG Debug Interface 3.11 SPDIF Audio Interface The development board supports SONY and PHILIPS digital audio interface output, and the transmission hardware interface is fiber mode. Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 31: Tf Card Interface
4bits, and supports SDMMC3.0 protocol. Figure 3-14 TF Card Interface (bottom surface) 3.13 MIPI Input Interface The MIPI video input interface connected a horizontal connector with a pitch of 0.5mm. Figure 3-15 MIPI CSI_RX Video Input Interface Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 32: Table 3-1 Mipi Csi_Rx Signal Definition
The MIPI CSI_RX interface signal sequence is as follows: Table 3-1 MIPI CSI_RX Signal Definition: MIPI_CSI_RX_D0N_CON MIPI_CSI_RX_D0P_CON MIPI_CSI_RX_D1N_CON MIPI_CSI_RX_D1P_CON MIPI_CSI_RX_CLK0N_CON MIPI_CSI_RX_CLK0P_CON MIPI_CSI_RX_D2N_CON MIPI_CSI_RX_D2P_CON MIPI_CSI_RX_D3N_CON MIPI_CSI_RX_D3P_CON MIPI_MCLK0 MIPI_RST0 CAMERA0_PDN DVP_PWERN0 I2C4_SCL_M0_CAM I2C4_SDA_M0_CAM PWM14_M0 VCC5V0_MIPICON VCC5V0_MIPICON VCC5V0_MIPICON CAMERA1_PDN MIPI_RST1 MIPI_MCLK1 MIPI_CSI_RX_CLK1N_CON MIPI_CSI_RX_CLK1P_CON Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 33: Mipi/Lvds Output Interface
Figure 3-16 MIPI DSI/LVDS_TX0 and MIPI DSI _TX1 Video Input Interface The MIPI DSI/LVDS_TX0 interface signal sequence is as follows: Table 3-2 MIPI DSI/LVDS_TX0 Signal Definition MIPI_DSI_TX0_D0N MIPI_DSI_TX0_D0P MIPI_DSI_TX0_D1N MIPI_DSI_TX0_D1P MIPI_DSI_TX0_CLKN MIPI_DSI_TX0_CLKP MIPI_DSI_TX0_D2N MIPI_DSI_TX0_D2P MIPI_DSI_TX0_D3N MIPI_DSI_TX0_D3P LCD0_BL VCC3V3_LCD0 LCD0_RST LCD0_ID LCD0_PWREN_H Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 34: Table 3-3 Mipi Dsi _Tx1 Signal Definition
The MIPI DSI_TX1 interface signal sequence is as follows: Table 3-3 MIPI DSI _TX1 Signal Definition MIPI_DSI_TX1_D0N MIPI_DSI_TX1_D0P MIPI_DSI_TX1_D1N MIPI_DSI_TX1_D1P MIPI_DSI_TX1_CLKN MIPI_DSI_TX1_CLKP MIPI_DSI_TX1_D2N MIPI_DSI_TX1_D2P MIPI_DSI_TX1_D3N MIPI_DSI_TX1_D3P LCD1_BL_PWM VCC3V3_LCD1 LCD1_RST LCD1_ID LCD1_PWREN_H I2C_SCL_TP1 ISC_SDA_TP1 TP1_INT TP1_RST VCC5V0_LCD_1 VCC5V0_LCD_1 VCC5V0_LCD_1 Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 35: Hdmi Output Interface
Remove resistors R5909, R5910, R5911, R5912 and capacitors C5905, C5908, and add resistors R5606, R5607, R5609, R5610 and capacitors C5600, C5601. The eDP output interface uses a vertical connector with a pitch of 1mm. Figure 3-18 EDP Video Output Interface Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 36: Vga Output Interface
I2C1_SCL_TP_CON I2C1_SDA_TP_CON TP_INT_L_GPIO0_B5_CON TP_RST_L_GPIO0_B6_CON VCC5V0_LCDeDP VCC5V0_LCDeDP VCC5V0_LCDeDP 3.17 VGA Output Interface The eDP signal is converted to VGA signal through RTD2166 chip, and external standard VGA socket is convenient to connect VGA monitor Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 37: Audio Input And Output Interface
The MIC array interface uses RK809+PDM by default, the DIP switch S1900 is set to ON and S1901 is set to OFF; if it has to connect the I2S signal of RK3568 to the extension interface, set the DIP switch S1900 to OFF and S1901 to ON. Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 38: Figure 3-21 Dip Switch Selection Circuit Of I2S1 Channel
RK3568 EVB User Guide Figure 3-21 DIP Switch Selection Circuit of I2S1 Channel Figure 3-22 Headphone, SPK and MIC Interface Figure 3-23 Audio MIC Array Interface The audio MIC array interface signal sequence is as follows: Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 39: Table 3-5 Audio Mic Array Signal Definition
Table 3-5 Audio MIC Array Signal Definition VCC5V0_SYS VCC5V0_SYS VCCIO1 VCC_3V3 HP_DET_L_GPIO3_C2 I2S1_MCLK_M0_CON I2S1_SCLK_RX_M0/PDM_CLK1_M0_CON I2S1_SCLK_TX_M0_CON I2S1_LRCK_RX_M0/PDM_CLK0_M0_CON I2S1_LRCK_TX_M0_CON I2S1_SDO0_M0_CON I2S1_SDO1_M0/I2S1_SDI3_M0 /PDM_SDI3_M0_CON I2S1_SDO2_M0/I2S1_SDI2_M0 /PDM_SDI2_M0_CON I2S1_SDO3_M0/I2S1_SDI1_M0 /PDM_SDI1_M0_CON I2S1_SDI0_M0/PDM_SDI0_M0_CON I2S1_SDO3_M0/I2S1_SDI1_M0 /PDM_SDI1_M0_CON I2S1_SDO2_M0/I2S1_SDI2_M0 /PDM_SDI2_M0_CON I2S1_SDO1_M0/I2S1_SDI3_M0 /PDM_SDI3_M0_CON PA_EN_H_GPIO3_C3 I2C3_SDA_M0 I2C3_SCL_M0 Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 40: Cif/Ebc/Rgmii/Bt656 Extension Interfaces
Figure 3-24 CIF, EBC, RGMII, BT656 Extension Interfaces Figure 3-25 CIF, EBC, RGMII, BT656 Extension Interfaces (bottom surface) CIF、EBC、RGMII、BT656 extension interfaces signal sequence is as follows: Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 41: Usb Otg/Host Interface
USB3.0 standard-A type interface, and reserves standard micro USB2.0 interface which is backward compatible with USB 2.0 specifications. Therefore, this interface can be used to download and upgrade firmware, or as a USB3.0 HOST. Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 42: Ethernet Interface
Gigabit Ethernet MAC integrated inside RK3568 and are connected to an external PHY chip with the model of RTL8211F-CG, and the features are as follows: Compatible with IEEE802.3 standard, support full-duplex and half-duplex operation, support cross detection and self-adaptation. Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 43: Pcie Interface
The 100MHz clock is provided by an external clock chip. Figure 3-29 PCIe3.0 Connector 3.23 SATA Interface The development board supports SATA3.0, and the connector is standard SATA interface. SATA 12V power Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 44: Wifi
BT data communication in UART mode. BT audio is connected to the PCM interface of the controller. WIFI data uses 4bits SDIO data bus. Figure 3-31 WIFI Module and SMA Antenna InterfaceNotice Copyright @ 2022 Rockchip Electronics Co., Ltd... -
Page 45: Notice
RK3568 EVB User Guide 4 Notice RK3568 EVB is suitable for lab or project environment. Please read the following notices before operation: It is not allow to hot-plug the screen interface and extension board of the EVB anyway. ...
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