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VXI Agilent 75000 C Series Service Manual

Digital functional test system
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Summary of Contents for VXI Agilent 75000 C Series

  • Page 1 T h e t e s t & me a s u r e me n t e q u i p me n t y o u n e e d a t t h e p r i c e y o u w a n t . A l l t e s t I n s t r u me n t s , I n c .
  • Page 2 Agilent 75000 SERIES C Model D20 Digital Functional Test System Service Manual The information in this manual applies to the following equipment. Agilent E1450A Timing Modules Agilent E1451A Pattern I/O Modules Agilent E1452A Terminating Pattern I/O Modules Agilent E1453A Timing Pods Agilent E1454A Pattern I/O Pods Agilent E1455A Timing Pods Agilent E1456A Pattern I/O Pods...
  • Page 5 Certification Agilent Technologies certifies that this product met its published specifications at the time of shipment from the factory. Agilent Technologies further certifies that its calibration measurements are traceable to the United States National Institute of Standards and Technology (formerly National Bureau of Standards), to the extent allowed by that organization’s calibration facility, and to the calibration facilities of other International Standards Organization members.
  • Page 6 Printing History The Printing History shown below lists all Editions and Updates of this manual and the printing date(s). The first printing of the manual is Edition 1. The Edition number increments by 1 whenever the manual is revised. Updates, which are issued between Editions, contain replacement pages to correct the current Edition of the manual.
  • Page 7 Declaration of Conformity Declarations of Conformity for this product and for other Agilent products may be downloaded from the Internet. There are two methods to obtain the Declaration of Conformity: • Go to http://regulations.corporate.agilent.com/DoC/search.htm. You can then search by product number to find the latest Declaration of Conformity.
  • Page 8 Shows how to Install and configure the Model D20 E1496A Software Installation Note Shows how to Install Agilent E1496A Test Development Software VXI System Installation and Getting Started Shows how to configure Agilent E1400B M/F & E1405B Cmd Module Guide...
  • Page 9 What’s in this Manual Manual Overview This manual shows how to service the Agilent 75000 Series C Model D20 Digital Functional Test System (Model D20). See Model D20 Documentation, page v, for additional manuals that may be required to service the Model D20.

  • Page 10: Table Of Contents

    Contents Chapter 1 - General Information Introduction ........1-1 Safety Information .
  • Page 11 Chapter 3 - Replaceable Parts Introduction ........3-1 Replaceable Parts Lists .

  • Page 12: Chapter 1 - General Information

    General Information Introduction This service manual contains information to test, troubleshoot, and repair the Agilent 75000 Series C Model D20 Digital Functional Test System (Model D20). Figure 1-1 shows a typical Model D20. NOTE See "Model D20 Documentation", page iv, for a list of manuals that describe Model D20 operation and hardware.

  • Page 13: Safety Information

    Safety The Model D20 is a Safety Class I instrument that is provided with a protective earth terminal when installed in the mainframe. Check the Information mainframe, Model D20, and all related documentation for safety markings and instructions before operating or servicing the Model D20. See the WARNINGS page (page iii) for a summary of safety information.
  • Page 14 WARNING USING AUTOTRANSFORMERS. If the mainframe is to be energized via an autotransformer (for voltage reduction) make sure the common terminal is connected to neutral (that is, the grounded side of the main’s supply). USE PROPER FUSES. For continued protection against fire hazard, replace the line fuse(s) only with fuses of the same current rating and type (such as normal blow, time delay, etc.).

  • Page 15: Product Information

    Model D20 components can be ordered separately or as part of a Digital Functional Test System (Agilent E1493A) or Digital Test Development System (Agilent E1494A). See the Agilent Technologies 75000 Family of VXI Products catalog for option information. 1-4 General Information...

  • Page 16: Service Programs Disk

    Service Included with this service manual is a Model D20 Service Programs disk. This disk contains example programs for the self-tests and verification tests Programs Disk described in Chapter 2 - Verification Tests, for the service routines in Chapter 4 - Service, and for the DIAGnostic command examples in Chapter 5 - DIAGnostic Commands.

  • Page 17: Inspection/Shipping

    Instrument Requirements Recommended Use* Model Controller, GPIB compatibility as defined by IEEE HP 9000 Series 300 F,O, GPIB Standard 488-1987 and the identical ANSI Standard MC1.1: SH1, AH1, T2, TE0, L2, LE0, SR0, RL0, PP0, DC0, DT0, and C1, 2, 3, 4, 5 Mainframe Compatible with Model D20 E1400B/E1400T...
  • Page 18 Notify Agilent and carrier Notify Agilent Return Model D20 to Agilent Figure 1-3. Initial (Incoming) Inspection Guidelines General Information 1-7...

  • Page 19: Shipping Guidelines

    Shipping Follow the steps in Figure 1-4 to return Model D20 modules/pods to an Agilent Technologies Sales and Service Office or Service Center. Guidelines SHIPPING GUIDELINES Remove Cables/Connectors/DUTs • Remove DUTs from modules/pods • Remove pods from modules • Remove cables/connectors from modules/pods Prepare Module/Pod •...

  • Page 20: Chapter 2 - Verification Tests

    Verification Tests Introduction This chapter describes Model D20 self-tests, functional verification tests, and performance verification tests. (There are no user adjustments for the Model D20.) Table 2-1 defines Model D20 verification tests and suggests when to use each type. WARNING Do not perform any of the verification tests in this chapter unless you are a qualified, service-trained person and have read the WARNINGS and CAUTIONS in Chapter 1.

  • Page 21: Test Conditions/Procedures

    Test Conditions/ The test administrator must know Model D20 and test equipment operation. It is assumed that a qualified, service-trained person will connect cables and Procedures adaptors required. See Table 1-2, Recommended Test Equipment, for test equipment requirements. Performance verification tests should be done at least once a year.

  • Page 22: Test S-1: Model D20 Power-On Test

    Model D20 This section shows how to perform Model D20 self-tests using the power-on (SYST:ERR?) and/or hardware (TEST?) commands. Either test is Self-Tests usually adequate to verify that the Model D20 is operational. If a self-test fails, see Chapter 4 - Service for further tests/information. NOTE The TEST? command is not guaranteed to find all hardware faults.
  • Page 23 • Insert Model D20 Service Programs Disk in disk drive Load Test Program • Load test program with LOAD "FUNC_VER" • Press RUN • Select "Test S-1: Model D20 Power-on Test" This program performs a power-on test for the Model D20 using the Example Program SYST:ERR? command.
  • Page 24 270 PRINT "GPIB communication check failed." !GPIB communication failure 280 PRINT 290 PRINT "The Model D20 is not responding. Check GPIB address" 300 PRINT "of Model D20 modules, the GPIB interface cable, and" 310 PRINT "the Agilent E1405B Command Module." 320 PRINT 330 DISP "...

  • Page 25: Test S-2: Model D20 Hardware Test

    Test S-2: Model D20 Hardware Test This test uses the TEST:MODule? command to make a hardware check of Description all installed Model D20 modules. See the TEST command in Chapter 4 - Command Reference of the Model D20 Task and Command Reference for command information and error messages.
  • Page 26 !Test S-2: Model D20 Hardware Test ASSIGN @Dft to 70917 !Default address = 70917 PRINT "Test S-2: Model D20 Hardware Test" PRINT INPUT " Enter number of modules installed (including Timing Module) ",Number!Enter no. of modules ALLOCATE Fault_code$(Number)[100] !Allocate memory FOR I=0 TO Number-1 !Begin loop OUTPUT @Dft;"TEST:MOD? ";I...

  • Page 27: Functional Verification Tests

    Functional This section describes functional verification tests for the Model D20. These (optional) tests can be used to check specific Model D20 functions. The Verification tests are valid ONLY if an Agilent E1450A Timing Module is used. Tests Typically, functional verification tests are used after repair or whenever Model D20 operation is questionable.

  • Page 28: Test F-1: Generating Patterns

    Test F-1: Generating Patterns This test generates patterns on a selected port of a Pattern I/O Module. The Description pattern output sequentially lights LEDs (from 0 to 7) for the selected port on the Light Board. You can use this test to check the STIMulus output of the Model D20.
  • Page 29 This program outputs a STIMulus pattern on a selected port of a Pattern I/O Example Program Module. The pattern sequentially lights each Light Board LED (from 0 to 7) for the selected port. ! Test F-1: Generating Patterns ! ------------------------------------------- Initial Assignments ------------------------------------------------- ASSIGN @Dft TO 70917 !Model D20 address = 70917 DISP CHR$(129)
  • Page 30 261 ! ------------------------------------------- Define Pin Group --------------------------------------------------------- 270 OUTPUT @Dft;"GRO:DEL:ALL" !Delete all previous pin groups 280 OUTPUT @Dft;"GRO:DEF DATA_OUT";Number$ !"DATA_OUT" pin group 290 OUTPUT @Dft;"GRO DATA_OUT" !Select group "DATA_OUT" 300 OUTPUT @Dft;"GRO:MODE STIM" !Set group to STIMulus mode 310 OUTPUT @Dft;"STIM:PATT:SEQ:PART 0,1,2,4,8,16,32,64,128,0"!Load STIMulus data pattern 320 OUTPUT @Dft;"STIM:CLOC:SOUR INT0"...

  • Page 31: Test F-2: Recording Patterns

    Test F-2: Recording Patterns This test outputs STIMulus patterns via a selected port of a Pattern I/O Description Module and records the patterns via a second port of the module. The recorded patterns are then read and printed. If the recorded patterns are identical to the STIMulus patterns, the test passes.
  • Page 32 This program outputs a STIMulus pattern sequence (1, 2, 4, 8, 16, 32, 64, Example Program 128, 0) on a selected port of a Pattern I/O Module and records that sequence via a second selected port. The recorded pattern sequence is then queried. ! Test F-2: Recording Patterns !---------------------------------------------- Initial Assignments --------------------------------------------------------- ASSIGN @Dft TO 70917...
  • Page 33 320 OUTPUT @Dft;"SEQ TEST_1" !Select "TEST_1" sequence 321 ! ----------------------------- Set up STIMulus Group -------------------------------------------------------------- 330 OUTPUT @Dft;"GRO:DEL:ALL" !Delete all previous pin groups 340 OUTPUT @Dft;"GRO:DEF DATA_OUT";Data_out$ !Define "DATA_OUT" group 350 OUTPUT @Dft;"GRO DATA_OUT" !Select group "DATA_OUT" 360 OUTPUT @Dft;"GRO:MODE STIM" !Set group to STIMulus mode 370 OUTPUT @Dft;"STIM:PATT:SEQ:PART 0,1,2,4,8,16,32,64,128,0"...
  • Page 34 660 CLEAR SCREEN !Display pattern 661 !-------------------------------------------- Display Results ----------------------------------------------- 670 PRINT "Test F-2: Recording Patterns Results" 680 PRINT 680 PRINT "STIMulus pattern on port";Stim_port;"= +1,+2,+4,+8,+16,+32,+64,+128,+0" 690 PRINT "RESPonse pattern on port";Resp_port;" = ";A$ 700 PRINT " NOTE" 710 PRINT 720 PRINT "If the RESPonse pattern does not match the STIMulus pattern,"...

  • Page 35: Test F-3: Comparing Patterns

    Test F-3: Comparing Patterns This test outputs a STIMulus pattern (55) via a selected STIMulus port of a Description Pattern I/O Module and an identical RESPonse pattern (55) via a selected RESPonse port of the module. The RESPonse pattern and STIMulus pattern are then compared.
  • Page 36 This program outputs a STIMulus pattern (55) via the selected STIMulus Example Program port of a Pattern I/O Module and an identical RESPonse pattern (55) via the selected RESPonse port of the module. The response pattern is then compared with the STIMulus pattern. If no errors occur, " " (the null string) is returned.
  • Page 37 290 OUTPUT @Dft;"*RST" !Set instrument to known condition 300 OUTPUT @Dft;"SEQ:DEL:ALL" !Delete all previous sequences 310 OUTPUT @Dft;"SEQ:DEF TEST_1,8" !Define seq "TEST_1" with 8 vectors 320 OUTPUT @Dft;"SEQ TEST_1" !Select "TEST_1" sequence 321 ! ------------------------------------- Set up STIMulus Group ------------------------------------------------ 330 OUTPUT @Dft;"GRO:DEL:ALL"...
  • Page 38 650 CLEAR SCREEN 651 ! -------------------------------------------------------- Display Results -------------------------------------------- 660 PRINT "Test F-3: Comparing Patterns" 670 PRINT 680 PRINT "Expected result on RESPonse port";Resp_port;"= " " " " " 690 PRINT " Actual result on RESPonse port";Resp_port;"= ";A$ 700 PRINT 710 PRINT "If the result is not "...

  • Page 39: Test F-4: Control Outputs

    Test F-4: Control Outputs This test checks CONTROL 0 through CONTROL 7 outputs. If the Description CONTROL LEDs on the Light Board light sequentially, from 0 through 7, the test passes. You can use this test to check the Timing Module CONTROL outputs.
  • Page 40 This program generates a different waveform on each CONTROL outputs Example Program (CONTROL 0 through CONTROL 7). When the program is RUN, the CONTROL LEDs on the Light Board light sequentally (from 0 through 7) 10 times and then turn OFF. !Test F-4: Control Outputs !--------------------------------------------------Set up Sequence --------------------------------------------- ASSIGN @Dft to 70917...

  • Page 41: Test F-5: Trigger Test

    Test F-5: Trigger Test This test lights all CONTROL LEDs on the Light Board when a trigger Description from the selected source (see Table following) is input to the Timing Module. Trigger Event Trigger Source (TIM:TRIG:SOUR) TTLTrg Trigger Bus Line 0 TTLT0 TTLTrg Trigger Bus Line 1 TTLT1...
  • Page 42 Case 10: Timing Pod TRIGGER line (EXT0) Case 11: TTL Trig In Port (EXT1) Case 12: ECL Trig In Port (EXT2) 2-23 Verification Tests...
  • Page 43 This program lights CONTROL LEDs 0 through 7 on the Light Board when Example Program a trigger is generated from the trigger source selected. Available trigger input sources are listed in the Table under Description. ! Test F-5: Trigger Test !--------------------------------------------------Initial Setup --------------------------------------------------- 10 CLEAR SCREEN 20 PRINT "Test F-5: Trigger Test"...
  • Page 44 PRINT " 10 = Timing Pod TRIGGER line (EXT0)" PRINT " 11 = Timing Module TTL Trig In port (EXT1)" PRINT " 12 = Timing Module ECL Trig In port (EXT2)" PRINT " 13 = Trigger when *TRG command is issued (BUS)" PRINT "...
  • Page 45 641 !----------------------------------------TTL and ECL Bus Triggers -------------------------------------------------------- OUTPUT @Cmd:"OUTP:"&Source$(Trig_source)&":STAT ON" !Set Command Module STATE ON for sel trigger bus (TTLT or ECLT) OUTPUT @Cmd:"OUTP:"&Source$(Trig_source)&":SOUR INT" !Set Command Module trigger source to INTernal PRINT "Test for Trigger Source ";Source$(Trig_source) PRINT PRINT "1. Disconnect all external sources from the Command" PRINT "...
  • Page 46 1000 PRINT "Test for Trigger Source ";Source$(Trig_source) 1010 PRINT 1020 PRINT "1. Connect cable from Command Module ""Trig Out""" 1030 PRINT " port to Timing Module ""TTL Trig In"" port" 1040 PRINT 1050 PRINT "2. When the test is RUN, CONTROL LEDs 0 through 7" 1060 PRINT "...
  • Page 47 1350 DISP " Press Continue when ready to observe the LEDs " 1360 PAUSE 1370 CLEAR SCREEN 1380 OUTPUT @Dft;"RUN" !RUN Model D20 1390 OUTPUT @Dft;"*TRG" !Generate *TRG command 1391 !---------------------------------Trigger When COND3 = TRUE ------------------------------------ 1400 CASE =14 !Trigger when COND3 = T 1410 PRINT "Test for Trigger When COND3 = ( T ) (TRUE)"...

  • Page 48: Test F-6: Condition Inputs

    Test F-6: Condition Inputs This test continues a sequence when COND0, COND1, or COND2 Description (as selected) evaluates to TRUE. You can use this test to check the COND0, COND1, and/or COND2 input function. NOTE COND3 is reserved for triggering. See "Test F-5: Trigger Test" for an example using COND3.
  • Page 49 This program allows you to check the COND0, COND1, and/or COND2 Q Example Program (condition) inputs. The program uses the CONTROL outputs as CONDition inputs by connecting the CONTROL outputs to the CONDition inputs on the Light Board. For this program, CONTROL outputs 0, 2, 4, and 6 are set HIGH and CONTROL outputs 1, 3, 5, and 7 are set LOW.
  • Page 50 GOTO Retry_port END IF 190 CLEAR SCREEN 200 Retry_cond: 210 INPUT " Enter Q (CONDition) input to test (0, 1, or 2) ",Cond 220 IF Cond<0 OR Cond>2 THEN BEEP PRINT "Invalid number. Please reenter Q COND (0, 1, or 2)" GOTO Retry_cond 260 END IF 270 CLEAR SCREEN...
  • Page 51 510 OUTPUT @Dft;"TIM:CYCL:CONT4:WAV 1" 520 OUTPUT @Dft;"TIM:CYCL:CONT5:WAV 0" 530 OUTPUT @Dft;"TIM:CYCL:CONT6:WAV 1" 540 OUTPUT @Dft;"TIM:CYCL:CONT7:WAV 0" 541 !--------------------------------------------- RUN program -------------------------------------------------- 550 PRINT "Starting the Sequence" 560 PRINT 570 PRINT "When this test is RUN, LED 0 of Port";Port_no;"should be ON" 580 PRINT "and the sequence should be halted at LED 0.

  • Page 52: Test F-7: Marker Outputs

    Test F-7: Marker Outputs This test has two parts: Part 1 generates pulses (markers) from the Timing Description Module front panel Marker Out SMB connector for selected vectors of the output sequence. Part 2 checks the Timing Module Marker Output drive of the TTLTrg bus lines (TTLT0 - TTLT7).
  • Page 53 This program has two parts: Part 1 outputs a marker pulse from the Timing Example Program Module Marker Out port for each even-numbered vector in the DATA_OUT pin group pattern (vectors 2, 4, 6, and 8). Part 2 checks the Marker Out drive of the TTLTrg VXIbus lines (TTLT0 - TTLT7).
  • Page 54 !Test F_7: Marker Outputs !----------------------------------------------------- Test Selection -------------------------------------------------------- CLEAR SCREEN PRINT "Test F-7: Marker Outputs" PRINT PRINT "Marker Output Destination" PRINT PRINT "1 = Marker Output from Timing Module Marker Out port" PRINT "2 = Marker Output to TTLT0 - TTLT7 backplane trigger bus" 80 Retry: INPUT "...
  • Page 55 PRINT "2. As the test RUNs, the oscilloscope should display" PRINT " four Marker Output pulses with 200 usec pulse widths." DISP " Press Continue when ready to observe the scope " PAUSE CLEAR SCREEN OUTPUT @Dft;"RUN" !RUN program GOTO End_test !End of Part 1 410 CASE =2 !TTLTrg bus lines test...
  • Page 56 END IF !End Part 2 test 720 END SELECT 730 End_test: ! 740 END Figure 2-12 shows a typical oscilloscope display for Marker Output pulses Typical Results (Part 1 of the test). The display should show four pulses (vectors 0, 2, 4, and 6) with 200 µsec pulse widths.

  • Page 57: Test F-8: End-If-Ready Inputs

    Test F-8: End-If-Ready Inputs This test checks the End-If-Ready (EIR) function of the Model D20. Tests Description for two input sources are provided: • The Timing Module Front Panel "Ready In" port • The Light Board "READY" pin • Turn mainframe power OFF Set up Equipment •...
  • Page 58 NOTE When RUNning the example program using the Timing Module Front Panel Ready In port as the source, make sure the Light Board READY pin is NOT connected to the GND pin. When running the program using the Light Board READY pin, make sure the 50 Ω...
  • Page 59 230 INPUT " Select End-If-Ready Source (1 or 2) ",Source 240 IF Source<1 OR Source>2 THEN PRINT TABXY(1,7),"Incorrect entry. Please reenter source number (1 or 2)" BEEP GOTO Retry_source 280 END IF 290 CLEAR SCREEN 300 SELECT Source 310 CASE =1 !EIR source is Timing Module Ready In port 311 !-----------------------------------Timing Module Ready In Port --------------------------------------------------...
  • Page 60 OUTPUT @Dft;"TIM:CONT OFF" !Disable CONTROL outputs IF Flag1>1 THEN GOTO End_test DISP " Press Continue for Ready In port TRUE test " PAUSE CLEAR SCREEN PRINT "Timing Module ""Ready In"" port: Ready-In TRUE test" PRINT PRINT " 1. For this part of the test, the Ready In port input is" PRINT "...
  • Page 61 1000 DISP " Press Continue for Light Board Ready-In TRUE test " 1010 PAUSE 1020 CLEAR SCREEN 1030 PRINT "Light Board ""READY"" pin - Ready-In TRUE test" 1040 PRINT 1050 PRINT " 1. Remove the wire between the READY pin and the GND pin on" 1060 PRINT "...

  • Page 62: Test F-9: Clock Outputs

    Test F-9: Clock Outputs This test verifies correct operation of the six STIMulus clocks (0 - 5) and Description the six RESPonse clocks (0 - 5). It also verifies that the Timing Module is properly generating all 12 clocks at maximum speed. •...
  • Page 63 • Insert Model D20 Service Programs Disk in disk drive Load Test Program • Load test program with LOAD "FUNC_VER" • Press RUN • Select "Test F-9: Clock Outputs" This program tests the six STIMulus Clocks (0 through 5) and the six Example Program RESPonse Clocks (0 through 5).
  • Page 64 171 !-------------------------------------- Set up Timing Cycle and Resolution ------------------------------- 180 OUTPUT @Dft;"TIM:CYCL:DEL:ALL" !Delete all previous timing cycles 190 OUTPUT @Dft;"TIM:CYCL:DEF TC_1,9" !Timing cycle "TC_1" has 9 subcycles 200 OUTPUT @Dft;"TIM:CYCL:SEQ:REP 0,9,TC_1" !Assign "TC_1" to each vector 201 !---------------------------------- Check STIMulus and RESPonse Clocks 0/1 -------------------------- 210 OUTPUT @Dft;"GRO port_0"...
  • Page 65 530 SUB Clk_test(@Dft,Flag) !Query clock test results 531 ! ---------------------------------- Query STIMulus/RESPonse Clock Results ------------------------ DIM String$(3)[4],A(3) OUTPUT @Dft;"RUN;*WAI" !RUN program FOR I=0 TO 3 !Loop to check register for ports 0 - 3 OUTPUT @Dft;":DIAG:REG? 1, ";VAL$(8+14*I) !Query Seq Memory Addr registers ENTER @Dft;String$(I) !Enter result A(I)=VAL(String$(I))

  • Page 66: Performance Verification Tests

    Performance Performance verification test objectives are to instill a high degree of confidence that the Agilent 75000 Model D20 Digital Functional Test Verification System is meeting the specifications listed in Appendix A - Specifications of Tests the Model D20 Task and Command Reference. The performance verification tests are: •...
  • Page 67 This program sets up five vectors and a timing cycle of 20 subcycles. The Example Program five vectors are looped continuously using the DIAGnostic:SEQuence:LOOP command to provide a marker output at the end of each loop. ! Test P-1: Subcycle Period Accuracy CLEAR SCREEN Addr=70917 !70917 is default address...

  • Page 68: Test P-2: System Skew Accuracy

    Test P-2: System Skew Accuracy This test provides a method to use an oscilloscope to manually measure Description skew on STIMulus pins. (Skew cannot be measured manually for RESPonse pins since a RESPonse event cannot be seen.) For this test, rising and falling signal skew are measured with respect to the port 0, pin 0 output on the selected Pattern I/O Module.
  • Page 69 NOTE See Figure 2-17 to build probe adaptors that make measuring signals at the pod much easier. If you use prebuilt probe adapters, connect the prebuilt probe adaptors to the oscilloscope probes. Figure 2-17. Probe Adapter for Measuring Skew Figure 2-18. Measuring Skew Between Two Pins Verification Tests 2-50...
  • Page 70 • Insert Model D20 Service Programs Disk in disk drive Load Test Program • Load test program with LOAD "PERF_VER" • Press RUN • Select "Test P-2: System Skew Accuracy" This program causes all pins on ports 0 through 3 of the selected Pattern I/O Example Program module to change states simultaneously.
  • Page 71 160 OUTPUT @Dft;"STIM:CLOC:SOUR INT0" !Use STIMulus clock 0 161 !--------------------------------------------Set up Port 1 Pattern ------------------------------------------------ 170 OUTPUT @Dft;"GRO:DEF OUT1,(@"&VAL$(Mod_no)&"(1))" !Group OUT1 uses port 1 180 OUTPUT @Dft;"GRO OUT1" !Select "OUT1" 190 OUTPUT @Dft;"GRO:MODE STIM" !Set group mode to STIMulus 200 OUTPUT @Dft;"STIM:ENAB:SEQ:PART 0,1,1,1,1,1,1" !Enable all vectors 210 OUTPUT @Dft;"STIM:PATT:SEQ:PART 0,0,255,0,255,0,255"...
  • Page 72 480 OUTPUT @Dft;"TIM:CONT ON" !Enable CONTROL outputs 481 !------------------------------------Set up LOOP operation ----------------------------------------------------- 490 OUTPUT @Dft;"TIM:MARK:SEQ:PART 0,0,0,0,0,0,0" !Disable marker outputs 500 OUTPUT @Dft;"DIAG:SEQ:LOOP:BOUN 0,5" !Loop from vector 0 through 5 510 OUTPUT @Dft;"DIAG:SEQ:LOOP ON" !Enable looping 520 OUTPUT @Dft;"RUN" !RUN program 530 DISP "...
  • Page 73 Falling Signal Skew - Pattern I/O Ports Figure 2-20 shows a typical result for falling edge skew between pattern I/O port 0, pin 0 and port 2, pin 3. Since the waveform for port 0, pin 0 crosses the 1.6V threshold at 40.76 nsec and the waveform for port 2, pin 3 crosses at 41.12 nsec, skew for port 3, pin 2 = 41.12 nsec - 40.76 nsec = 0.36 nsec.

  • Page 74: Performance Test Record

    Performance Table 2-3, Model D20 Performance Test Record, can be used to record the results of the two Performance Verification test for the Model D20 (this Test Record record can be copied if desired). The record includes the upper and lower limits, the measurement uncertainty, and the Test Accuracy Ratio (TAR) (as applicable) for the test.
  • Page 75 Table 2-3. Model D20 Performance Test Record (Page 1 of 3) Test Facility: Report No.__________________________________ Name _____________________________________ Date_______________________________________ Address____________________________________ Customer___________________________________ City/State___________________________________ Tested by____________________________________ Phone_____________________________________ Model_______________________________________ Ambient temperature_______________________ Serial No.____________________________________ Relative humidity____________________________% Options____________________________________ Line frequency ____________________ Hz (nominal) Firmware Rev.______________________________ Test Equipment Used: Description Model No.
  • Page 76 Table 2-3. Model D20 Performance Test Record (Page 2 of 3) Model ___________________________ Report No. ________________________ Date ______________________ Test No/Description Minimum Measured Value Maximum Measurement Test Acc Value* Value Uncertainty Ratio (TAR) P-1: Subcycle Period Accuracy ±3.0 Hz 1.5999 MHz ____________ 1.6001 MHz 33:1...
  • Page 77 Table 2-3. Model D20 Performance Test Record (Page 3 of 3) Model ___________________________ Report No. ________________________ Date ______________________ Test No/Description Minimum Measured Value Maximum Measurement Test Acc Value* (nsec) Value Uncertainty Ratio (TAR) P-2: System Skew Accuracy (skew compared to Port 0, Pin 0) (cont’d) ±100.3 psec CONTROL 0 _____________...

  • Page 78: Chapter 3 - Replaceable Parts

    Replaceable Parts Introduction This chapter contains information to order replaceable parts for Agilent 75000 Model D20 components shown in Table 3-1. Table 3-1. Applicable Components/Descriptions Component Description Serial # Prefix Agilent E1450A 160 MHz Timing Module Agilent E1451A 20 MHz Pattern I/O Module Agilent E1452A 20 MHz Term Pattern I/O Module Agilent E1453A...
  • Page 79 Model D20 Table 3-4 lists replaceable parts for Agilent 75000 Model D20 instruments with serial number prefixes shown in Table 3-1. See Model D20 Component Locators Replaceable (Figures 3-1 through 3-17) for locations of parts in Table 3-4. Table 3-2 shows Parts Lists reference designators for parts in Table 3-4, while Table 3-3 shows the manufacturer code list for these parts.
  • Page 80 Table 3-4. Agilent 75000 Model D20 Replaceable Parts Reference* Agilent Part Description Mfr** Mfr Part Number Designator Number Code Agilent E1450A TIMING MODULE PARTS E1450A NEW/EXCHANGE ASSEMBLIES E1450-66201 E1450A TIMING MODULE (NEW) 28480 E1450-66201 E1450A TIMING MODULE (EXCHANGE) 28480 E1450-69201 E1450-69201 E1450A CHASSIS PARTS (FIGS 3-1 - 3-3) 1250-2076...
  • Page 81 Table 3-4. Agilent 75000 Model D20 Replaceable Parts (cont’d) Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code E1450A HARDWARE PARTS (FIGs 3-1 - 3-3) STANDOFF - HEX M3.0 X 0.5-THD SST-303 PSVT 28480 0380-3059 HDW1 0380-3059 0380-3059 HDW2 0380-3059...
  • Page 82 Table 3-4. Agilent 75000 Model D20 Replaceable Parts (cont’d) Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code E1450A HARDWARE PARTS (CONT’D) SCR30 0515-1227 SCR-FHM 3 X 6 MM TX 28480 0515-1227 SCR31 0515-1227 SCR-FHM 3 X 6 MM TX 28480 0515-1227 SCR32...
  • Page 83 Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code E1451A HARDWARE PARTS (CONT’D) SCR1 0515-1135 SCR-FHM 3 X 25 MM TX 28480 0515-1135 0515-1135 SCR-FHM 3 X 25 MM TX 28480 0515-1135 SCR2 SCR3 0515-1135 SCR-FHM 3 X 25 MM TX 28480 0515-1135 28480...
  • Page 84 Table 3-4. Agilent 75000 Model D20 Replaceable Parts (cont’d) Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code E1452A HARDWARE PARTS (FIG 3-8) 8160-0686 CLIP-RFI STRIP-FINGERS BE-CU SN-PL 30817 00786-185 E1450-01202 EMI STRIPS 28480 E1450-01202 28480 E1450-01202 E1450-01202 EMI STRIPS E1450-01202...
  • Page 85 Table 3-4. Agilent 75000 Model D20 Replaceable Parts (cont’d) Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code Agilent E1454A PATTERN I/O POD PARTS E1454A HARDWARE PARTS (FIG 3-12) CBL1*** E1453-61601 50-PIN POD CABLE 28480 E1453-61601 28480 E1453-44101 CVR1 E1453-44101...
  • Page 86 Table 3-4. Agilent 75000 Model D20 Replaceable Parts (cont’d) Reference* Agilent Part Description Mfr* * Mfr Part Number Designator Number Code Agilent E1456A PATTERN I/O POD (MAC PANEL) PARTS E1456A CHASSIS PARTS (FIG 3-15) CBL1*** E1454-61602 50-PIN CABLE 28480 E1454-61602 28480 E1455-00601 CVR1...

  • Page 87: Model D20 Component Locators

    Model D20 Figures 3-1 through 3-17 show locations of selected replaceable parts for Agilent 75000 Model D20 components. Component Locators Figure 3-1. E1450A Timing Module - Hardware Parts 3-10 Replaceable Parts...
  • Page 88 Figure 3-2. E1450A Timing Module - Front Panel Figure 3-3. E1450A Timing Module - Shield Parts Replaceable Parts 3-11...
  • Page 89 Figure 3-4. E1450A Timing Module - A1 PCA (Slot 0) Figure 3-5. E1450A Timing Module - A2 PCA (Slot 1) 3-12 Replaceable Parts...
  • Page 90 Figure 3-6. E1451A Pattern I/O Module - Hardware Figure 3-7. E1451A Pattern I/O Module - A1 PCA Replaceable Parts 3-13...
  • Page 91 Figure 3-8. E1452A Term Patt I/O Pod - Hardware Figure 3-9. E1452A Term Patt I/O Pod - A1 PCA 3-14 Replaceable Parts...
  • Page 92 Figure 3-10. E1453A Timing Pod - Hardware Parts Figure 3-11. E1453A Timing Pod - A1 PCA Replaceable Parts 3-15...
  • Page 93 Figure 3-12. E1454A Pattern I/O Pod - Hardware Parts Figure 3-13. E1454A Pattern I/O Pod - A1 PCA 3-16 Replaceable Parts...
  • Page 94 Figure 3-14. E1455A Timing Pod (MacPanel) Parts Replaceable Parts 3-17...
  • Page 95 Figure 3-15. E1456A Pattern I/O Pod (MacPanel) Parts 3-18 Replaceable Parts...
  • Page 96 Figure 3-16. E1493A Light Board - Hardware Parts Figure 3-17. E1450A/51A/52A Interface Cables Replaceable Parts 3-19...
  • Page 97 3-20 Replaceable Parts...

  • Page 98: Chapter 4 - Service

    Service Introduction This chapter contains information to service the Model D20, including: • recommended repair strategy • troubleshooting guidelines • assembly/disassembly instructions • repair/maintenance guidelines WARNING Do not perform any of the service procedures shown unless you are a qualified, service-trained person, and have read the WARNINGS and CAUTIONS in Chapter 1.

  • Page 99: Troubleshooting Guidelines

    Table 4-1. Model D20 Recommended Repair Strategy Modules/Pods Repair Strategy Replacement Part # Agilent E1450A [1] Make sure module logical address switch settings are E1450-69201 (Exchange) Timing Module correct. E1450-66201 (Replacement) [2] Make sure module is addressed correctly by the software.
  • Page 100 Figure 4-1. Model D20 Troubleshooting Guidelines Service 4-3...

  • Page 101: Service Program

    Service Program This program shows one way to perform troubleshooting tests on the Model D20, using the sequence in Figure 4-1. If you want to run this program, load the "SERV_TEST" file from the Model D20 Service Programs Disk, press RUN, and follow the instructions.
  • Page 102 290 INPUT " Is DIGITAL,HP75000_D20 in driver list (Y/N)? ",Dvr$ 300 IF Dvr$="N" OR Dvr$="n" THEN Down_load !If D20 driver NOT present, load driver and rerun program 301 ! ..........Check Logical Addresses ............310 OUTPUT @Syst;"VXI:CONF:DLAD?" !Check logical addresses 320 ENTER @Syst;Log_addr$ !Enter logical addresses 330 CLEAR SCREEN 340 PRINT "Check Logical Addresses"...
  • Page 103 OUTPUT @Dft;"TEST:MOD? ";I !Test each installed module ENTER @Dft;Mod_err$(I) !Enter module error code PRINT "Module";I;"= ";Mod_err$(I) !Display module error code NEXT I !Next module PRINT PRINT "+0,+0,+0,+0 returned indicates no error for the module." PRINT "If there are any error messages, note the module NUMBER(S)" PRINT "for the error messages."...
  • Page 104 PRINT PRINT " 1. Turn mainframe power OFF" PRINT " 2. Remove I/O module from mainframe " PRINT " 3. Disassemble I/O module (see Fig 4-4)" PRINT PRINT " 4. Inspect jacks/plugs for broken/bad connections" 1000 PRINT " 5. Check fuses F101, F102, F103, and F104 on A1 PCA (see Fig 3-7)" 1010 PRINT "...
  • Page 105 1300 PRINT " To set correct logical addresses:" 1310 PRINT 1320 PRINT " 1. Turn mainframe power OFF" 1330 PRINT " 2. Remove module(s) with wrong address" 1340 PRINT " 3. Set correct addresses (See Model D20 " 1350 PRINT " Hardware Installation Guide)"...

  • Page 106: Assembly/Disassembly Instructions

    Assembly/ This section shows how to disassemble and reassemble the Agilent E1450A Timing Module, the Agilent E1451A Pattern I/O Module, and the Agilent Disassembly E1452A Terminating Pattern I/O Module. See Figure 3-10 for Timing Pod Instructions disassembly or Figure 3-12 for Pattern I/O Pod disassembly. CAUTION Do not handle or disassemble Model D20 modules unless you are familiar with the precautions listed in the "Repair/Maintenance...
  • Page 107 Figure 4-3. Timing Module Disassembly (continued on next page) 4-10 Service...

  • Page 108: Pattern I/O Modules Disassembly

    Figure 4-3 (cont’d). Timing Module Disassembly See Figure 4-4 to disassemble the Agilent E1451A/52A Pattern I/O Module Pattern I/O Modules cover and A1 PCA. Reverse the steps shown to reassemble the Pattern I/O Disassembly Module and PCA. Service 4-11...
  • Page 109 Figure 4-4. Pattern I/O Modules Disassembly 4-12 Service...

  • Page 110: Repair/Maintenance Guidelines

    Repair/ Guidelines to repair and maintain Model D20 modules follow, including: Maintenance Guidelines • ESD precautions • Soldering printed circuit boards • Post-repair safety checks Electrostatic discharge (ESD) may damage CMOS and other static-sensitive devices in Model D20 modules. This damage can Precautions range from slight parameter degradation to catastrophic failure.

  • Page 111: Post-Repair Safety Checks

    • Avoid unnecessary component unsoldering and soldering. Excessive replacement can result in damage to the circuit board and/or adjacent components. • Do not use a high power soldering iron on etched circuit boards, as excessive heat may lift a conductor or damage the board. •...

  • Page 112: Chapter 5 - Diagnostic Commands

    Table 5-1. DIAGnostic Subsystem Descriptions DIAGnostic subsystem Description :OSCillator Allows synchronization between Model [:STATe]1|0|ON|OFF D20s in different VXI mainframes. Enables [:STATe]? or disables the Timing Module oscillator. :REGister Sets the value or queries the value held by [:VALue]<module_#>,<register>,<value> a hardware register in an instrument [:VALue]?<module_#>,<register>...

  • Page 113: Diagnostic:oscillator

    The DIAGnostic:OSCillator subsystem enables or disables the oscillator in the Timing Module. A primary function for DIAGnostic:OSCillator is to OSCillator enable synchronization between Model D20s in different VXI mainframes. CAUTION Turning off the master oscillator in the Timing Module can cause a failure of subsequent commands meant to modify the state of the Timing Module.
  • Page 114 • Synchronize Sequence Start: Synchronize the start of a sequence run as follows: • Disable the master timing module oscillator • Send RUN commands to all D20s • Enable master timing oscillator to begin synchronized operation NOTE For MXI, this procedure is necessary ONLY for driver revision A.01.0x OR if all modules have NOT been combined into a single instrument.
  • Page 115 Example Program This example shows one way to use the DIAG:OSC[:STAT] command and GPIB expansion to synchronize the start of a sequence. The Model D20 at address 70902 is the master and Model D20s at addresses 70903 and 70904 are the slaves. See Figure 5-1 for typical connections. !Example: Synchronized Operation !------------------------- Set up Sequences and Patterns ------------------------------------------------- !------------------------ Disable master Timing Module Oscillator -----------------------------------...

  • Page 116: Diagnostic:register

    DIAGnostic: The DIAGnostic:REGister subsystem sets the value or queries the value held by a hardware register on one of the modules in the Model D20 REGister instrument. Subsystem Syntax DIAGnostic:REGister Subsystem Description :REGister [:VALue] <module_#>,<register>,<value> writes a value to specified register [:VAlue]? <module_#>,<register>...
  • Page 117 • Comments Register Addresses: See the Agilent E1450 Hardware Manual for Timing Module register addresses. See the Agilent E1451/52 Hardware Manual for Pattern I/O Modules register addresses. • Register Addresses Must be Even: The register parameter is interpreted as a byte address, but only word addresses are allowed on the hardware.
  • Page 118 ! Example: Reading Register Values ! ......Make assignments ......... DIM A(100),B$[100],C$[100] ASSIGN @Dft TO 70917 INPUT " Enter module number (0,1,2,...) ",Mod_num IF Mod_num=0 THEN Addr=46 !Max (dec) address for Timing Module ELSE Addr=62 !Max (dec) addr for Pattern I/O Module END IF !.........

  • Page 119: Diagnostic:sequence:loop

    DIAGnostic: DIAGnostic:SEQuence:LOOP allows a continuous looping capability (on the currently selected DIGital:SEQuence) useful in diagnostic situations. SEQuence: This looping feature is not available in the normal command set (i.e., part of LOOP the DIGital:SEQuence subsystem) because it is impossible to discover the correct order in which compare errors occurred, and the marker function cannot be used within a loop.
  • Page 120 • Windows Affect Loops: When a window is established (with SEQuence:WINDow), the DIAGnostic:SEQuence:LOOP:BOUNdary operation may be affected. For example (see Figure 5-2 (a)), the window range (vectors 3 through 12) is greater than the loop range (vectors 5 through 10). The loop sequence starts at vector 3, goes to 10 and then loops 5 through 10.
  • Page 121 Example Program This program sets up and initiates a sequence loop and a window for sequence "TEST_1". The sequence RUNs twice. For the first RUN, the window boundaries (vectors 0 and 7) are larger than the loop boundaries (vectors 2 and 7), so the LEDs on the Light Board light sequentially from 0 through 7 and then loop from 2 through 7 for 10 seconds.
  • Page 122 151 !..........Enable Looping and Windows............. 160 OUTPUT @Dft;"DIAG:SEQ:LOOP ON" !Enable looping for "TEST_1" 170 OUTPUT @Dft;"SEQ:WIND ON" !Enable window for "TEST_1" 180 FOR I=1 TO 2 !Execute two RUNs IF I=1 THEN OUTPUT @Dft;"DIAG:SEQ:LOOP:BOUN 2,7" !Loop boundaries = 2,7 for first RUN OUTPUT @Dft;"SEQ:WIND:BOUN 0,7"...
  • Page 123 DIAGnostic:SEQuence:LOOP[:STATe] DIAGnostic:SEQuence:LOOP[:STATe] 1|0|ON|OFF allows the user to enable or disable a hardware-based looping capability. When activated, the RUN command will cause the hardware to run the currently selected sequence (DIGital:SEQuence:SELect<seq_name>) and enter the loop defined by the LOOP:BOUNdary command. DIAGnostic:SEQuence:LOOP[:STATe]? returns the state of the loop function for the currently selected sequence: enabled (1) or disabled (0).

  • Page 124: Diagnostic:sequence:memory

    DIAGnostic: DIAGnostic:SEQuence:MEMory commands make use of special, high-speed GPIB transfers to load and read attribute and pattern data SEQuence: directly to and from the instrument hardware. Grouping and Sequence MEMory mechanisms cannot be used, so each port must be filled individually. These commands perform raw loads (writes) and dumps (reads) of sequence memory for the port you specify in the command (or loads of sequence memory for the timing module), without regard to the group or sequence...
  • Page 125 As shown in Figure 5-3, the sequence for each vector loaded into memory is DIAG:SEQ:MEM divided into two fields: an attribute field (bits 8 through 15) and a data Command Overview field (bits 0 through 7). DIAG:SEQ:MEM:ATTR/ATTR? loads and dumps to the attribute field, DIAG:SEQ:MEM: DATA/DATA? loads and dumps to the data field, and DIAG:SEQ: MEM [:COMB]/[:COMB]? loads and dumps to both fields.
  • Page 126 Figure 5-4. Timing Module Attribute/Data Fields Figure 5-5. Pattern I/O Modules Attribute/Data Fields DIAGnostic Commands 5-15...
  • Page 127 DIAGnostic:SEQuence:MEMory:ATTRibute DIAGnostic:SEQuence:MEMory:ATTRibute <module_#>,<port>, <seq_addr>,<block> performs a direct load of the attribute field for the memory of the given port. Sequence memory begins loading at the memory location specified by the parameter <seq_addr>. The attribute field consists of the upper (most-significant) eight bits of the memory word. DIAGnostic:SEQuence:MEMory:ATTRibute?<module_#>,<port>, <seq_addr>,<count>...
  • Page 128 DIAGnostic:SEQuence:MEMory[:COMBined] DIAGnostic:SEQuence:MEMory[:COMBined]<module_#>, <port>, <seq_addr>,<block> performs a direct load of both the attribute field and the data field for the selected sequence memory. Sequence memory begins loading the <block> of attribute/pattern data at <seq_addr>. DIAGnostic:SEQuence:MEMory[:COMBined]? <module_#>, <port>, <seq_addr>, <count> returns both fields for the selected sequence memory.
  • Page 129 • Pattern I/O Port Attribute/Data Fields: Figure 5-5 shows the attribute and data fields for each vector of a sequence addressed to a port memory. Bits 8, 9, 14, and 15 are a "don’t care" when written and return a "1" when read.
  • Page 130 160 OUTPUT @Dft;"GRO:DEL:ALL" !Delete all previous pin groups 170 OUTPUT @Dft;"GRO:DEF OUT,(@1(0))" !Pin group "OUT" = module 1, port 0 180 OUTPUT @Dft;"GRO OUT" !Select pin group "OUT" 190 OUTPUT @Dft;"GRO:MODE STIM" !Set goupt to STIMulus mode 200 OUTPUT @Dft;"STIM:CLOC:SOUR INT0" !Select internal clock 0 210 OUTPUT @Dft;"TIM:CYCL:DEL:ALL"...
  • Page 131 FOR I=1 TO Digit_count !Begin loop ENTER @Dft USING "#,B";Digit !Enter digit value Digit=Digit-NUM("0") !Set initial digit value Blk_size=Blk_size*10 !Define block size Blk_size=Blk_size+Digit !Change block size NEXT I !Next count TRANSFER @Dft TO @In_buf;COUNT Blk_size,WAIT !Transfer data to buffer ENTER @Dft USING "#,B";Digit !Enter digit value ENTER @In_buf USING "#,Y";In_dat(*) !Enter data from buffer...
  • Page 132 Since the Pattern I/O Modules always return "1" for bits 8, 9, 14, and 15, "-15616" is added to the decimal value sent to the module. For example, for vector 1 "-15616" is added to "+8193" for a returned value of "-7423". Display Using [:COMB] and [:COMB]? Vector Attr/Data Pattern sent...
  • Page 133 Display Using [:COMB] and :DATA? This display shows typical results when DIAG:SEQ:MEM[:COMB] and DIAG:SEQ:MEM:DATA? are used. To get this display, change the following program lines to the form shown, and reRUN the program. 470 OUTPUT @Dft;"DIAG:SEQ:MEM:DATA? 1,0,0,8" 600 ENTER @In_buf USING "#,B";In_dat(*) 720 Format:IMAGE 2X,D,4X,S5D,3X,8A,3X,8A,6X,S5D,15X,8A 730 PRINT USING Format;I,Out_dat(I),A$(I)[1,8],A$(I)[9,16],...
  • Page 134 DIAGnostic:SEQuence:MEMory:DATA Description DIAGnostic:SEQuence:MEMory:DATA <module_#>,<port>, <mem_ addr>,<block> loads the pattern data field for the selected sequence memory. Loading begins at the memory location specified by the <seq_addr> parameter. DIAGnostic:SEQuence:MEMory:DATA? <module_#>,<port>, <mem _addr>,<count> returns the contents of the data field for the selected sequence memory.

  • Page 135: Diagnostic:system:health

    DIAGnostic: The DIAGnostic:SYSTem:HEALth subsystem controls the hardware status (health) monitoring capability of the Model D20. A "healthy" port SYSTem:HEALth means that it is functional with respect to the other ports of the instrument. For example, in a Model D20 where some ports have pods attached, but other ports do not, the ports without pods are considered "sick"...
  • Page 136 Each string contains six decimal numeric values of the form <module_#>,<device_id>, <health> ,<health>,<health>,<health> The decimal numeric value of the module code field in the module’s Device <device_id> Type VXI register: Module Name device identification E1451A Pattern I/O Module E1450A Timing Module...
  • Page 137 Pattern I/O Modules have one health field for each port: <health> Fields "<health>,<health>,<health>,<health>". The Timing Module uses only the first health field, and the last three are zero ("<health>,0,0,0"). A <health> field response of "0" indicates no hardware problems are identified.

  • Page 138: Diagnostic:timing:valid

    DIAGnostic: DIAGnostic:TIMing:VALid? [<start_vector>] returns any problems found after analyzing the currently selected TIMing:CYCLe:SEQuence. TIMing:VALid? Analysis begins at the vector specified by <start_vector> and proceeds to the end of the sequence. Subsystem Syntax Description DIAGnostic:TIMing:VALid? Subsystem DIAGnostic :TIMing :VALid?[<start_vector>] Validates selected TIM:CYCL:SEQ DIAGnostic:TIMing:VALid? Description DIAGnostic:TIMing:VALid? [<start_vector>] returns any problems...
  • Page 139 5-28 DIAGnostic Commands...

  • Page 140: Index

    Index D (cont) Assemblies, exchange, 3-1 DIAG:SEQ:MEM:ATTR, 5-16 Assembly/disassembly instructions, 4-9 DIAG:SEQ:MEM[:COMB], 5-17 DIAG:SEQ:MEM:DATA, 5-23 DIAG:SYST:HEAL, 5-24 DIAG:SYST:HEAL:CHEC, 5-24 DIAG:SYST:HEAL[:STAT]?, 5-25 CAUTIONS, 1-3 DIAG:TIM:VAL?, 5-27 Certification, i Disassembly/assembly instructions, 4-9 Code list of manufacturers, 3-2 Documentation map, v Component locators, E1450A Timing Module, 3-10 E1450A/51A/52A cables, 3-19 E1451A Patt I/O Modules, 3-13...
  • Page 141 E (cont) Test F-7: Marker Outputs, 2-34 Information, ordering, 3-1 Test F-8: End-If-Ready Inputs, 2-38 Initial inspection, 1-6 Test F-9: Clock Outputs, 2-44 Instructions, assembly/disassembly, 4-9 Performance verification tests, Test P-1: Subcycle Period, 2-48 Test P-2: System Skew, 2-51 Self-tests, Kits, field installation, 3-1 Test S-1: Model D20 Pwr-On Test, 2-4 Test S-2: Model D20 Hdwe Test, 2-7...
  • Page 142 Operating environment, 1-5 Recommended test equipment, 1-5 Options, Model D20, 1-4 Reference designators, 3-2 Ordering information, 3-1 Repair strategy, recommended, 4-1 Overview, manual, vi Repair/maintenance guidelines, 4-13 Replaceable parts lists, 3-1 Required equipment, 4-1 Parts lists, E1450A Timing Module, 3-3 E1450A/51A/52A cables, 3-9 Safety, E1451A Patt I/O Modules, 3-5...
  • Page 143 Term Pattern I/O modules fields, 5-15 component locator, 3-14 disassembly, 4-11 Test equipment, recommended, 1-5 Test record, performance, 2-55 Timing module, disassembly, 4-9 component locators, 3-10 fields, 5-15 Timing pods, component locator, E1453A, 3-15 component locator, E1455A, 3-17 Troubleshooting, flowchart, 4-2 guidelines, 4-2 Typical configuration, 1-1 Using the light board, 2-2...

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