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B BOARD SCHEMATIC DIAGRAM (2 OF 4)
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A
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B
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C
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D
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E
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F
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G
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H
—
I
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J
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K
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L
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M
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N
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O
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P
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— 62 —
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B BOARD WAVEFORMS (2 OF 4)
1
3.5 Vp-p (V)
4
1.2 Vp-p (H)
7
1.2 Vp-p (H)
10
1.0 Vp-p (H)
13
1.3 Vp-p (H)
B BOARD: IC3001 CXA2151Q
SCL
30
IIC BYS
SDA
31
DEC
ADDRESS
32
IN1-1
33
YPbPr J/YCbCr
IN1-2
34
IN1-3
35
YPbPrU /YCbCr
IN1-H/L1
36
1.2.3
IN1-V/L2
37
GBR/YCbCr
IN1-L3
38
IN1-SW
39
SEL STB-1
SEL-STB-2
IN2-1
41
DECL1 -1
IN2-2
42
DECL2 -1
IN2-3
43
DECL3 -1
DECSW -1
IN2-H/L1
44
DECL1 -2
IN1~IN4
45
DECL2 -2
IN2-V/L2
SELECTOR
DECL3 -2
IN2-L3
46
DECSW -2
IN2-SW
47
3
IN3-1
1
6dB
IN3-2
2
IN3-3
3
HYSW
4
IN3-V
H
IN3-V
5
IN4-1
7
IN4-2
8
V
IN4-3
9
IN4-V
10
IN4-V
11
INPUT-SEL
KV-32HS20/36HS20/36HS20H/32XBR450/36XBR450/36XBR450H
2
3
3.7 Vp-p (H)
1.5 Vp-p (H)
5
6
1.3 Vp-p (H)
0.2 Vp-p (3.58MHz)
8
9
0.8 Vp-p (H)
4.8 Vp-p (14.3MHz)
11
12
2.4 Vp-p (20MHz)
1.5 Vp-p (H)
14
1.3 Vp-p (H).
Y
27
SELY OUT
6dB
Cb
MATRIX
26
SELCB OUT
AMP
SELECTOR
Cr
SELCR OUT
25
YGAIN
GAIN_SEL
CLOCK
EXTCLK/X1
20
CBGAIN
GEN.
CRGAIN
MAT-OUT
CLK - SEL
18
IREP
AUTODUM
H - NUMBER
V - NUMBER
40
VCC1
SYNC
GND1
COUNTER
48
VCC2
28
DUMMY
24
GND2
SYNC
3 - STATE
12
VCC3
MACRO
EXISTENCE DISTINCTION
6
GND3
3 - STATE
SYNC
MACRO
H SYNC
22
SELH OUT
INTELLIGENT SYNC SEP
DET.
VISION
WIDTH
HSEP SEL
HS- MAX
H-WIDTH
23
SELV OUT
HD TC
FIX -SYNC
V TC
PRIORITY BANKING
HV > CS > SYNC ON Y/G
SELDUM
15 16
13
14
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