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CXR Larus Corporation 80-100-400 Company Manual Issue 1, July 2006 StarClock 200E Model 54500 System Shelf T1/E1 Synchronization Timing System VOLUME 1 System Description This manual applies to the following equipment: Model Model 54500-16 54541-2 54500-17 54542-2 54501-1 54550-21 54502-1...
Volume 1 Contents __________________________________________________________________ section topic page Introduction General System Description Versions 1.31 Stratum 3E/LNC System 1.32 Stratum 2/TNC System 1.33 Stratum 1/PRC System 1.34 General GPS Information 1.35 Track and Hold Clock Card Combinations 1-10 1.36 Characteristics Common to All Systems 1-11 Cards 1-11...
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Output Driver Cards Model 5457 5 RS-422 Output Driver Card Model 5457 7 5/10 MHz Output Driver Card 3.47 Model 54500E Backplane (of Shelf) Operation General Operation from Front Panels 4.21 Hold Mode Track and Hold Card Tests 4.22 Selection of C lock Source for Output Driver Cards 4.23 Alarm Cutoff on 54560 Alarm...
_ ____________________________________________________________________ 1.1 General 1.11 This document is Volume 1 of this series of manuals and describes the CXR Larus StarClock 200E Expandable T1/E1 Synchronization Timing System and its theory of operation. This is the expandable version of the system which uses the Model 54500 shelf is shown in Figure 1-1.
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The StarClock 200E is an expandable and modular system packaged in a Network Equipment Building System (NEBS) compatible 19/23-inch (48.2/58.4 cm) rack mounting shelf, Model 54500-16 for the E1 application or Model 54500-17 for the T1 application. The shelves contain backplanes that receives all source signals and distributes them to the appropriate cards for processing.
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NOTE: many of the output cards have twenty outputs each Figure 1-2 StarClock 200E Master Shelf System Block Diagram __________________________________________________________ CXR Larus 80-100-400 Issue 1, July 2006...
CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ 1.2 System Description – Master shelf 1.211 The StarClock 200E provides an accurate and reliable way to synchronize communication network elements (NEs) throughout a building and, with the use of additional equipment, throughout a communication network.
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This mode is called free run. Since there is no reference available to compare to the output frequency in free run, the output frequency could be farther off-frequency than in holdover. __________________________________________________________ CXR Larus 80-100-400 Issue 1, July 2006...
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CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ 1.222 Each of the output driver cards can select from four inputs, one from each of the input track and hold cards and one from each DS1, E1, or CC input reference directly. Logic on each output driver card selects the "best" timing source.
Stratum 2/TNC System 1.321 A redundant Stratum 2 or TNC system includes a 54500-17 (T1) or 54500-16 (E1) mounting shelf, two 54511-2 T1 or 54512 E1/2.048 or 54513 Input Cards, and two 54523 Track and Hold Clock Cards equipped with rubidium oscillators.
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CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ Figure 1-3 Typical StarClock 200E Front Panel Layout __________________________________________________________ CXR Larus 80-100-400 Issue 1, July 2006...
A redundant Stratum 1 or PRC system is made up of a 54500-17 (T1) or 54500-16 (E1) shelf, two 54511-2 T1 or 54512 E1/2.048 MHz or 54513 Input Cards, and either two 54591 GPS Track and Hold Clock Cards or two 54593 GPS Track and Hold Clock Cards.
___________________________________________________________ 1.344 The GPS radio receiver internal to the CXR Larus 54591/54593 module receives and compares signals from these satellites and processes a result, not in terms of a precise location but in terms of a precision frequency, since it assumes that the installation has a fixed location on earth.
1.544 MHz EIA RS-422 square wave, 8 kHz EIA RS-422 square wave, and 5/10 MHz. Each basic output card provides twenty outputs except for the RS- 422 card which has ten and the 5/10 MHz card which has two outputs of each type. __________________________________________________________ CXR Larus 80-100-400 Issue 1, July 2006 1-11...
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CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ Table 1-A Card Function and Identification Function Model T1 Input Card 54511-2 E1 Input Card 54512-4 2.048 MHz Input Card 54512-3 Input Card, Composite Clock 54513-3 5 MHz 54513-4 10 MHz 54513-5 1.544 MHz unframed RS-422...
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The 54580 Network Time Server (NTS) Card, available as an option with the GPS system, distributes time for precise synchronization of client computer clocks over a packet network. It is fully documented separately in CXR Larus user manual 80-100-286 issue 2.
CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ 1.471 If a reference input is lost, the frequency synthesizer continues with the last known frequency settings and signals the output cards that it is in holdover. The output cards switch to use the track and hold output that is still tracking.
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Low power consumption: for a full system, approximately 90 watts for Stratum 3E, 105 watts for Stratum 2, 88 watts for LNC, 105 watts for TNC, and 110 watts for Stratum 1 or PRC. p. Rack mounting: Fully NEBS-compatible. __________________________________________________________ CXR Larus 80-100-400 Issue 1, July 2006 1-15...
CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ 1.6 Options 1.61 The options listed below apply as indicated to any or all versions of the StarClock 200E system. 1.62 The StarClock 200E system may be ordered on a card-by-card basis to obtain either a minimal system with no redundancy (not recommended) or a fully redundant system.
In such an environment, central office battery plants can supply virtually unlimited current which is fused at the relay rack fuse panel. When a CXR Larus system is powered up altogether in one instant, the transient inrush current is significant.
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CXR Larus 80-100-400 Issue 1, July 2006 ___________________________________________________________ backplane. However, in some complex installations, the StarClock 200E expansion shelf is used to aid in timing output distribution. A maximum of eight expansion shelves may be used for this purpose, all “slaved” from the main shelf in a star topology.
Stratum 2/Transit Node Clock (TNC) or Stratum 3E/Local Node Clock (LNC) clock systems are installed at all other sites. In ring systems, as is _______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006...
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ the case with many modern fiber and radio networks, using the traffic-carrying DS1 or E1 signal to drive the timing systems is not genera lly recommended but has been found to work well and solve many problems.
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_______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________...
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_______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________...
(Stratum 2/TNC is higher than Stratum 3/LNC and Stratum 1/PRC is higher than Stratum 2/TNC). A higher level is preferred, provided reliable diverse DS1 or E1 paths from that office exist, but is not required. (continued) _______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ NOTE: This common reference source is called a Synchronization Timing System (STS) and is intended to feed a reference signal to all digital equipment within a building. As a result, all of the transmission clocks will have a common "heartbeat."...
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±32 x 10 CXR Larus-enhanced performance. Performance requirements for the remaining stratum levels (except Stratum 3E) are taken from ANSI/T1.101-1994, Synchronization Interface Standard for Telecommunications, and Bellcore GR-1244-CORE, Clocks for the Synchronized Network: Common Generic Criteria. The Stratum 3E level is defined only by Bellcore.
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CXR Larus 80-100-400 2-10 Issue 1, July 2006 _____________________________________________________________ Table 2-B E1 Clock Performance* Type Accuracy, Pull-in Stability Calculated Adjustment Range Time To First Range Frame Slip Primary Reference 1 x 10 Clock >70 days Initial frequency offset of 5 x 10...
DS1 or E1 framed ones or a 64 kb composite clock . Many NEs have primary and secondary timing ports; the signals to these _______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006 2-11...
CXR Larus 80-100-400 2-12 Issue 1, July 2006 ______________________________________________________________ 2.231 (continued) should be taken from different output cards of the Central Clock system. The Central Clock may also provide primary and secondary timing signals, through interoffice synchronization network paths specially selected for high availability, to other Central Clocks in downstream offices.
Standardization Sector of ITU Public Data Networks, Interfaces, Interface between Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE) for terminals operating in the pac ket mode and connected to Public Data Networks by dedicated circuit. _______________________________________________________________ CXR Larus 80-100-400 Issue 2, July 2006 2-13...
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Automatic Line Buildout (ALBO): Dynamic range 0 to 36 dB 3.316 Duty Cycle: 50% for all input types 3.317 Ones Density: Not less than 12.5%; no more than 15 consecutive zeros for DS1 inputs ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page...
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Figure 3-1. Model 54511 T1 Input Card Front Panel NOTE: For Model 54512-3, the INPUT designation is SQ. ___________________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page...
For the front panel of the Model 54512, refer to Figure 3-2. 3.322 Input Signals: In conjunction with the backplane of the Model 54500-16 shelf, supports two E1 or 2048 kHz inputs with three termination alternatives: a. E1 Inputs 1. Terminating input, 120 ohms. Pulse amplitude range 0.5 volt to 3.0 volts base to peak, bipolar.
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Figure 3-2. Model 54512-4 E1 Input Card Front Panel NOTE: For the Model 54512-3, the INPUT designation is changed to 2.048 MHz. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page...
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120 ohms ±5% When used in conjunction with the backplane, input impedance of the card at the bridging input terminals in the shelf with the termination resistors removed is >3.3K ohms. ___________________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page...
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Front panel monitor jack (-20 dB) for recovered signal. Serial Data Output to both track and hold cards from the transceiver. 3.3292 LED Indicators: Front Panel Label LED Color Indication ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page...
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• 1.544 MHz RS-422 unframed, 54513-6 • 2.048 MHz RS-422 unframed, 54513-7 b. Support of balanced or unbalanced signal impedance (see paragraph below) c. Dual input channels switchable under software command ___________________________________________________________ 3-10 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Figure 3-3. Model 54513 Input Card Front Panel ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-11...
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100 ohms ± 5% 3.337 Input Sensitivity: 0.5 to 6.0 volts b-pk 3.338 Connector (on backplane): Three pairs of wirewrap terminals for 22 AWG shielded pair cable 3.339 Output Signals: ___________________________________________________________ 3-12 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Loss of signal (LOS) (no clock recovery) or loss of frame (LOF), including the alarm indication signal (AIS) 3.3392 Card Power: -48 volts, 40 mA (nominal) 3.3393 Power Fuse: 0.75 amp, Type GMT 3.3394 Fuse Alarm: Closure to battery ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-13...
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Fig 3-4 Model 54522 Stratum 3E Track and Hold Card ___________________________________________________________ 3-14 CXR Larus 80-100-400 Issue 2 July 2006 page...
Transceiver Select lines from other track and hold card 3.3431 Framing Format: a. DS1 Inputs SF or ESF on each input automatically selected or set from 54550 through the serial port. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-15...
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3.3440 Pull-in Range: 1.544 MHz ±4.6 x 10 (±7.1 Hz) 2.048 MHz ±4.6 x 10 (±9.4 Hz) Will not track any phase transient greater than 8 UI. 3.3441 Holdover Drift: ___________________________________________________________ 3-16 CXR Larus 80-100-400 Issue 2 July 2006 page...
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54522 is installed. h. Sync Status Messaging data and clock lines (DS1 only) to output cards. Input select line to 54511/54512/54513 input cards. Serial Data output to transceivers to both input cards. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-17...
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At bottom of display: Correction in progress due to more than 1/4 bit phase change. Displayed momentarily immediately after power-up if input card is T1 type (54511) or CC/5 Mhz/10 MHz (54513). Displayed momentarily immediately after power-up if input card is ___________________________________________________________ 3-18 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Outside nominal tracking range of ±7.1 Hz or jitter more than 7 UI peak. Excessive invalid cyclic redundancy check sum (CRC6) codes (for ESF signals only); does not cause hold. LOS (175 consecutive zeros). ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-19...
5 MHz Inputs Recovered clock from 54513-4 input cards, nominal 5 MHz, tracks within ± 23 Hz. f. 10 MHz Inputs Recovered clock from 54513-5 input cards, nominal 10 MHz, tracks within ___________________________________________________________ 3-20 CXR Larus 80-100-400 Issue 2 July 2006 page...
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54550 through the serial port. c. 2048 kHz Inputs Does not apply. d. CC/5 MHz/10 MHz/RS-422 Inputs Does not apply. 3.3524 Line Code: Does not apply 3.3525 Input Impedance: Does not apply ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-21...
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Fig 3-5 Model 54523 Stratum 2 Track and Hold Card ___________________________________________________________ 3-22 CXR Larus 80-100-400 Issue 2 July 2006 page...
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±10° C temperature range <1 x 10 after one month, over ±10° C change within 24 hours 3.3534 Traceability: <1 x 10 3.3535 Warmup Time: Approximately 10 minutes from cold start ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-23...
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Serial Data output to transceivers on both input cards. k. Serial Clock to transceivers on both input cards. Transceiver Select lines to both input cards. 3.3539 LED Indicators: Front Panel Label LED Color Indication FAIL Card fail ___________________________________________________________ 3-24 CXR Larus 80-100-400 Issue 2 July 2006 page...
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For the clock card to detect an E1 type of input card, the input card itself must be present. Without an E1 input card physically plugged in, the clock card will default to ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-25...
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Input frequency is too far off. 3.3542 Card Power: -48 volts, 1.2 amp (nominal) when cold, 0.4 amp (nominal) after warmup (10 minutes) 3.3543 Power Fuse: 2 amps, Type GMT ___________________________________________________________ 3-26 CXR Larus 80-100-400 Issue 2 July 2006 page...
Recovered clock from 54513-3 input cards, nominal 64 kHz, tracks within ±0.3 e. 5 MHz Inputs Recovered clock from 54513-4 input cards, nominal 5 MHz, tracks within ± 23 10 MHz Inputs ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-27...
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1.57 GHz at an amplitude of approximately -135 dBm. The signal is delivered via coaxial cable to the GPS receiver circuit on the 54591 card. ___________________________________________________________ 3-28 CXR Larus 80-100-400 Issue 2 July 2006 page...
Fig 3-6 Model 54591 GPS Stratum 1/PRS Track and Stratum 3E/LNC Hold Clock Card ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-29...
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This feature is not available for reference replacement on the track and hold cards but can be used as tertiary input (i.e., able to be tracked). 3.3620 Oscillator: Ovenized crystal oscillator exceeds Stratum 3E/LNC specifications. ___________________________________________________________ 3-30 CXR Larus 80-100-400 Issue 2 July 2006 page...
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The output driver cards (Models 54571 through 54577) will not deliver an output whose frequency is within specification until the 54591 card has completed its warmup cycle following plug-in or power turn-on. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-31...
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Time of Day signal to output cards. k. Serial Data output to transceivers on both input cards. Serial Clock to transceivers on both input cards. m. Transceiver Select lines to both input cards. 3.3630 LED Indicators: ___________________________________________________________ 3-32 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Alternates with display of input reference.* At bottom of display: Correction in progress due to more than 1/4 bit phase change.* Displayed momentarily immediately after power-up if input card is ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-33...
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AIS. Input in Yellow Alarm state. Excessive frame bit errors (FBEs); does not cause hold. Outside nominal cyclic tracking range of ±7.1 Hz or jitter more than 7 UI peak. ___________________________________________________________ 3-34 CXR Larus 80-100-400 Issue 2 July 2006 page...
Stratum 1/PRC Primary Reference Source (PRS) is an integral GPS receiver, per Bellcore GR-2830-CORE and ITU-T G.811. a. DS1 Inputs Recovered clock from 54511 input cards, nominal 1.544 MHz; tracks within ±7.7 x 10 b. E1 Inputs ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-35...
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This spread spectrum signal has a frequency of approximately 1.57 GHz at an amplitude of approximately -135 dBm. The signal is delivered via coaxial cable to the GPS receiver circuit on the 54593 card. ___________________________________________________________ 3-36 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Fig 3-7 Model 54593 GPS Stratum 1/PRC Track and Stratum 2/TNC Hold Clock Card ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-37...
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Rubidium oscillator standard; performance exceeds ANSI Stratum 2/TNC specifications. The oscillator outputs a frequency of 10 MHz. 3.3713 Accuracy (20 years): a. 1.544 MHz ±5 x 10 (±1.544 x 10 in GPS mode (Stratum 1/PRC) ___________________________________________________________ 3-38 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Known mode. b. DS1 or E1 mode: 1. From power-up, after warmup time: 600 seconds (ACQUIRE 1 state). 2. From HOLD state returning to normal tracking: 1000 seconds (ACQUIRE 2 state). ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-39...
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Time of Day signal to output cards. k. Serial Data output to transceivers on corresponding input card. Serial Clock to transceivers on corresponding input card. m. Transceiver Select lines to both input cards. ___________________________________________________________ 3-40 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Status conditions while in tracking or acquisition state (display blinks every 1 to 2 seconds): ACQUIRE 1 state (single dot). At top of display: Normal tracking, no phase error. Alternates with display of input reference.* ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-41...
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Error conditions when card goes into HOLD state*: Excess BPVs; does not cause hold. LOF synchronization. AIS. Input in Yellow Alarm state. Excessive frame bit errors (FBEs); does not cause hold. ___________________________________________________________ 3-42 CXR Larus 80-100-400 Issue 2 July 2006 page...
Inactive inputs are not scanned. Access to this information is through the 54550 Information Management Card. 3.3812 The Model 54500-17 shelf can hold one or two 54541 cards, each capable of measuring five T1 input signals. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-43...
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Figure 3-8 Model 54541 T1 Synchronization Monitor Card ___________________________________________________________ 3-44 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Terminating DS1 100 ohms ±10% balanced Bridging DS1 1000 ohms ±10% Monitor DS1 437 ohms Tip side, 437 ohms Ring side Requires external balanced resistors to the Input Monitor Terminals ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-45...
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The clock recovery circuit used for jitter measurement acts as a single pole low pass filter for jitter frequencies above 23 kHz. 3.3819 Raw Phase Measurement: Raw unfiltered phase data for any of the five inputs, 32 phase samples per ___________________________________________________________ 3-46 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Threshold levels are defined in Section 4, Table 4-A. 3.3822 LED Indicators: Front Panel Label LED Color Indication FAIL Card fail Yellow Loss of Signal OOF/AIS Yellow Out of Frame/ Alarm Indication Signal Yellow Bipolar Violations Rate ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-47...
Access to this information is through the 54550 Information Management Card. 3.3912 The Model 54500-16 shelf can hold one or two 54542 cards, each capable of measuring five E1 or 2048 kHz input signals. E1 or 2048 KHz is selectable via TL1/ITL1 (Volume 3) or menu (Volume 4).
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54542 is installed. 3.3918 Measurements: a. Continuous monitoring of bit slip between track and hold cards; alarm output to 54550 and 54560 if this is greater than one slip every 30 minutes. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-49...
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- 1 to 805 CRC4 errors - more than 805 CRC4 errors Frame errored seconds (for CRC4) Timing parameters, using currently active clock as a reference (phase sampling rate 60,000 times per second): ___________________________________________________________ 3-50 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Consecutive intervals can be selected, with 32 phase samples per interval. d. RCV Framers: Two framers, one of which can be used in the scan mode while the other is ___________________________________________________________ 3-52 CXR Larus 80-100-400 Issue 2 July 2006 page...
3.3927 Fuse Alarm: Closure to battery 3.40 Model 54550 Information Management Card 3.4010 For switch and jumper locations and the front panel of the Model 54550, refer to Figure 3-10. ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-53...
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Cards A and B reporting their status (tracking, hold, freerun, or failed), personality, configuration, and (DS1) sync messaging. c. One-wire interface from all other cards, including each of the ten output cards, for reporting their personality and configuration. ___________________________________________________________ 3-54 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Fig. 3-10 Model 54550 Information Management Card ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-55...
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Track and Hold A and B clock status: tracking, holding, freerun, and control nearing end of the range. • Reference signal selection: CLOCK A, CLOCK B, IN A, or IN B. b. Alarms (broadcast on occurrence): ___________________________________________________________ 3-56 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Jumper (J3) allowing remote port to be configured as an Ethernet port. b. Switch (S4) for baud rate selection; not currently used. 3.4018 Card Power: -48 volts, 100 mA (nominal) ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-57...
One-wire interface to 54550 Information Management Card to report personality and input alarm and LED status and to modify the interpretation of any input alarm. 3.4113 Alarm Relay Contact Ratings: a. Switching power 30 W maximum ___________________________________________________________ 3-58 CXR Larus 80-100-400 Issue 2 July 2006 page...
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ACO pushbutton; disables audible alarm relays but not front indicators. Automatic reset on next alarm. 3.4116 Card Power: -48 volts, 100 mA (nominal) 3.4117 Power Fuse: 0.75 amp, Type GMT 3.4118 Fuse Alarm: Closure to battery ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-59...
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Figure 3-11. Model 54560 Alarm Interface Card ___________________________________________________________ 3-60 CXR Larus 80-100-400 Issue 2 July 2006 page...
Less than 0.03 UI peak to peak from 10 Hz to 40 kHz 3.4220 Drive: Each output capable of driving a standard DS1 receiver through 655 feet of low-capacitance 22 AWG office cable ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-61...
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Fig. 3-12 Model 54571 T1 Output Driver Card ___________________________________________________________ 3-62 CXR Larus 80-100-400 Issue 2 July 2006 page...
The card provides for automatic selection of these input references. Automatic selection can be overridden by manual remote selection. 3.4312 Output Signals: ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-63...
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If one or more outputs fail to meet the output pulse amplitude level, an output failure is reported to the 54560. The number of output failures is ___________________________________________________________ 3-64 CXR Larus 80-100-400 Issue 2 July 2006 page...
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Override (manual selection) OUTPUT LOSS Loss of one or more outputs 3.4321 Card Power: -48 volts, 100 mA (nominal) 3.4322 Power Fuse: 2 amps, Type GMT 3.4323 Fuse Alarm: Closure to battery ___________________________________________________ CXR Larus 80-100-400 Issue 2 July 2006 page 3-65...
CXR Larus 80-100-400 Issue 1,July 2006 _________________________________________________________ 3.44 Model 54573 E1 and Model 54574 2.048 MHz Square Wave Output Driver Cards 3.4410 For card layout and front panel of the Model 54573, refer to Figure 3-14. The Model 54574 front panel is shown in Figure 3-15.
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Fig. 3-14 Model 54573 E1 Output Driver Card _________________________________________________ 3-73 CXR Larus 80-100-400 Issue 1, July 2006 page...
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54560. The number of output failures is monitored by the 54550. There is a small jumper behind the faceplate that selec ts Protected or Non-Protected operation with a matching output card. _________________________________________________ 3-75 CXR Larus 80-100-400 Issue 1, July 2006 page...
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CXR Larus 80-100-400 Issue 1,July 2006 _________________________________________________________ 3.4421 LED Indicators: Front Panel Label LED Color Indication FAIL Card fail CLK A Green Clock A selected CLK B Green Clock B selected I/P A Yellow Input A selected I/P B Yellow...
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Figure 3-16. Model 54575 RS-422 Output Driver Card _________________________________________________ 3-77 CXR Larus 80-100-400 Issue 1, July 2006 page...
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CXR Larus 80-100-400 Issue 1, July 2006 __________________________________________________________ 3.4514 Number of Outputs: Ten per card; monitor jack (-20 dB) for output #1 3.415 Output Connectors (on backplane): Wirewrap, for up to 22 AWG shielded pair 3.4516 Output Jitter: Less than 0.03 UI peak to peak from 10 Hz to 40 kHz 3.4517...
If one or more outputs fail to meet the output pulse amplitude level, an output failure is reported to the 54560. The number of output failures is monitored by the 54550. _________________________________________________ 3-79 CXR Larus 80-100-400 Issue 1, July 2006 page...
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2 amps, Type GMT 3.4622 Fuse Alarm: Closure to battery NOTE: Specifications for the optional Model 54580 Network Time Server (NTS) Card are documented separately. Refer to CXR Larus Manual 80-100-286 issue 2. _________________________________________________ 3-81 CXR Larus 80-100-400 Issue 1, July 2006 page...
__________________________________________________________ 3.47 Model 54500E Backplane Refer to Section 5, Figure 5-1, for an illustration of the backplane. The information that follows applies to Larus Model 54500-16 (E1) and -17 (T1) shelves. This listing describes inputs, input/outputs, and outputs. 3.4710 Inputs: a.
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IRIG-B (BNC) 1PPS (BNC) g. Outputs from output cards (20 x 10 x 2 wirewrap) 3.4713 Model 54500E Mounting Shelf Card Slots: a. Slot 1 for Model 54511/54512/54513 Input Card A _________________________________________________ 3-83 CXR Larus 80-100-400 Issue 1, July 2006 page...
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Slots 9-18 for Model 54571 to 54577 Output Driver Cards NOTE: If the optional Model 54580 Network Time Server Card is included in the system, it must be installed in the farthest right slot (slot 18) in the shelf. Refer to CXR Larus Manual 80-100-286. NOTE: The cards in the Model STS 54500 system come in two widths, 3/4-inch and 1 1/2-inch.
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CXR Larus 80-100-400 Issue 1, July 2006 4 Operations _____________________________________________________________________ 4.1 General 4.1010 This section consists of two parts, describing operation from the front panel and system self diagnostics. Refer to Figure 1-3 for a drawing of a typical front panel layout.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________________ _____ NOTE: Model 54522 and 54523 track and hold cards are provisioned at the factory with either AA or AB input architecture and Models 54591 and 54593 with AB architecture only. Refer to Appendix A. Assuming that there are acceptable DS1/E1 signals at Inputs A...
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CXR Larus 80-100-400 Issue 1, July 2006 Fig. 4-1. StarClock 200E Clock Auto-Selection State Diagram _____________________________________________ page...
CXR Larus 80-100-400 Issue 1, July 2006 __________________________________________________________ 4.23 Alarm Cutoff on 54560 Alarm Interface Card 4.2310 In the event of a Major or Minor alarm, the audible alarm relay contacts which connect to TB1 on the backplane can be disabled. Refer to Section 5, Figure 5-1.
CXR Larus 80-100-400 Issue 1, July 2006 ____________________________________________________________ described in Volume 3, the TL1/ITL1 User Manual, and Volume 4, the Menu User Manual. However, the thresholds are initially set to industry standards, so this should be considered before any changes are made.
In TL1/ITL1, unique failure reports for each of the circuit cards indicate which card to replace. Refer to CXR Larus Manual 80-800-400, the Model 54550 Information Management Card TL1/ITL1 User Manual, for the format of these reports.
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CXR Larus 80-100-400 Issue 1, July 2006 ____________________________________________________________ Table 4-A StarClock 200E Alarm Thresholds (Sheet 1 of 2) 54511/54512 Input Card Excess bipolar violations (BPVs), error ratio approximately 10 54522 and 54523 Track and Hold Clock Cards Other Settable Alarm...
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CXR Larus 80-100-400 Issue 1, July 2006 __________________________________________________________ Table 4-A StarClock 200E Alarm Thresholds (Sheet 2 of 2) 54591 and 54593 Track and Hold Clock Cards Alarm Failure Mode GPS Antenna Antenna power short or open GPS Oscillator GPS oscillator out of tune GPS Input Frequency 1.544 MHz reference input not present...
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Figure 5-1. There are horizontal tie bars across the top and bottom of the backplane for the purpose of anchoring output wiring cable bundles. Model 54500-16 (for E1) and Model 54500-17 (for T1) shelves appear to be identical, yet there are minor component value differences.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Fig. 5-1 StarClock 200E System, Model 54500-17 Backplane ____________________________________________________________ 5−2...
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_____________________________________________________________ 5.2212 DS1/E1 Inputs (P-1 to P-10 on the right side, as viewed from the rear) DS1/E1 inputs provide three different input terminations (monitoring, bridging, and terminating) for input cards and the Synchronization Monitor Card(s) when different pairs of 0.045 inch (0.114 cm) square wirewrap pins are selected. Shield grounds are included.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.2219 Sync Mon Interface Connectors The J7B pins provide an interface to the second Synchronization Monitor Card, if present. 5.2220 Output Pins (J9B to J18B) Paired pins on J9B to J18B provide twenty wirewrap outputs for each output card slot.
_____________________________________________________________ d. Provides monitoring and alarm information to the 54560 Alarm Interface Card in the event of: 1. Loss of input signal (LOS) 2. Loss of frame (LOF) 3. Excess bipolar violations (BPVs) e. Includes one-wire interface to 54550 for reporting personality (Model, List, Issue, revisions, Larus serial number, customer inventory control information, and other customer designated data), framing, light-emitting diode (LED) status, and slot ID.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-2. Model 54511 T1 or 54512 E1/2.048 MHz Input Card ____________________________________________________________ 5−6...
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_____________________________________________________________ 5.3212 Receive Framer The framer receives the clock and data signal from the T1/E1 receiver and tests for various signal conditions. The framer controls logic that drives front panel LEDs which indicate the following signal conditions: a. The red FAIL LED lights when the internal fuse has blown or the power supply has failed.
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Card in the event of loss of input signal (LOS). e. Includes one-wire interface to 54550 for reporting personality (Model, List, Issue, revisions, CXR Larus serial number, and other customer designated data), framing, light-emitting diode (LED) status, and slot ID.
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_____________________________________________________________ Two input channels are monitored with loss detector circuits and report loss of signal through a serial communication path. The LOS LED lights if the current active input is in an alarm condition. 5.4212 LED Indicators Front panel LEDs indicate the following conditions: a.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-3 Model 54513 Input Card select which input’s recovered clock is connected to the track and hold card. ____________________________________________________________ 5−10...
_____________________________________________________________ 5.4214 Monitor Jack A front panel jack allows the recovered signal to be monitored by any T1/E1 test set with a monitor input (-20 dB referenced to the input). 5.4215 One-wire Interface The one-wire interface allows communication of data between the T1/E1 input card and the 54550 Information Management Card.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Management Card and 54560 Alarm Interface Card. e. Facilitates synchronization status messaging per Bellcore GR-378 (DS1 only). 5.52 Circuit Description Refer to the block diagram in Figure 5-4 during the following discussion.
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_____________________________________________________________ Figure 5-4 Model 54522 Stratum 3E/LNC Track and Hold Clock Card __________________________________________________________ 5−13...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.5213 Samples of phase information are collected and averaged, over about a one-second time period, to provide input to the control algorithm. If, at any point in the accumulation and calculation period, a condition is detected (excessive errors, LOS, OOF, etc.) which causes the collected information to...
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_____________________________________________________________ where 48 is the number of binary digits (bits) used by the DDFS and (F osc) is nominally 10 MHz. Input to the microcontroller is the relative phase of the DDFS output and the input signal. Software computes phase deviation from initial reference and rate of change of phase difference.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ g. The green ACTIVE LED indicates that the unit is being selected to drive the outputs. h. The seven segment display indicates the STATUS of the input failure. The HOLD TEST pushbutton causes the microcontroller to execute a diagnostic routine and display 'H' if successful.
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_____________________________________________________________ clock card will reproduce it and send it out via the output card. As an example, the received SSM is Primary Reference Source (PRS) and its bit pattern is 0000010011111111 (refer to Table 5-A). The 54500 system will transmit this message so that, at the output, the system will be able to detect that the SSM equals PRS.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.5224 (continued) Before the clock card is stabilized, such as in the Free Run or Acquire 1 state, the active clock will output a DUS ("Do not use") SSM. This is during initial startup.
_____________________________________________________________ following initial qualification, the clock will be in tracking mode. After 45 to 60 minutes, the tracking mode will be at minimum error if the input is within specifications. The 54523 will track timing from another Stratum 2/TNC or Stratum 1/PRC source having an average frequency offset of no more than ±0.04 Hz.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.6212 DS1/E1 Receiver The DS1/E1 receiver regenerates the selected incoming signals and recovers both the clock and the data. The data is sent to the framing circuit. ____________________________________________________________ 5−20...
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_____________________________________________________________ Figure 5-5 Model 54523 Stratum 2/TNC Track and Hold Clock Card __________________________________________________________ 5−21...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.6213 Framer The 54523 communicates with a CS2180 Transceiver Chip for the T1 inputs or a CS2181 Transceiver Chip for the E1 inputs. The framing circuit detects the following framing errors: a. Yellow Alarm, LOS (175 ±75 consecutive zeros) b.
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_____________________________________________________________ the dominant factor in determining initial behavior. The control loop of the 54523 is piece-wise linear, since normal and ACQUIRE 2 can alternate. 5.6216 Controls and Latches The output phase is compared with the phase of the recovered input reference clock by means of a pair of counters and latches, good signal or bad: a.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ oscillator, results in a card alarm output to the 54560 Alarm Interface Card and to the 54550 Information Management Card. A data link to the 54550 card allows the 54523 card to report its status (tracking, hold, stand-alone, or failed) as well as control, personality and, with DS1 only, sync messaging data.
_____________________________________________________________ 5. 54550 sends the current SSM status to the terminal interface. (For the 54523, it is Stratum 2.) If the active clock card receives an SSM that is lower than its own stratum level, it will treat the case as LOS. If there is no SSM in the DS1 input, the clock will send out STU (SSM unknown), e.g.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ measurement logic. The calculation is performed as follows: a. The clocks start out by taking a phase measurement, which is the average phase difference between the clock's output and the reference input. This first reading acts as a signpost for the algorithm.
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_____________________________________________________________ 5.8010 The Model 54591 is a track and hold card with a GPS receiver to provide Stratum 1/PRC (Primary Reference Clock) performance. There are one or two 54591 cards in the Stratum 1/3E or PRC/LNC system. The 54591-2 supports the AB input architecture (see Appendix A);...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-6. Model 54591/54593 Card GPS Mode Algorithm ____________________________________________________________ 5−28...
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_____________________________________________________________ 5.82 Circuit Description Refer to the block diagram in Figure 5-7 during the following discussion. 5.8210 Microcontroller The functions of the 54591 track and hold card are controlled by an 80C320 microcontroller. The 80C320 memory space consists of two 64K blocks of memory, one each for program and data.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-7 Model 54591 GPS/Stratum 1 with Stratum 3E Holdover ____________________________________________________________ 5−30...
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_____________________________________________________________ 5.8221 DS1/E1 Receiver The DS1/E1 receiver regenerates the selected incoming signal and recovers both the clock and the data. The data go to the framing circuit. The 54591 measures the input DS1/E1 reference bit time phase as compared to the ovenized crystal oscillator output by means of a digital phase detector.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ F out = -------------- where 48 is the number of bits used by the DDFS and (F osc) is nominally 10 MHz. Input to the microcontroller is the relative phase of the DDFS output and the input signal.
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_____________________________________________________________ e. The green LOCKED LED indicates that the unit is locked to an input. The yellow FREERUN LED indicates that the unit is in the FREERUN mode. g. The green ACTIVE LED indicates that the unit is driving the outputs. h.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Card that the 54591 is installed. 5.8234 Synchronization Status Messages (DS1 with ESF only) When an SSM is received, the active 54591 clock card will reproduce it and send it out via the output card. As an example, the received SSM is PRS and its bit pattern is 0000010011111111 (refer to Table 5-A).
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_____________________________________________________________ 5.9 Model 54593 GPS Stratum 1/PRC Track and Stratum 2/TNC Hold Clock Card 5.9010 There are two 54593 track and hold cards in a redundant Stratum 1/2 or PRC/TNC system. The 54593-0 supports the AB input architecture (see Appendix A); the AA input architecture is not supported. In an oversimplified way, the Model 54593 card is a Model 54523 card with a GPS receiver added.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Refer to the block diagram in Figure 5-8 during the following discussion. 5.9210 Microcontroller The functions of the 54593 track and hold card are controlled by a DS80C320 microcontroller. The DS80C320 memory space consists of two 64K blocks of memory, one each for program and data.
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_____________________________________________________________ Figure 5-8 Model 54593 GPS Stratum 1 Track and Hold Card with Stratum 2 Holdover __________________________________________________________ 5−37...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 1. The primary reference for the A track and hold card is DS1/E1 Input A and for the B track and hold card it is DS1/E1 Input B. 2. The 54593 can select Input B to be from Input Card A by activating the CLKSEL output line.
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_____________________________________________________________ where 48 is the number of bits used by the DDFS and (F osc) is nominally 10 MHz. Input to the microcontroller is the relative phase of the DDFS output and the input signal. Software computes phase deviation from initial reference and rate of change of phase difference.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ g. The green ACTIVE LED indicates that the unit is driving the outputs. h. The green GPS LED indicates that the unit is tracking the GPS input. The yellow DEGRADED LED indicates that the unit is not in the GPS tracking mode.
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_____________________________________________________________ Card that the 54593 is installed. 5.9223 Synchronization Status Messages (DS1with ESF only) When an SSM is received, the active 54593 clock card will reproduce it and send it out via the output card. As an example, the received SSM is PRS and its bit pattern is 0000010011111111 (refer to Table 5-A).
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Clock operation for the Model 54591 and 54593 cards is identical to that for the Model 54522 and 54523 cards. Refer to subsection 5.6, substituting 54591 for 54522 in the text and 54593 for 54523.
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_____________________________________________________________ The 54541/54542 SMC block diagram appears in Figure 5-8. Refer also to Section 3, Specifications, paragraph 3.377 or 3.387, for a detailed description of the measurements that this card performs. 5.1021 Input Select Switch and Input Select Switch Decoder Under microprocessor control of the Input Select Switch Decoder (ISSD), the input select switch selects two of the five inputs for measurement and performance monitoring.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-9 Model 54541/54542 Synchronization Monitor ____________________________________________________________ 5−44...
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_____________________________________________________________ 5.1024 Alarm Circuit This circuit, under microprocessor control, provides a single line alarm, major or minor, to the 54560 Alarm Interface Card. 5.1025 Phase Detectors NOTE: For E1 and 2.048 MHz square wave operation, the E1 clock frequency is converted to T1 frequency before going to the phase detectors.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.1025 (continued) From the phase data, the processor calculates TIE, MTIE, and slip (193 bit slip) over an observation interval selected through the 54550 card. Jitter is calculated over a one-second interval using a 10 Hz high pass filter. The clock recovery circuit used for jitter measurements acts as a single pole low pass filter for jitter frequencies above 23 kHz.
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_____________________________________________________________ The following controls and indicators appear on the front panel of the card. A number of the yellow indicators, in any combination, may be on at the same time. LED data buffers provide latches and drivers for the various LED indicators: a.
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The 54550 version must support the same input architecture, AA or AB, as the track and hold cards. See Appendix A. NOTE: Refer to the CXR Larus TL1/ITL1 User Manual 80-800-400 for Transaction Language 1 instructions. Refer to the CXR Larus Menu User Manual 80-801-400 for Menu instructions.
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_____________________________________________________________ e. Message format either on menu screens or in the TL1/ITL1 language. Remote port which can be configured manually as an Ethernet port. g. On-card switch for setting the baud rate (not currently used). 5.112 Circuit Description The 54550 block diagram appears in Figure 5-10. 5.1121 General The 54550 receives alarm signals from every other card on the shelf and processes these to report status.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.1126 RAM A/B Random access memory of 512 kbytes on the card provides storage of alarm and performance data obtained from the SMC. The 54550 contains a DS1646 128K x 8 nonvolatile timekeeping RAM.
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_____________________________________________________________ Figure 5-10 Model 54550 Information Management Card __________________________________________________________ 5−51...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.1129 Controls and Indicators The following controls and indicators appear on the front panel of the card: a. The red FAIL LED lights if the on-card fuse blows or the processor or power supply fails.
_____________________________________________________________ on the Address Strobe signal eliminates the need for external logic. The LANCE interfaces with both multiplexed and demultiplexed data buses and features control signals for address/data transceivers. 5.1132 Power An on-card power converter provides the necessary circuit voltages from the diode-combined A and B -48 volt battery supplies.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ · Any single card failure. · Any combination of failures that leaves at least one clock in its tracking mode and at least one set of outputs available from odd/even pairs of output cards, e.g. OUT 1 (slot J9) and OUT 2 (slot J10).
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_____________________________________________________________ connecting to pin 10 on the backplane terminal strip TB1. __________________________________________________________ 5−55...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Figure 5-11 Model 54560 Alarm Interface Card ____________________________________________________________ 5−56...
_____________________________________________________________ 5.13 Model 54571 T1 Output Driver Card 5.1301 This card provides twenty separate DS1 DSX-compatible framed ones drive signals, with either SF or ESF framing. The outputs drive any standard T1 receiver through up to 655 feet of cable. An alarm output signal alerts the 54560 Alarm Interface Card when one or more outputs have failed.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.1322 T1 Transmit Framer The T1 transmit framer is clocked by the signal selected by the clock select switch. The signal is frame synchronized with the buffered signal from the external synchronization bus. It inserts either SF or ESF framing according to the setting of S1 and produces dual rail output pulses that the output drivers convert to bipolar framed all ones.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.14 Model 54572 Composite Clock Output Driver Card 5.1401 This card provides twenty separate composite clock outputs. The outputs drive SF channel banks and other equipment that require composite clock inputs. An alarm output signal alerts the 54560 Alarm Interface Card when one or more outputs have failed.
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_____________________________________________________________ 5.1422 Logic Block The 54572 logic block is clocked by the selected clock signal and frame synchronized from the external synchronization bus. It uses 8.192 MHz PLL (phase locked loop). The 8.192 MHz is divided by 128 to produce the 64 kHz composite clock (CC).
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ d. The yellow OVERRIDE LED lights when automatic selection has been overridden by manual remote selection. e. The red OUTPUT LOSS LED lights when a loss of one or more outputs occurs. If both A and B clocks and both input references fail, leaving no valid signal for the output cards to select, the OUTPUT LOSS LED lights and all outputs are suppressed.
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_____________________________________________________________ Note: twenty outputs now Figure 5-13 Model 54572 Composite Clock Output Driver Card __________________________________________________________ 5−63...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.15 Model 54573 E1 and 54574 2.048 MHz Square Wave Output Driver Cards 5.1401 The Model 54573 Output Driver Card provides twenty separate E1 compatible framed all ones output signals. The 54574 provides twenty outputs of 2.048 MHz square wave signals.
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_____________________________________________________________ The 54573 block diagram appears in Figure 5-14; the block diagram for the 54574 is shown in Figure 5-15. 5.1521 Clock Select Switch The clock select switch is a 1.544 MHz clock selector with phase buildout circuit, frame/byte synchronization system, LED indicators, and output alarms.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ Note: twenty outputs now Figure 5-14 Model 54573 E1 Output Card ____________________________________________________________ 5−66...
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_____________________________________________________________ NOTE: twenty outputs now Figure 5-15 Model 54574 2.048 MHz RS-422 Output Card __________________________________________________________ 5−67...
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.1524 Controls and Indicators The following controls and indicators appear on the front panel of the card: a. The red FAIL LED lights if the on-card fuse blows or the power supply fails.
_____________________________________________________________ 5.16 Model 54575 RS-422 Output Driver Card 5.1601 This card provides ten separate RS-422 compatible differential square wave outputs. The outputs drive any standard RS-422 compatible receiver through up to 400 feet of cable. An alarm output signal alerts the 54560 Alarm Interface Card when one or more outputs have failed.
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CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ is rationally related to the input frequency. 5.1623 Controls and Indicators The following controls and indicators appear on the front panel of the card: a. The red FAIL LED lights if the on-card fuse blows or the power supply fails.
CXR Larus 80-100-400 Issue 1, July 2006 ______________________________________________________________ 5.17 Model 54577 5/10 MHz Output Driver Card 5.1701 This card provides two 5 MHz and two 10 MHz 1 volt peak to peak ±10% sine wave outputs. An alarm output signal alerts the 54560 Alarm Interface Card when one or more outputs have failed.
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_____________________________________________________________ 5.1724 Controls and Indicators The following controls and indicators appear on the front panel of the card: a. The red FAIL LED lights if the on-card fuse blows or the power supply fails. b. The green CLOCK A/B LED lights when the corresponding clock, either A or B, is selected.
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10 on the backplane terminal strip TB1. NOTE: Information on the optional Model 54580 Network Time Server Card is documented separately. Refer to CXR Larus Manual 80-100-286. 5.18 Models 54571, 54572, 54573, 54574 Output Card Redundancy Switching 5.1801...
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was placed secondarily to the first one. e. The first illustration shows the traditional output numbering scheme as viewed on the wirewrap pins of the backplane. The second illustration shows the traditional (non-protected method) output wiring method to deliver timing to network elements. All timing outputs are running actively, and the network element makes the decision to take timing on port A or port B.
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5.19 Output Cards with 10 outputs installed in a 200-output shelf Fig. 5-18 Installation of a 10-Output Card Into a StarClock 200E Shelf Card output signal Card output pins T&R Shelf output pins T&R …. Unused 1-16 Output signal #1 17-18 Output signal #2 19-20...
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There is no other technical issue with mixing 10-output cards and 20-output cards in one 200-output shelf. If there are any questions or comments about this, please contact CXR Larus at its National Support Center and ask to speak with an Applications Engineer, or email to support@laruscorp.com...
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All replaced products or parts shall become CXR Larus' property. CXR Larus will only honor the warranty at its repair facility in San Jose, California, unless stipulated differently under contract. It is the purchaser's responsibility to return, at its expense, the allegedly defective product to CXR Larus.
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CXR Larus arising out of or in connection with the performance of the products.
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Appendix A ___________________________________________ tarClock 200E AA versus AB Architecture A redundant StarClock 200E system contains two inpu t track and hold assembly. A single track and hold assembly is one of the following: One 54511/54512/54513 Input Card plus: • One 54 522 Stratum 3E/LNC Track and Hold Clock Card (AA or AB) --OR-- •...
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Larus 80-100-400 Issue 1, July 2006 MHz Input 1 as its primary input and is the active source being used by the output cards. If there is a failure of Input 1, Input Track and Hold A goes into holdover mode and checks whether the secondary input signal is good.
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Figure A-1 StarClock 200E AA Clock Architecture Figure A-2 StarClock 200E AB Clock Architecture (AB is universally used in North America) Larus 80-100-400 Issue 1, July 2006...
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Appendix B _________________________________________ tarClock 200E System Behavior: Phase Alignment A redundant system contains two track and hold cards. The output of one is used by the output driver cards and is referred to as the primary track and hold. The other card is in reserve and is called the secondary track and hold.
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