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BLUE CHIP AOP-12D User Manual

Multi-function analogue output card
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AOP-12D
Multi-Function
Analogue Output Card
User Manual

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Summary of Contents for BLUE CHIP AOP-12D

  • Page 1 AOP-12D Multi-Function Analogue Output Card User Manual...
  • Page 3 All rights reserved. No part of this publication may be reproduced, stored in any retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopied, recorded or otherwise, without the prior permission, in writing, from the publisher. For permission in the UK contact Blue Chip Technology.
  • Page 4 Amendment History Issue Issue Author Amendment Details Level Date 9/8/95 First approved issue, new front sheet. 20/12/95 Addition of EMC information to Technical Section. Errors corrected. References to current outputs removed. Added layout diagram. Earlier part no. was 127-038. Filename was ...\Userg.doc...

  • Page 5: Table Of Contents

    OPERATION OF THE CARD Programmable Digital Input/Outputs Control Codes Timers Timer Initialisation DAC Section Auto Channel Scanning MAPS AND REGISTERS Card Address Map DAC Control Register Channel Enable Registers SAMPLE PROGRAM DESCRIPTIONS QBASIC and C Examples Blue Chip Technology Ltd. 01270146.doc...
  • Page 6 Contents DETAILED CARD INSTALLATION Base Address Interrupts DMA Settings Card Layout Diagram APPENDIX A - NUMBERING SYSTEMS Binary and Hexadecimal Numbers Base Address Selection APPENDIX B - PC MAPS PC XT/AT I/O Address Map PC XT Interrupt Map PC AT Interrupt Map DMA Channels APPENDIX C - USING DMA The DMA Controller...

  • Page 7: Outline Description

    Outline Description Page 1 OUTLINE DESCRIPTION The AOP-12d is a PC-compatible short card which provides digital inputs and outputs, and analogue outputs. There are 24 TTL compatible programmable digital input/outputs available externally. There are also three programmable timers. One of the timer outputs is available externally to the user.

  • Page 8: Specification

    Any or all channels may be selected to be updated DMA Transfer Initialisation Software Start Signal Maximum Time Skew Channel 1 To Channel 12 144µS Between Channels 12µS DMA Timing Source On-board Programmable Timer Page 2 01270146.doc Blue Chip Technology Ltd.

  • Page 9: Digital Input/Outputs

    2.2 Volts minimum Current 10µA sink Low Level Input 0.8 Volts maximum Current 10µA source Digital Outputs Logic High Voltage 3.5 Volt minimum Current 400µA source Logic Low Voltage 0.4 Volt Current 2.5mA sink Blue Chip Technology Ltd. 01270146.doc Page 3...

  • Page 10: Timers

    2.3 hours Timer 2 Resolution 1µS Minimum Time 2µS Maximum Time 130mS Board Connectors PC ISA 8-bit card Analogue Signals 50 Way Male `D' Type Digital Signals 50 Way IDC Male Box Header Page 4 01270146.doc Blue Chip Technology Ltd.

  • Page 11: Electromagnetic Compatibility (Emc)

    This product meets the requirements of the European EMC Directive (89/336/EEC) and is eligible to bear the CE mark. It has been assessed operating in a Blue Chip Technology Icon industrial PC. However, because the board can be installed in a variety of computers, certain conditions have to be applied to ensure that the compatibility is maintained.
  • Page 12 This is a Class A product. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures. EMC Specification A Blue Chip Technology Icon industrial PC fitted with this card meets the following specification: Emissions EN 55022:1995...

  • Page 13: Quick Installation

    IRQ7 are provided. The PIO and the Timer cannot generate interrupts. The interrupt setting is selected by a link on jumper block JP1. If interrupt operation is not required leave the link off. Blue Chip Technology Ltd. 01270146.doc Page 7...

  • Page 14: Dma Settings

    Once all the links have been set, the card can be installed into the host computer. Observe all safety precautions and anti-static precautions. If possible try and locate the card away from 'noisy' cards such as hard disc controllers, network cards and processor cards. Page 8 01270146.doc Blue Chip Technology Ltd.

  • Page 15: Using The Card

    Page 9 USING THE CARD External Input/Output Connections The AOP-12d has two connectors for external circuitry. The analogue output signals are available at a standard 50 pin D-type connector which protrudes through the end bracket of the printed circuit board.

  • Page 16: Analogue Voltage Outputs

    Page 10 Using the Card Analogue Voltage Outputs The analogue output signals from the AOP-12d are available as voltages only, with the ability to supply a limited current. Each of the 12 output signals (Voutput-1 to Voutput-12) has a corresponding analogue ground or 0 Volt connection.

  • Page 17: Digital Connections

    Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground Digital ground DIO - Digital input/output. Blue Chip Technology Ltd. 01270146.doc Page 11...

  • Page 18: Operation Of The Card

    Operation of the Card OPERATION OF THE CARD Programmable Digital Input/Outputs The AOP-12d includes an NEC µPD71055 device which is equivalent to an Intel 8255 PIO. This device provides 24 programmable digital I/O channels. It is suitable for sensing the presence of, or driving TTL connections only. These connections should be kept as short as possible, less than 2 metres is recommended.

  • Page 19: Control Codes

    In Mode 2, data is transferred via one bi-directional 8 bit port (A) with handshaking (port C). Refer to the µPD71055 or i8255 data sheet for full details of the settings and use of Modes 1 and 2. Blue Chip Technology Ltd. 01270146.doc Page 13...

  • Page 20: Timers

    The reference clock for timers 0 and 2 is 1Mhz. Timer 1 is in series with the output of timer 0. Timer 0 is committed as the first divider for DMA in the AOP-12d and its output is also available on the external connector.
  • Page 21 Timer 2 Connection Block Diagram of Timer Connections The timer circuit appears to the PC as four ports. These four ports are mapped into the AOP-12d address map as follows: BASE Timer/Counter 0 (read/write). Timer/Counter 1 (read/write). + 10 Timer/Counter 2 (read/write).

  • Page 22: Timer Initialisation

    20 dummy% = inp(BASEADD) 30 out (BASEADD + 11,&h34) 40 out (BASEAAD + 8,&h03) 50 out (BASEAAD + 8,&h00) 60 out (BASEADD + 11,&h78) 70 out (BASEADD + 9,&h03) 80 out (BASEADD + 9,&h00) 90 out(BASEADD,&h40) Page 16 01270146.doc Blue Chip Technology Ltd.

  • Page 23: Dac Section

    Write the low 8 bits of the DAC data into BASE + 3. Write the high 4 bits of the DAC data into BASE + 3. Write the channel number to update (1 to 12) to BASE + 0. Write 0 to BASE + 0. Blue Chip Technology Ltd. 01270146.doc Page 17...

  • Page 24: Auto Channel Scanning

    To use this mode, the software must set-up a multi-dimensional array to store the data for 16 channels (12 real + 4 phantom channels). In BASIC: DIM dataarray%(numsamples,16) in C: int dataarray[numsamples][16] Software example 4 demonstrates the use of channel scanning. Page 18 01270146.doc Blue Chip Technology Ltd.

  • Page 25: Maps And Registers

    1 = Enable DAC control timers (timers 0 and 1) 0 = Disable uncommitted timer 2 1 = Enable uncommitted timer 2 writing 0 into all four bits updates the previously selected DAC output Blue Chip Technology Ltd. 01270146.doc Page 19...

  • Page 26: Channel Enable Registers

    0 = Enable channel 6 output 1 = Disable channel 6 output 0 = Enable channel 7 output 1 = Disable channel 7 output 0 = Enable channel 8 output 1 = Disable channel 8 output Page 20 01270146.doc Blue Chip Technology Ltd.
  • Page 27 When this bit is 1 the selected DAC channel will increment after each DAC update (DMA MODE ONLY) When this bit is 1 the AUTO-INITIALISE function of the DMA control is disabled (See USING DMA for a description of AUTO-INITIALISE) Blue Chip Technology Ltd. 01270146.doc Page 21...

  • Page 28: Sample Program Descriptions

    These demonstrate the DMA mode to output a sine wave to a single analogue output channel EXAMPLE4.BAS EXAMPLE4.C These demonstrate the DMA mode to output a sine wave to all twelve analogue output channels. Page 22 01270146.doc Blue Chip Technology Ltd.

  • Page 29: Detailed Card Installation

    A set of links are provided on the card to set the base address within the IBM- PC I/O port map. The address is in binary with the presence of a link representing a 0 and the absence of a link representing a 1. Blue Chip Technology Ltd. 01270146.doc Page 23...
  • Page 30 Address. Set the following pattern on the links as indicated below with Connector CON2 on right hand side and the gold fingers to the lower edge.:- Other examples are: Address hex 200 Address hex 240 Page 24 01270146.doc Blue Chip Technology Ltd.

  • Page 31: Interrupts

    The interrupt is selected on jumper block JP1. The diagram below shows the DAC set to produce an interrupt request on IRQ3. The second example shows the setting if the DAC generates interrupt request IRQ6. Blue Chip Technology Ltd. 01270146.doc Page 25...

  • Page 32: Dma Settings

    DMA controller acknowledges the request. It is essential that the pattern of links on the two jumper blocks correspond. The example below shows the link settings for the DAC to generate DRQ1 and receive DACK1. Page 26 01270146.doc Blue Chip Technology Ltd.

  • Page 33: Card Layout Diagram

    Detailed Card Installation Page 27 Card Layout Diagram Card Layout showing Selector Link Positions Blue Chip Technology Ltd. 01270146.doc Page 27...

  • Page 34: Appendix A - Numbering Systems

    F the units column resets to 0 and the next column increments from 0 to 1. This 1 indicates that sixteen counts have occurred in the units column. The second column is termed the “sixteen’s” column. Page 28 01270146.doc Blue Chip Technology Ltd.
  • Page 35 In the binary table above the rightmost or least significant column each digit has a value of 1. Each digit in the next column has a value of 2, the next 4, then 8 and so on. Blue Chip Technology Ltd. 01270146.doc Page 29...
  • Page 36 Hexadecimal upper nibble = (1 x 8) + (1 x 4) + (0 x 2) + (0 x 1) = 12 lower nibble = (0 x 8) + (1 x 4) + (1 x 2) + (0 x 1) = 6 The resulting value is C6 , since 12 is C Decimal Page 30 01270146.doc Blue Chip Technology Ltd.

  • Page 37: Base Address Selection

    Here a link is fitted to denote a binary or logic “0”, or left open to indicate a binary or logic “1”. The example shows a base address setting of 300 Blue Chip Technology Ltd. 01270146.doc Page 31...

  • Page 38: Appendix B - Pc Maps

    Reserved 378-37F Parallel Printer Port 1 380-38F Reserved for SDLC Communications, Bisync 2 3A0-3AF Reserved for Bisync 1 3B0-3BF Reserved 3C0-3CF Reserved 3D0-3DF Display Controller 3F0-3F7 Diskette Drive Controller 3F8-3FF Serial Port 1 Page 32 01270146.doc Blue Chip Technology Ltd.

  • Page 39: Pc Xt Interrupt Map

    Appendix B Page 33 PC XT Interrupt Map Number Allocated to: Parity Timer Keyboard Reserved Asynchronous Communications (Secondary) SDLC Communications Asynchronous Communications (Primary) SDLC Communications Fixed Disk Diskette Parallel Printer Blue Chip Technology Ltd. 01270146.doc Page 33...

  • Page 40: Pc At Interrupt Map

    IRQ 3 Serial Port 2 IRQ 4 Serial Port 1 IRQ 5 Parallel Port 2 IRQ 6 Diskette Controller IRQ 7 Parallel Port 1 DMA Channels Memory Refresh Spare Floppy Disk Drive Spare Page 34 01270146.doc Blue Chip Technology Ltd.

  • Page 41: Appendix C - Using Dma

    The first one is used for byte transfers in the bottom 1 MB of system memory, the second can transfer words into the bottom 16 MB. Blue Chip Technology boards only allow DMA channels 1 or 3 on the first controller to be used. Normally channel 0 is reserved for memory refresh control and channel 2 is used by the floppy disk drives.
  • Page 42 000DH DMA Master Clear 000EH Clear Mask Register 000FH DMA Write All Mask Register Bit 0081H Page Register DMA Channel 2 0082H Page Register DMA Channel 3 0083H Page Register DMA Channel 1 Page 36 01270146.doc Blue Chip Technology Ltd.

  • Page 43: The Dma Controller Registers

    The mode bits set the particular mode for the channel, normally this will be set for SINGLE mode. Auto INC/DEC Increment Address Decrement Address When a DMA transfer takes place, the transfer address can either be incremented or decremented after each transfer selected by this bit. Blue Chip Technology Ltd. 01270146.doc Page 37...
  • Page 44 (Analogue in), use read transfer when values are written from memory into the board (Analogue out). Channel Select Bit 1 Bit0 FUNCTION DMA Channel 0 select DMA Channel 1 select DMA Channel 2 select DMA Channel 3 select Page 38 01270146.doc Blue Chip Technology Ltd.
  • Page 45 The status register indicates which channels have made a DMA request and which channels have reached Terminal Count. Terminal count is set when the number of bytes specified by the TRANSFER LENGTH register have been transferred. Blue Chip Technology Ltd. 01270146.doc Page 39...

  • Page 46: Addressing

    PHYSICAL address of 0 to 1048575 (or 0 to FFFFF It has a LOGICAL range of 0000:0000 to F000:FFFF. The colon is commonly used to separate the SEGMENT address from the OFFSET address (Segment:Offset) Page 40 01270146.doc Blue Chip Technology Ltd.

  • Page 47: Dma Limitations

    The DMA controller is only capable of incrementing or decrementing the DMAOFFSET address, the DMAPAGE value is fixed throughout the transfer. This means that a maximum of 64K bytes can be transferred in one operation. Blue Chip Technology Ltd. 01270146.doc Page 41...

  • Page 48: Programming Example

    Load the mode for the selected DMA channel. Enable the DMA channel. The following extract from a QUICK BASIC program demonstrates how to program the DMA controller for a WRITE transfer. Page 42 01270146.doc Blue Chip Technology Ltd.
  • Page 49 2170 OUT (&H7), length% AND 255: REM BYTE COUNT LS 8 BITS 2180 OUT (&H7), length% / 256: REM BYTE COUNT MS BITS 2190 OUT (&HA), 3: REM ENABLE DMA TXFER 2200 RETURN Blue Chip Technology Ltd. 01270146.doc Page 43...

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