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General Description
The MICRF405 is a 290MHz-980MHz RF transmitter
IC designed for unlicensed ISM band operations. It's
designed to work in the North American 315MHz
and 915MHz bands as well as the European
433MHz and 868MHz bands. The device is fully
FCC Part 15.247 and EN300-220-compliant.
The transmitter consists of a FSK/ASK modulator,
PLL frequency synthesizer and a power amplifier.
The frequency synthesizer consists of a voltage-
controlled oscillator (VCO), a crystal oscillator, dual
modulus
prescaler,
dividers and a phase-detector. The loop-filter can be
internal or external. The output power of the power
amplifier can be programmed to eight levels. A lock
detect circuit detects when the PLL is in lock.
In FSK mode, the user can select between three
different modulation types allowing a data rate up to
200kbps. When selecting FSK modulation applied
with dividers, the MICRF405 is switching between to
sets of register values (M0,N0,A0:"0" and M1,N1
and A1:"1"). The second modulation type is closed
loop VCO modulation using the internal modulator
that applies the modulated data to the VCO. The
third FSK modulation type is Open loop VCO
modulation.
In ASK modulation, the user can select between two
modulation types, with or without spreading. In both
modes the modulation depth is programmable.
MicroLead Frame and MLF are registered trademarks of Amkor Technologies
RadioWire is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2006
programmable
frequency
MICRF405
290MHz – 980MHz ISM Band
ASK / FSK Transmitter
Features
• FSK/ASK transmitter
• Frequency programmable
• ASK modulation depth programmable
• High efficiency power amplifier
• Programmable output power
• Power down function
• MCU reference clock
• Base band package engine
• TX buffer
• No external tuning circuitry
Applications
• Meter reading
• Automotive
• Smart Home
• Remote control systems
• Residential Automation
• Wireless security system
®
RadioWire
M9999-041906
(408) 955-1690
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Summary of Contents for Micrel MICRF405
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Page 1: General Description
MicroLead Frame and MLF are registered trademarks of Amkor Technologies RadioWire is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com April 2006... -
Page 2: Table Of Contents
Writing to n Registers Having Incremental Addresses......................10 What to write ..................................11 Writing to n Registers Having Non-Incremental Addresses....................12 Reading from the Control Registers in MICRF405 ......................12 Reading from the Interrupt Register ............................ 12 Data Interface and Data Transfer............................. 13 Packet Engine Overview: .............................. -
Page 3: Ordering Information
Micrel MICRF405 Ordering Information Part Number Junction Temp. Range Package ® MICRF405YML –40° to +125°C PB-Free 24-Pin MLF ____________________________________________________________________________________________________ Block Diagram April 2006 M9999-041906 (408) 955-1690... -
Page 4: Pin Configuration
Micrel MICRF405 Pin Configuration ® 24-Pin MLF (Top View) Pin Number Pin Name Type Pin Function RFGND RF Ground RFVDD RF VDD RFOUT RF output RFGND RF Ground Not connected Crystal oscillator output Crystal oscillator input DVDD Digital VDD DGND... -
Page 5: Absolute Maximum Ratings
Micrel MICRF405 Absolute Maximum Ratings Operating Ratings Supply Voltage (V )......... +3.7V Supply voltage (V )......+2.2V to +3.6V Voltage on any pin (GND = 0V). .. -0.3V to 3.7V RF Frequencies......290MHz to 980MHz Lead Temperature (soldering, 20sec.)..... 260°C Data Rate (NRZ) ...........200kbps... -
Page 6: Electrical Characteristics (Cont.)
Micrel MICRF405 Electrical Characteristics (cont.) Parameter Condition Units FSK 38.4kbps, β = 2, bandwidth for 99.5% of total power, RBW=10kHz FSK 125kbps, β = 2, bandwidth for 99.5% of total power, RBW=30kHz Occupied bandwidth FSK 200kbps, β = 2, bandwidth for 99.5% of total power, RBW=100kHz ASK (OOK) 38.4kbps, bandwidth for 99.5%... -
Page 7: Data And Configuration Interface
405, the Data and Configuration Interface PA and clock-out for the microcontroller. The next The user interface of the MICRF405 is a serial block of 10bytes sets the output radio frequency peripheral interface (SPI) consisting of Serial through the dividers A, N and M. -
Page 8: Programming Interface Timing
Micrel MICRF405 Programming Interface Timing Figure 1 and Table 2 shows the timing specification for the 3-wire serial programming interface. Figure 1. Programming Interface Timing. Values Symbol Parameter Units Min. Typ. Max. Tper Min. period of SCK Thigh Min. high time of SCK Tlow Min. -
Page 9: Writing To The Control Registers In Micrf405
“0” for writing Values: 8 bits = D7, D6, …D0 (D7 = MSB, D0 = LSB) Table 4. When writing to a Single Register, totally 2 octets are clocked into the MICRF405. How to write: • Bring SEN low • Use SCK and SIO to clock in the 2 octets •... -
Page 10: Writing To All Registers
Octet: wanted values for ControlRegister1 and so on for all of the octets. Table 5. When writing to All Registers, totally 25/30 (5 are optional) octets are clocked into the MICRF405. How to write: Writing to n Registers Having Incremental •... -
Page 11: What To Write
D7, D6, …D0 (D7 = MSB, D0 = LSB) (written to control reg. with address ”i+1”) D7, D6, …D0 (D7 = MSB, D0 = LSB) (written to control reg. with address ”I+n-1”) Table 6. When writing to Registers having Incremental Addresses, totally 1+n octets are clocked into the MICRF405. How to write: •... -
Page 12: Writing To N Registers Having Non-Incremental Addresses
The When rising SEN after haveing read the register, the SIO line is output from the MICRF405 (input to user) internal load pulse will then clear all interrupt flags. for a part of the read-sequence. Refer to procedure To keep the flags when reading it, it is therefore description below. -
Page 13: Data Interface And Data Transfer
RDY/DATACLK pin. In this mode, and payload for each packet. The preamble bytes the MICRF405 will sample the bit on the DATAIN pin are equal to 10101010, and the number of preamble on the positive edge of the DATACLK. It is therefore... -
Page 14: Packet Engine Overview
Micrel MICRF405 Preamble SyncID Frame length Payload 1-4 bytes 1-4 bytes 1 byte 2/2/1-253/254/255 bytes 2/1/0 bytes Table 7. Virtual Wire Packet Structure Overview. SyncID_Len SynchID_Len Start of transmitted packet. Leftmost byte transmitted first Preamble SyncIDO Frame length Preamble SyncIDO... -
Page 15: How To Transmit A Packet With The Packet Engine
How to transmit a Packet with the Packet Engine: Send PROG data CALL PROG [TX] INIT WRITE SEQUENCE [SET SEN=”0"] MICRF405 starts the Control word, e.g: XCO. When XCO is TX mode: stable the MICRF405 INIT WRITE Mode1-0=3 [TX] powers up the LDOs SEQUENCE PA_LDc=”1"[Turns on PA... - Page 16 2 and 3 immediately after step 1. The PA_FEc_en=1, the PA will be automatically MICRF405 will now wait until the transmitter is turned off immediately after last bit in packet is ready (PLL tuned in, PA on and LD high) transmitted.
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Page 17: Programming Summary
8 used bits as well. • SCK is user-controlled. • Writing: Bring SEN low, write address and R/W • Write to the MICRF405 on positive edges bit followed by the new values to fill into the (MICRF405 reads on negative edges). -
Page 18: Main Modes Of Operation
CLKOUT pin Transmit mode Transmit mode (Default enabled). This clock can be used as a micro-controller reference frequency. In “TX“ mode Table 9. MICRF405 Main Modes. all blocks are active if not disabled by the user. Power Amplifier Data A6..A0... -
Page 19: Frequency Synthesizer
Micrel MICRF405 Power level 915MHz 434MHz 315MHz (PAx) (dBm) (mA) (dBm) (mA) (dBm) (mA) 10.0 17.5 10.3 16.8 10.5 16.4 13.2 13.0 13.3 11.5 11.6 11.5 10.5 10.6 10.2 -1.9 -1.1 10.0 -0.1 -4.2 -3.8 -3.2 -6.7 -6.8 -6.5 -9.2 -9.8... - Page 20 Micrel MICRF405 The frequency synthesizer consists of a voltage- where: controlled oscillator (VCO), crystal oscillator, : Crystal oscillator frequency prescaler, programmable frequency dividers, phase- : RF frequency detector and charge pumps. Two different types of 0 < A ≤ N prescalers are integrated, a pulse swallow and a phase select prescaler.
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Page 21: Crystal Oscillator (Xco)
The crystal should be connected between pins XTA the rest of the circuit will be turned on. The current and XTB (pin 7 and 8). MICRF405 has an internal consumption during the prestart period is typically crystal capacitor bank used for crystal tolerance 205µA. -
Page 22: Vco
The bias bits will optimize the phase noise, and the (load_en=1) while staying in TX mode. This means frequency bits will control a capacitor bank in the that when changing frequency, the MICRF405 will VCO. The tuning range, the RF frequency versus check that the VCO_Freq[2:0] settings are correct varactor voltage, is dependent upon the VCO for the new frequency. - Page 23 Micrel MICRF405 VCO_Fr_Chk Comments VCO control voltage is not controlled VCO control voltage is measured; if it is below 0.35V the VC_LO interrupt flag is set, if it is higher than AVDD-0.35V the VC_HI flag is set Table 13. VCO Control Voltage Out of Range Detection.
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Page 24: Charge Pump And Pll Filter
Micrel MICRF405 Charge Pump and PLL Filter Data A6..A0 0010011 INT_LF_EN=1 CP_CUR1=0 CP_CUR0=1 LF_RES1_4=0 LF_RES1_3=1 LF_RES1_2=0 LF_RES1_1=0 LF_RES1_0=1 0010100 LF_High_PM=1 LF_CAP1=1 LF_CAP0=1 LF_RES3_4=0 LF_RES3_3=0 LF_RES3_2=1 LF_RES3_1=0 LF_RES3_0=1 0010110 INT_LF_TEST=0 VCO_IB2=0 VCO_IB1=0 VCO_IB0=0 VCO_by=0 OUTS2=0 OUTS1=0 OUTS0=0 There are two charge pumps, one for the external A schematic for a third order loop filter is shown in loop filter, and one for the internal filter. - Page 25 Micrel MICRF405 Baud Phase Phase Mod. Freq Rate detector margin Coding Type [MHz] [kbaud/ Freq. [nF] [nF] [kΩ] [kΩ] [pF] [kHz] [°] sec] [kHz] > 30 Manchester > 100 Manchester 0.68 Divider < 20 DC-free 0.068 Divider < 20 DC-free 0.068...
- Page 26 These choices will also affect the MICRF405, are mainly the modulation method and switching time and phase noise. the bit rate. Internal loop filter, which have relative...
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Page 27: Modulation
The frequency modulation can be done in three are suitable. A high quality capacitor of 10-47nF different ways with the MICRF405, either by closed-, (COG type) should be connected on pin VARIN-to- open loop VCO modulation or by modulation with ground to ensure minimum frequency drift due to the internal dividers. - Page 28 Micrel MICRF405 {PA[2:0]-ASK[2:0]}*3dB. If PA[2:0]<=ASK[2:0], the Openloop drift Vdd=3.6V ASK modulation will be On Off Keying (OOK). For example, PA[2:0]=7 and ASK[2:0]=7 is OOK, but if ASK[2:0]=4, the modulation depth is –9dB (output -100 power for “1” is 10dBm and “0” is 1dBm). The...
- Page 29 Micrel MICRF405 RBW 3 kHz Marker 1 [T1 ] VBW 10 kHz -23.62 dBm 15 dBm 50 dB SWT 70 ms 915.018000000 MHz Delta 1 [T1 ] 4.58 dB -90.000000000 kHz D1 1 dBm 1 PK MAXH D2 -19 dBm...
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Page 30: Bit Rate Settings
Micrel MICRF405 the better shaping of the signal. However in some Bit Rate Settings cases, low FSKn causes the modulator to saturate The bit rate is set separately for ASK and FSK (Please see the section Modulator for details). When... -
Page 31: Deviation Setting
Micrel MICRF405 The two first blocks are generating a clock for the Const2 modulator. This clock is, together with the user data, fC: Carrier frequency of the radio. used to control a charge pump. The charge pump FreqBand: Frequency band. -
Page 32: Lock Detect
PA_LDc_en bit is set. From power interfering with the settling of the PLL due to PA turn down or stand by, simply program the MICRF405 to on. With MOD_LDc enabled the modulation will be TX with the wanted PA output setting. The delay until the PLL has locked with PA on. -
Page 33: Low Dropout Regulator (Ldo) And Low Battery Detector
MOD_LDc_en=0 PA_FEc_en=0 PA_LDc_en=0 LD_en=1 The MICRF405 has three internal LDOs powering noise decoupling. Alternatively, connect power to up different parts of the circuit, as can be seen in the pins 1 and 11 only, and set LDO[1:0]=3 and Block Diagram. The output voltages of the LDOs are LDO_by=0. -
Page 34: Bit Description
Micrel MICRF405 Bit Description Data A6..A0 Mode1=0 Mode0=1 PA2=1 PA1=1 PA0=1 ClkOut_en=1 Sync_en=1 Load_en=1 0000000 A0_5=0 A0_4=0 A0_3=1 A0_2=1 A0_1=1 A0_0=0 0000001 N0_11=0 N0_10=0 N0_9=0 N0_8=0 0000010 N0_7=0 N0_6=1 N0_5=1 N0_4=1 N0_3=0 N0_2=0 N0_1=1 N0_0=1 0000011 M0_11=0 M0_10=0 M0_9=0 M0_8=0... - Page 35 Micrel MICRF405 State 21dB attenuation or PA off if PA_LDc_en=0 18dB attenuation 15dB attenuation 12dB attenuation 9dB attenuation 6dB attenuation 3dB attenuation Max output Table 21. Power Amplifier. ClkOut_en ClkOut_1 ClkOut_0 State Comments CLKOUT off Output is 0 volt. CLKOUT on The XCO frequency is divided by 16.
- Page 36 Micrel MICRF405 ASK2 ASK1 ASK0 State 3dB ASK depth 6dB ASK depth 9dB ASK depth 12dB ASK depth 15dB ASK depth 18dB ASK depth 21dB ASK depth > 30dB ASK depth Table 25. ASK Modulation Depth When PA[2:0]=7. ASKshape Comments 0..7...
- Page 37 Micrel MICRF405 LDO_by LDO_EN1 LDO_EN0 Comments LDOs turned off, power applied to AVDD, DVDD, RFVDD, min/max is 2.0/2.5 V, and to VDD pin 11 and 1, min/max is 2.0/3.6V. LDOs bypassed, power applied to the VDD pin1 and VDD pin11, min/max is 2.0/2.5 V PA LDO turned on, power applied to VDD pin1 and 11, min/max is 2.0/3.6V, and to...
- Page 38 Micrel MICRF405 Pream_Len1 Pream_Len0 Comments Preamble length is 1 byte. Preamble length is 2 bytes. Preamble length is 3 bytes. Preamble length is 4 bytes. Table 36. Preamble Field Length. Sel_CRC1 Sel_CRC0 Comments CRC disabled CCITT-8 CRC enabled. Byte is sent after payload data.
- Page 39 Micrel MICRF405 MOD_F Comments Programmable smoothing filter after attenuator. This can be programmed in four steps, and will produce 0..3 reasonable results for the highest bit rates. Table 42. Modulator Filter Setting. FSKn Comments 0..5 The bit rate clock is set by dividing the crystal oscillator frequency by FSKClk_K*2^(3+FSKn).
- Page 40 Micrel MICRF405 OutS2 OutS1 OutS0 The signals are available on the LD output N-div M-div ModOut Bandgap DVDD TXSYMBOL – output of packet handling engine Table 50. Test Signals. Only Available When LD_en=0. PA_IB3 PA_IB2 State PA uses bias current from PTAT bias source, external resistor (Pin 6)
- Page 41 Micrel MICRF405 LF_RES1<4:0> LF_RES3<4:0> R1 (kΩ) R3 (kΩ) 24.1 34.3 12.3 44.5 18.7 54.7 25.1 64.9 31.5 75.1 37.9 85.3 44.3 95.5 50.7 105.7 57.1 115.9 63.5 126.1 69.9 136.3 76.3 146.5 82.7 156.7 89.1 166.9 95.5 177.1 101.9 187.3 108.3...
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Page 42: Typical Application Circuit
Micrel MICRF405 Typical Application Circuit Figure 16. Typical Application Circuit Bill of Materials FSK/ASK 915MHz Item Part Value Description Manufacturer Part Number See Table 17 See Table 17 Capacitor, 0603, ±0.25pF, COG, 50V, -55,+125°C Kyocera CM105CG3R3C50A 100pF Capacitor, 0603, ±5%, COG, 50V, -55,+85°C... - Page 43 Micrel MICRF405 FSK/ASK 868MHz Item Part Value Description Manufacturer Part Number See Table 17 See Table 17 Capacitor, 0603, ±0.25pF, COG, 50V, -55,+125°C Kyocera CM105CG3R9C50A 15pF Capacitor, 0603, ±5%, COG, 50V, -55,+85°C Kyocera CM105CG150J50A Capacitor, 0603, ±0,5pF, COG, 50V, -55,+125°C...
- Page 44 Micrel MICRF405 FSK/ASK 315MHz Item Part Value Description Manufacturer Part Number See Table 17 See Table 17 Capacitor, 0603, ±5%, COG, 50V, -55,+125°C Kyocera CM105CG100J50A 100pF Capacitor, 0603, ±5%, COG, 50V, -55,+85°C Kyocera CM105CG101J50A Capacitor, 0603, ±5%, COG, 50V, -55,+125°C...
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Page 45: Package Information
Micrel MICRF405 Package Information ® 24-Lead MLF (ML) ® 4 4x4mm Land pattern 0.50 0.30 0.70 3.90 3.90 2.55 2.55 April 2006 M9999-041906 (408) 955-1690... - Page 46 (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
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