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1
+3V3_POT
C1
J1
225
10
TO RP
GND_POT
9
8
A
7
POT_BANK4
6
5
POT_SEL0
4
3
GND
POT_SEL1
2
1
0.5S-1X-10PWB
GND_POT
+5V_UNREG
C4
J4
105
GND
30
TO RP
29
28
27
26
25
24
B
23
MIDI_RX
22
21
MIDI_TX
20
19
FOOTSWITCH
18
17
USB_CONNECT
16
CHECK_POWER
15
EXT_PSU
14
VBUS_SENSE
13
EXT_CHARGER
12
11
KBD_CLK
10
9
TO_KBD
8
7
FROM_KBD
6
5
KBD_RESET#
4
KBD_BOOT1
3
KBD_BOOT0
2
1
0.5S-1X-30PWB
C
GND
+3.3V1 +3.3V2 +3.3V3 +3.3V4
+3V3
GND1 GND2 GND3 G ND4
GND
+3.3V P1
+3.3V P2
+3.3V P3
+3.3V P4
+3V3_POT
GND P1
GND P2 GND P3
GND P4
D
+5V1+5V2
+5V_UNREG
GND_POT
Place Test Points Strategically
1
2
U_mcu
C2
mcu.Sch
104(No Stuff)
GND_POT
J3
1
+3V3
USB_N
TO RP
2
C5
USB_P
3
4
105
GND
CON4
GND
2
3
4
C3
GND
225
SR_CLK0
SR_CLK0
SR_STROBE0
SR_STROBE0
LED_OE#
LED_OE#
LED_DO
LED_DO
SW_DI
USB_N
SW_DI
USB_P
SR_CLK1
SR_CLK1
SR_STROBE1
SR_STROBE1
FOOTSWITCH
MIDI_RX
MIDI_TX
GND_POT
USB_CONNECT
PAD_SEL
CHECK_POWER
PAD_SEL
EXT_PSU
PAD_BANK0
VBUS_SENSE
PAD_BANK0
EXT_CHARGER
PAD_BANK1
PAD_BANK1
KBD_CLK
PAD_BANK2
PAD_BANK2
TO_KBD
PAD_BANK3
PAD_BANK3
FROM_KBD
KBD_RESET#
KBD_BOOT1
KBD_BOOT0
GND_POT
POT_SEL0
POT_SEL0
POT_SEL1
POT_SEL1
POT_BANK0
POT_BANK0
POT_BANK1
POT_BANK1
POT_BANK2
POT_BANK2
POT_BANK3
POT_BANK3
POT_BANK4
POT_BANK4
3
4
5
+3V3
J2
1
2
3
4
5
6
7
8
9
TO TLU
10
11
12
13
14
15
16
17
18
19
20
GND
0.5S-1X-20PWB
+3V3_POT
C6
J5
225
1
2
3
4
5
6
TO TLU
7
8
(Pass Through to TLL)
9
10
11
12
13
14
15
16
17
18
19
20
GND_POT
0.5S-1X-20PWB
+3V3_POT
C7
J6
1
225
2
3
4
5
6
TO TR
7
8
9
10
11
12
13
14
15
16
17
18
19
20
0.5S-1X-20PWB
Title: lqvhmn_top_level.sch
GND_POT
Size: B
Date: 2019/5/22
Project State: ProjectState
5
6
BOLT4
BOLT3
BOLT
BOLT
BOLT1
BOLT2
BOLT
BOLT
ProjectCode
Revision: PCBRev
Purpose: MainFunction
Reviewed: Reviewed
Location: PCBLocationInSystem
Sheet 1 of 2
6
A
B
C
D
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