Table of Contents
Advertisement
A0-A19
+5V
LED DRIVER
MAIN MICROPROCESSOR
PO0
PO1
U15
PO2
PO3
PO4
PO5
LPTT
DS1
DISPLAY DRIVER
A
DMARQ0
B
DMAAKO
U26
C
TC0
D
DMARQ1
BALANCED Rx/Tx
IRDB-
DE
INT POLL
U24
D
TxD1
RIDB+
R
RxD1
SWITCH TxD
TxD0
SWITCH RxD
RxD0
READ
U6A
U20C
R/W
MREQ
WRITE
U6B
PT2
MREQ
INTP0 INTP1 MSTB
READ
WRITE
MSTB
UART
RD
RxRDY
TxE
D0-D7
D0-D7
U22
J1
MODEM DCD 4
U16F
COMPUTER Tx 2
U16D
RxD
COMPUTER Rx 3
U16C
TxD
MPC
PROGRAMMING PORT
1
U2
CLOCK
BAUD RATE
J3
CP
Y3
76800
2
1
38400
3
4
19200
U21
6
5
TxC
9600
8
7
4800
10
9
RxC
2400
12
11
1200
14
13
RESET
U32B
OE
Y0-Y3
U31
U30
U2F
OE
U32A
Y0-Y3
6-45
ADDRESS BUS (19:0)
FLASH MEMORY
A0-A19
A0-A16
READY
U11
Q2/Q3
U30A/U31A
U27
T OUT
U25
DQ0-DQ7
FLASH
Vpp
EPROM
+5V
OE
WE
Vpp
CE
RESET
D0-D7
RST1
U17
X1
RESET
RES IN
Y1
S1
10 MHz
RST2
X2
PT1
PT0
PO6
READY
T OUT
WR
TX FIFO
MR
D0-D7
DOR
CS
RST
RST P1-1 P3-7 P3-6
D0-D7
DE
U16B
P1-3
HSDB -
B
U23
HSDB +
A
DE
P3-1
R
U2F/U31B
P3-0
HIGH-SPEED DATA BUS
MICROPROCESSOR
August 2000
Part No. 001-2001-200
EPROM
A0-A14
E
U18
W
D0-D7
G
DATA BUS (7:0)
O0
A16
A
O11
A17
B
A18
U5
C
A19
D
O14
U20B
U20A
O15
O13
G2B
A13
A
A14
B
A15
C
U4
Y1
Y2
Y0
U20D
U6C
PROCESSOR TO PROCESSOR COMMUNICATION FIFOs
DIR
S1
DOR
ADDRESS BUS (7:0)
A0-A7
A0-A7
U9
DE
MR
DIR
SO
U2B
U6D
U7B
ADDRESS
RAM
SELECT
Y2
Y1
OE
WE
A13
P1-0
A
A8-A12
U1
A14
U3
P1-2
B
A0-A7
U13
A15
A8-A15
C
Y0
*
CS1
D0-D7
PSEN
ALE
ADDRESS/DATA BUS (8:15)
MAIN PROCESSOR CARD BLOCK DIAGRAM
FIGURE 6-17
RAM
A0-A12
D0-D7
U28
CE
DE
WE
READ
WRITE
U2C
U7A
SO
DE
U10
S1
U2A
LOWER
EEPROM
ADDRESS LATCH
A8-A13
A0-A7
A0-A7
D0-D7
U14
U8
D0-D7
OE
CEN
ADDRESS BUS (7:0)
FOLDOUT
Advertisement
Table of Contents
