Vpc3230D; General Description; Pin Connections And Short Descriptions - Hitachi 22LD4500UK Service Manual

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11.9. VPC3230D

11.9.1. General Description

The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60-Hz
and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as
DDP 331x) and/or it can be used with 3rd-party products.
The main features of the VPC 323xD are
• high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking
• multi-standard colour decoder PAL/NTSC/SECAM including all substandards
• four CVBS, one S-VHS input, one CVBS output
• two RGB/YC
C
component inputs, one Fast Blank (FB) input
r
b
• integrated high-quality A/D converters and associated clamp and AGC circuits
• multi-standard sync processing
• linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling 'Panorama-vision'
• PAL+ preprocessing
• line-locked clock, data and sync, or 656-output interface
• peaking, contrast, brightness, color saturation and tint for RGB/ YC
• high-quality soft mixer controlled by Fast Blank
• PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution
• 15 predefined PIP display configurations and expert mode (fully programmable)
• control interface for external field memory
2
• I
C-bus interface
• one 20.25-MHz crystal, few external components
• 80-pin PQFP package

11.9.2. Pin Connections and Short Descriptions

NC = not connected
LV = if not used, leave vacant
X = obligatory; connect as described in circuit diagram
SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V
Pin No.
Pin Name
PQFP
80-pin
1
B1/CB1IN
2
G1/Y1IN
3
R1/CR1IN
4
B2/CB2IN
5
G2/Y2IN
6
R2/CR2IN
7
ASGF
8
FFRSTWIN
9
V
SUPCAP
10
V
SUPD
11
GND
D
12
GND
CAP
13
SCL
14
SDA
15
RESQ
16
TEST
17
VGAV
18
YCOEQ
19
FFIE
20
FFWE
21
FFRSTW
22
FFRE
23
FFOE
24
CLK20
25
GND
PA
26
V
SUPPA
27
LLC2
28
LLC1
29
V
SUPLLC
Type
Connection
(if not used)
IN
VREF
IN
VREF
IN
VREF
IN
VREF
IN
VREF
IN
VREF
X
IN
LV or GND
OUT
X
SUPPLYD
X
SUPPLYD
X
OUT
X
IN/OUT
X
IN/OUT
X
IN
X
IN
GND
D
IN
GND
D
IN
GND
D
OUT
LV
OUT
LV
OUT
LV
OUT
LV
OUT
LV
IN/OUT
LV
OUT
X
OUT
X
OUT
LV
IN/OUT
LV
SUPPLYD
X
C
r
Short Description
Blue1/Cb1 Analog Component Input
Green1/Y1 Analog Component Input
Read1/Cr1 Analog Component Input
Blue2/Cb2 Analog Component Input
Green2/Y2 Analog Component Input
Read2/Cr2 Analog Component Input
Analog Shield GND
FIFO Reset Write Input
D
Digital Decoupling Circuitry Supply Voltage
Supply Voltage, Digital Circuitry
Ground, Digital Circuitry
Digital Decoupling Circuitry GND
2
I
C Bus Clock
2
I
C Bus Data
Reset Input, Active Low
Test Pin, connect to GND
VGAV Input
Y/C Output Enable Input, Active Low
FIFO Input Enable
FIFO Write Enable
FIFO Reset Write/Read
FIFO Read Enable
FIFO Output Enable
Main Clock output 20.25 MHz
Pad Decoupling Circuitry GND
Pad Decoupling Circuitry Supply Voltage
Double Clock Output
Clock Output
Supply Voltage, LLC Circuitry
11
and CVBS/ S-VHS
b
F
D

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