1. Manuals
  2. Brands
  3. GOWIN Manuals
  4. Cables and connectors
  5. USB 2.0 SoftPHY IP
  6. User manual

GOWIN USB 2.0 SoftPHY IP User Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
Gowin USB 2.0 SoftPHY IP
User Guide
IPUG781-1.5.1E, 07/20/2022

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the USB 2.0 SoftPHY IP and is the answer not in the manual?

Questions and answers

Related Manuals for GOWIN USB 2.0 SoftPHY IP

Summary of Contents for GOWIN USB 2.0 SoftPHY IP

  • Page 1 Gowin USB 2.0 SoftPHY IP User Guide IPUG781-1.5.1E, 07/20/2022...
  • Page 2 Copyright © 2022 Guangdong Gowin Semiconductor Corporation. All Rights Reserved. is a trademark of Guangdong Gowin Semiconductor Corporation and is registered in China, the U.S. Patent and Trademark Office, and other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders.
  • Page 3 Revision History Date Version Description 07/23/2021 1.0E Initial version published. 08/13/2021 1.1E The property configuration of IO ports modified. Chapter 2.3 "Using 5V Host Supply to Power USB Device Solution" 10/12/2021 1.2E added.  The configuration method of peripheral circuit modified. 12/23/2021 1.3E ...

  • Page 4: Table Of Contents

    Contents Contents Contents ....................... i List of Figures ..................... ii List of Tables...................... iii 1 About This Guide .................... 1 1.1 Purpose ..........................1 1.2 Related Documents ......................1 1.3 Terminology and Abbreviations ................... 1 1.4 Support and Feedback ....................... 2 2 Introduction .....................

  • Page 5: List Of Figures

    Figure 3-2 USB Slave Device Interface Implementation ..............7 Figure 3-3 GW1NSR-4 Pinout ......................8 Figure 5-1 IP Core Generator ......................11 Figure 5-2 Open USB 2.0 SoftPHY IP Core ..................12 Figure 5-3 USB 2.0 SoftPHY IP Configuration Interface ..............12 IPUG781-1.5.1E...
  • Page 6 List of Tables List of Tables Table 1-1 Terminology and Abbreviations ..................2 Table 2-1 Gowin USB 2.0 SoftPHY IP Overview ................3 Table 2-2 DC Electrical Characteristics ..................... 4 Table 2-3 Resource Utilization (І) ....................... 5 Table 2-4 Resource Utilization (Ⅱ) ....................5 Table 4-1 Signal Description ......................

  • Page 7: About This Guide

    1.1 Purpose About This Guide 1.1 Purpose The purpose of Gowin USB 2.0 SoftPHY IP User Guide is to help you learn the features and usage of this IP by providing the descriptions of functions, signals, and interface configuration. 1.2 Related Documents The latest user guides are available on the GOWINSEMI Website.

  • Page 8: Terminology And Abbreviations

    Low Speed NRZI Non Return Zero Inverted 1.4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly by the following ways. Website: www.gowinsemi.com E-mail: support@gowinsemi.com...

  • Page 9: Introduction

    Design Files Verilog (encrypted) Reference Design Verilog TestBench Verilog Test and Design Flow Synthesis Software GowinSynthesis Application Software Gowin Software (V1.9.8.05 and above) Note! [1] Only part number with speed grade C7 and above support USB 2.0 SoftPHY IP IPUG781-1.5.1E 3(12)

  • Page 10: Features

    2 Introduction 2.2 Features 2.2 Features The features of GowinUSB 2.0 SoftPHY IP include:  Supports HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps).  Supports data serial and parallel conversion.  Supports bit stuffer and unstuffer.  Supports NRZI encoder and decoder. ...

  • Page 11: Resource Utilization

    CCSL Device 2.4 Resource Utilization Gowin USB 2.0 SoftPHY IP can be implemented by Verilog. Its resource utilization may vary when the design is employed in different devices, or at different densities, speeds, or grades. Taking Gowin GW1NSR-4 and GW2AR-18 series of FPGA ptoducts as an instance, the resource utilization is as shown in Table 2-3 and Table 2-4.

  • Page 12: Functional Description

    3 Functional Description 3.1 USB 2.0 SoftPHY Block Diagram Functional Description 3.1 USB 2.0 SoftPHY Block Diagram In the RX, after USB serial data goes through IDES8, NRZI decoder, bit unstuffer, shift Reg modules in turn, USB RX data is received, and then the data transmits to the upper module through UTMI interface.

  • Page 13: Usb 2.0 Softphy External Circuit Connection

    Figure 3-2 USB Slave Device Interface Implementation R1:1.5K ohm R2:0 ohm R3:0 ohm R4:42 ohm R5:42 ohm R6:1.8K ohm R7: 75 ohm(1N Series)，56 ohm(2A Series) C1:1uF Gowin FPGA usb_pullup_en_o usb_term_dp_o R2 R3 usb_term_dn_o Data+ Data- usb_dxp_io 90ohm...

  • Page 14: Figure 3-3 Gw1Nsr-4 Pinout

    Figure 3-3 pair is located at G5, H5 (i.e. IOR11A/IOR11B) in the diagram, it will cause the project to report an error when implementing synthesis and placement with Gowin Software, as the adjacent differential pair pins IOR10A/IOR10B do not exist. If usb_dxp_io differential pair is located at G6/H6 (i.e.

  • Page 15: Signal Description

    4 Signal Description Signal Description A description of Gowin USB 2.0 SoftPHY IP signals is as shown in Table 4-1. Table 4-1 Signal Description Signal Name Data Width Description clk_i Input clock signal (60MHz) fclk_i Input clock signal (480MHz) Asynchronous reset signal resets rst_i the state machine inside of PHY.
  • Page 16 4 Signal Description Signal Name Data Width Description Line status of receive end: DM DP 2’b00：SE0 2’b01："J" utmi_linestate_o 2’b10："K" 2’b11：SE1 Operation mode selection signal: 2’b00: Normal 2’b01: No driver utmi_opmode_i 2’b10: Disable bit stuffing and NRZI encoding 2’B11: Reserved Transfer mode selection signal: 2’b00: HS Transfer 2’b01: FS Transfer utmi_xcvrselect_i...

  • Page 17: Interface Configuration

    5 Interface Configuration Interface Configuration Selecting "Tools > IP Core Generator" in Gowin Software, you call and configure USB 2.0 SoftPHY. 1. Open IP Core Generator After creating the project, you can click the "Tools" tab in the upper left, select and open the IP Core Generator via the drop-down list, as shown in Figure 5-1.

  • Page 18: Figure 5-2 Open Usb 2.0 Softphy Ip Core

    Figure 5-2 Open USB 2.0 SoftPHY IP Core 3. USB 2.0 SoftPHY IP Core Configuration Interface Figure 5-3 shows the USB 2.0 SoftPHY IP core configuration interface. The ports diagram is on the left of the configuration interface. Options are on the right.

Table of Contents