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4.3.1 Multiplexer
The multiplexer
connects
one of four signals to the buffer
amplifier:
Signal,
zero,
reference,
ohms
reference.
The
multiplexer,
shown
in Figure 4-2, is made up of 4 JFETS
which
are controlled
by the microprocessor
through
U114.
The FETs are driven by U109 and part of U106. The drivers
convert
the digital
signals of the microprocessor
to signals
usable by the FETs.
a110
l
INPUT FROM
MULTIPLEXER
CONVERTER
+
OUTPUT TO
OHMS
a112
BUFFER
Figure
4-3. Simplified
Schematic
of the Input
Buffer
REFERNECE
AMPLIFIER
Amplifier
-4)
4.3.3 -2V Reference
Source
The Model 175 voltage
and current measurements
are based
on comparing
the
unknown
signal
with
an internal
-2V
reference
voltage.
During
each
measurement
cycle
the
0113
microprocessor
samples the unknown
and uses it along with
REFERENCE
a zero measurement
and -2V signal measurement
to compute
the unknown
voltage.
._. _
FROl
Figure
4-2. Simplified
Schematic
of the Multiplexer
Ordinarily;
FET switching
creates transients
which could be
seen in the final measurement.
These effects are minimized
in
the Model 175 through
the use of software
generated
delays
and by shorting
the multiplexer
bus to signal common
before
each signal measurement
through
Cllll.
4.3.2 Input
Buffer
Amplifier
The input
buffer amplifier
provides
the necessan/
isolation
between
the
input
signal
and
the
AID
converter.
The
amplifier
is a noninverting,
low noise, high impedance
circuit
with xl or x10 gain. The amplifier
gain is controlled
by the
microprocessor
and is range and function
dependent.
Figure
4-3 shows
the
simplified
schematic
of the
input
buffer
amplifier.
The -2V reference
is made up of a highly stable zener diode
WRlOl).
an op-amp and a resistive voltage divider.
U103 and
R120 A, B, C act as a constant
current source to minimize the
zener voltage
variations.
Fill7
C, D is then used to divide
down the -6.35V zener voltage
to -2V.
The output
of U103 (-7V) is used as a reference
voltage
for
the A/D converter
and as a negative
supply for various com-
ponents.
4.3.4 AID
Converter
The
Model
175 uses a combination
constant
frequency
charge
balance,
single slope analog-to-digital
converter.
A
simplified
schematic
of the A/D
used in the Model
175 is
shown
in Figure 4-4 with an associated
output
waveform.
4-2
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