Ic Block Diagrams - Sony HCD-C900 Service Manual

HCD-C700/C900
5-31.

IC BLOCK DIAGRAMS

IC102 IMIC6001BT-D (DVD BOARD) IC606
XSEL
MODE0
MODE1
DGND
DVDD
DOSEL0
DOSEL1
CKSEL0
CKSEL1
XMODE
IC608 PCM1748 (DVD BOARD)
System Clock
BCK
1 Serial
Input
DATA 2
I/F 8x Oversampling Digital Filter
LRCK 3
with Function Controller
DGND 4
Power
VDD 5
Supply Enhanced Multi-Level
VCC 6 Deita-Sigma Modurator
DAC DAC
Output Amp and Output Amp and
LOUT 7
Low-Pass Filter Low-Pass Filter
ROUT 8
LC89056W (DVD BOARD)
36 35 34 33 32 31 30 29 28 27 26
CE 37 C BIT
DETECT
CL 38
SAMPLING
FREQUENCY
MICROCOMPUTER
INTERFACE
39 LOCK CLOCK
DETECT
40 MODE
SELECT
41
42
43
44
DATA
TIMING
45 DEMODULATOR
46
47
SYSTEM
PLL
48
INPUT
RESET
CIRCUIT
1 2 3 4 5 6 7 8 9 10
System Clock
16 MCLK
Manager
Function
15 LAT
Control
14 CLK
I/F
13 DATA
12 DZFL
Zero Detect
11
DZFR
10 VCOM
AGND
9
IC802 MSM9202-05GS-KDR1 (FP-1089 BOARD)
25
24 AUDIO
PA/PB
DETECT
23 EMPHA
P1 1
Port
Driver
P2 2
22 XIN
21 XOUT
20 XMCK
19 DVDD
18 DGND
17 XSTATE
16 DATAO
15 LRCK
14 BCK
AD2 3
AD
13 CKOUT
AD1 4 Driver
S1 5
Segment
Driver
S28 32
11 12
IC600 MC14052BDR2 (I/O BOARD)
64 64
Timing Timing
Generator 2 Generator 1
Duty
Control
Digit 8bit
Control
Shift
Register
Control
Circuit
Command
Decoder
Read Write
Oscillator
Address Address
Counter Counter
Address
Selector
ADROM
16wX2b
Grid
CGROM
Driver
8wX35b
CGROM DCROM
248wX35b
16wX8b
IC604 BU1924F-E2 (I/O BOARD)
16
PLL
1187.5Hz
BIPHASE
DECODER
DEFFERENTIAL
DECODER
1 2
64 VDD
63 DAT
62 CLK
61 CS
60 RST
59 OSC1
58 OSC0
57 GND
56 VFL
55 G16
40 G1
39 S35
33 S29
15 14 13 12 11 10 9
CLOCK TEST
PLL 57kHz
RDS/ARI
COMPARATOR
8th SWITCHED
CAPACITOR
FILTER
ANTI-ALIASING
FILTER
3 4 5 6 7 8