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Related Manuals for NuDAQ ACL-7120A
Summary of Contents for NuDAQ ACL-7120A
- Page 1 ® NuDAQ ACL-7120A Digital I/O & Timer/Counter Card User’s Guide...
- Page 3 Trademarks NuDAQ, ACL-7120A is registered trademarks of ADLINK TECHNOLOGY INC. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective...
- Page 4 Getting Service from ADLINK Customer Satisfaction is top priority for ADLINK TECHNOLOGY INC. If you need any help or service, please contact us. ADLINK TECHNOLOGY INC. Web Site http://www.adlinktech.com Sales & Service Service@adlinktech.com +886-2-82265877 +886-2-82265717 Address 9F, No. 166, Jian Yi Road, Chungho City, Taipei, 235 Taiwan Please email or FAX your detailed information for prompt, satisfactory, and consistent service.
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Page 5: Table Of Contents
Jumper and DIP Switch Description........10 Base Address Setting.............. 11 Interrupt Settings ..............13 Clock Frequency Settings ............15 ACL-7120A Software Library Installation ........ 16 Chapter 3 Signal Connections......... 17 Connector Pin Assignment............17 Timer/counter signal pads ............21 Interrupt Trigger Source ............22 Clock Source Pads.............. - Page 6 How to Use This Guide This manual is designed to assist users in understanding the ACL-7120A and describes how to modify settings to meet specific application requirements. Chapter 1 Introduction Overview of product features, applications, and specifications. Chapter 2 Installation Describes install procedures, layout, DIP switch settings, and jumper settings.
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Page 7: Chapter 1 Introduction
Introduction The ACL-7120A digital I/O and counter/timer card consists of 32 digital input, 32 digital output, and 4 timer/counter channels. All digital input/output channels are TTL/DTL compatible. The most outstanding feature of the ACL- 7120A is that it is fully hardware and software compatible with both the ADLINK ACL-7120 and Advantech PCL-720 cards. -
Page 8: Features
Features • Fully compatible with ADLINK ACL-7120 and Advantech PCL-720 • 32 TTL digital input channels • 32 TTL digital output channels • High output driving and low input loading • 3 independent programmable 16-bit down counter • One 32-bit timer (two 16-bit counter cascaded together) with a 4MHz time base •... -
Page 9: Specifications
Driving Capacity: All inputs and outputs are TTL/DTL compatible. Outputs will drive 1 standard TTL load (74 series) or 4 LSTTL (74LS) loads • Input hysteresis: Typical 0.4V, Min. 0.2V ♦ Programmable Counter: • Frequency: 4MHz • Counter: Device Number of counters ACL-7120A/3 ACL-7120A/6 Introduction • 3... - Page 10 • Mode: 6 programmable modes • Usable pins: Device Usable pins ACL-7120A/3 CLK and GATE for counter 0 - counter 2 ACL-7120A/6 CLK and GATE for counter 0 - counter 3 • counter usage : Device Counter usage ACL-7120A/3 Counters 0 - 2 are customizable...
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Page 11: Software Support
Software Support The ACL-7120A is programmable using simple 8-bit I/O port commands. Users can use high-level languages, such as BASIC, C, or PASCAL, or low- level language, such as assembly to program the board. To program under Windows or LabView, please contact an ADLINK dealer for information on the ACLS-DLL1 and ACLD-LVIEW. -
Page 13: Chapter 2 Installation
Installation This chapter describes how to install the ACL-7120A. Please carefully review the unpacking information before removing the product. The jumper and switch settings for the ACL-7120A base address, clock sources, interrupt IRQ level, and IRQ trigger sources are specified below. -
Page 14: Unpacking
Unpacking Your ACL-7120A card contains sensitive electronic components that can be easily damaged by static electricity. Prepare a grounded anti-static mat. The operator should be wearing an anti- static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to the module. -
Page 15: Acl-7120A Layout
ACL-7120A Layout ● ●●●●●●●●●●●●●●●●●●●●●●●●●●●●●● ● ● ●●●●●●●●●●●●●●●●●●●●●●●●●●●●●● ● ● ●●●●●●●●●●●●●●●●●●●●●●●●●●●●●● ● ● ●●●●●●●●●●●●●●●●●●●●●●●●●●●●●● ● ● ●●●●●●●●●●●●●●●●●●●●●●●●●●●●●● ● Figure 2.1 7120A Layout Installation • 9... -
Page 16: Jumper And Dip Switch Description
Jumper and DIP Switch Description The ACL-7120A channels and base addresses can be changed through jumper settings and DIP switches on the card. The ACL-7120A is pre- configured at the factory and should not need to be changed under normal circumstances. -
Page 17: Base Address Setting
1. The base address must be within the range 200hex to 3FFhex. 2. The base address should not conflict with any PC I/O address. The ACL-7120A default I/O port base address 0x2A0 is set by the 6 position DIP switch SW1 (refer to Figure 2.2). Possible address settings for I/O ports are from Hex 200 to Hex 3FE and are listed in Table 2.2. - Page 18 How to define the base address for the ACL-7120A? DIP1 through DIP6 in the switch SW1 are one-to-one corresponding to the PC bus address line A8 to A4. A9 is always 1 and A0~A3 are always 0. If you want to change the base address, you can only change the values of A8 to A4 (the shadowed area of the table below).
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Page 19: Interrupt Settings
Interrupt Settings To use the interrupt function, a second counter chip (CNT 1) needs to be installed on the ACL-7120A/3. The additional CNT 1 counter chip is included with the ACL-7120A/6. The ACL-7120A offers AT bus interrupt levels (IRQ3-IRQ15), and three interrupt trigger sources (timer pacer, event, and external). - Page 20 EXT IRQ EVT IRQ TME IRQ default setting :TME IRQ Figure 2.4 14 • Installation...
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Page 21: Clock Frequency Settings
Clock Frequency Settings The ACL-7120A board offers 3 frequency sources: 10kHz, 100kHz, and 1 MHz. These frequencies can be double, half or quartered by placing a jumper on position " X2," "X1/2," or "X1/4," of JP1. The default setting is “X1.”... -
Page 22: Acl-7120A Software Library Installation
Type the following command in a DOS window to change to the card directory (X indicates the CD-ROM drive): X:\>CD \NuDAQISA\7120 Execute the setup batch program to install the software: X:\NuDAQISA\7120>SETUP. After installation, all files of the ACL-7120A Library & Utility for DOS are stored in the C:\ADLINK\7120\DOS sub-directory. 16 • Installation... -
Page 23: Chapter 3 Signal Connections
Signal Connections Connector Pin Assignment The ACL-7120A comes equipped with five 20-pin insulation displacement connectors CN1-CN5. CN1 and CN2 are located at the rear plate. CN3, CN4, and CN5 are located on board. Each of these connectors can be connected to flat cables of the same type. - Page 24 CN1: Digital OUT (0-15) DO 1 DO 0 DO 3 DO 2 DO 5 DO 4 DO 7 DO 6 DO 9 DO 8 DO 11 DO 10 DO 13 DO 12 DO 15 DO 14 +12V CN 2: Digital IN (0-15) DI 1 DI 0 DI 3...
- Page 25 CN 3: Digital OUT (16 - 31) DO 17 DO 16 DO 19 DO 18 DO 21 DO 20 DO 23 DO 22 DO 25 DO 24 DO 27 DO 26 DO 29 DO 28 DO 31 DO 30 +12V CN 4: Digital IN (16 - 31) DI 17 DI 16...
- Page 26 CN 5: COUNTER CLK 1 CLK 2 OUT 1 OUT 2 GATE 1 GATE 2 CLK 0 EVENT OUT 0 GATE 3 GATE 0 GATE 4 EXT IRQ 20 • Signal Connections...
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Page 27: Timer/Counter Signal Pads
GATE2 CN5 Pin-3 Figure 3.1 The internal timer/counter 8254 (Counter 0-Counter 2) on the ACL-7120A is configured as above (figure 3.1). Users can utilize the capabilities of the 8254 through CN5. CN5 also provides additional wiring to fully use the the 8254. Signal solder pads are located on the board for use with applications requiring direct access through these soldering pads (i.e. -
Page 28: Interrupt Trigger Source
Interrupt Trigger Source The second interval timer/counter 8254 chip on the ACL-7120A is used to generate sources for interrupts. The block diagram of this chip is illustrated below (figure 3.3). Counter 3 of the 8254 is used for event counting, it will accept event signals from CN5 pin-7 and its output will trigger an interrupt when the count value of Counter 3 is becomes 0. -
Page 29: Clock Source Pads
Clock Source Pads In addition to the clock signal pads, the frequency sources can also be wired through the soldering pads. The clock source links to the clock input of the 8254 timer/counter by soldering a wire between its corresponding pads. For example: If counter 1 needs a 10kHz clock input, simply solder a wire between pads "10k"... -
Page 30: Latch Digital Inputs
Latch Digital Inputs The ACL-7120A offers a handy method to latch the input status for special applications. A latched input happens when the STROBE signal (20 pin of CN2 or CN4) is keep high. The data read from the input port will always reflect the current status. -
Page 31: Chapter 4 Programming
Programming I/O Registers Format The ACL-7120A occupies 16 consecutive addresses in the PC I/O address space. Table 4.1 shows the I/O Map Address Write Read Base + 0 DO 0-7 DI 0-7 Base + 1 DO 8-15 DI 8-15 Base + 2... -
Page 32: Digital I/O Programming
Digital I/O Programming The ACL 7120A provides 32 digital input channels and 32 digital output channels. Four I/O port address (Base+0, ..., Base+3) are reserved for these digital I/O channels. The relationship between I/O address and I/O channels are specified as following: ** Digital Input Register Format: Address: BASE + 0, BASE + 1, BASE + 2, BASE + 3 Attribute: Read for digital input... - Page 33 ♦ Write operation: The digital output states are written as 1 single byte to the port at address BASE+N (N=0,1,2,3). Data is written to all 8 bits as a single byte. For example: In BASIC: 05 BASE=&H2A0 06 VALUE1% = &H3F 07 VALUE2% = &HF3 10 OUT(BASE + 0), VALUE1% ‘...
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Page 34: Programmable Interval Timer
• Digital one-shot • Motor control 4.3.2 The Control Byte The 8254 occupies 8 I/O address locations in the ACL-7120A I/O map, as shown below: Base + 4 LSB OR MSB OF COUNTER 0 Base + 5 LSB OR MSB OF COUNTER 1... - Page 35 Before loading or reading any of these individual counters, the control byte (Base + 7, Base + 11) must be loaded first. The format of control byte is: Control Byte: (Base + 7, Base + 11) • SC1 & SC1 - Select Counter (Bit7 & Bit 6) COUNTER ILLEGAL •...
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Page 36: 4.3.3 Mode Definition
4.3.3 Mode definition There are six different selectable operating modes in the 8254: Mode 0: Interrupt on terminal count The output will be initially low after the mode set operation. After the count is loaded into the selected count register, the output will remain low and the counter will begin counting. - Page 37 Mode 3: Square Wave Rate Generator. Similar to Mode 2 except that the output will remain high until one half of the count has been completed (or for even counts) and go low for the other half of the count. This is accomplished by decrementing the counter by two on the falling edge of each clock pulse.
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Page 39: Warranty Policy
Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully: Before using ADLINK’s products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form. - Page 40 Products with altered and/or damaged serial numbers. h. Other categories not protected under our guarantees. Customers are responsible for shipping costs to transport damaged products to our company or sales office. To ensure the speed and quality of product repair, please download a RMA application form from our company website: www.adlinktech.com.
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