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EN 24
7.
TPM8.2A LA
7.4
Circuit Description
7.4.1
System power
The main board power is received at connector CN701 from
power board, to receive the power and signals from the PSU.
See
Table 7-1
for the correct pining, The shown test points in
Figure
7-4.
Table 7-1 Connector CN701 overview
Item
Pin
Description
1
1
INVERTER_ON_OFF, Inverter board
control (Low: OFF, High: ON)
2
2
BRIGHT_ADJ, Inverter bright PWM
control (Max.: 0 V, Min.: 3.3 V)
3
3, 4
+12 V Supply
4
5, 6, 7
Ground
5
8, 9
+24 V Supply
6
10
STANDBY, Standby
control (High: Normal, Low: Stand by)
7
11, 12
STB_PWR5V, +5VSB Supply
8
13
LED ON
CN701
CN701
BL_CTRL
1
BRI_ADJ
2
3
4
+
+
5
C701
C701
6
330UF 35V
330UF 35V
7
8
9
10
+
+
11
C703
C703
12
330UF 35V
330UF 35V
13
CONN
CONN
R701
R701
10K 1/16W 5%
10K 1/16W 5%
+
+
C705
C705
470UF 10V
470UF 10V
Figure 7-4 System power
7.4.2
Nand flash Memory (U403)
The set uses a 128 MB NAND flash for software code
DVDD3V3
R4117
R4117
1
4K7 1/16W 5%
4K7 1/16W 5%
2
3
R4115
R4115
SMD/0402
4
4K7 1/16W 5%
4K7 1/16W 5%
5
SMD/0402
6
PARB#
7
POOE#
8
POCE1#
9
10
11
DVDD3V3
12
13
14
C4108
C4108
15
100N 16V
100N 16V
PACLE
16
PAALE
17
POWE#
18
FLASH_WP#
19
20
21
22
23
24
Figure 7-5 Nand flash Memory (U403)
7.4.3
NVM (U4103)
The system NVM is a 32 MB IC. It contains all system settings.
2011-Jun-24
Circuit Descriptions
+12V
FB701
FB701
1
2
120R/6000mA
120R/6000mA
C702
C702
100N 50V
100N 50V
+24V
FB702
FB702
1
2
120R/6000mA
120R/6000mA
C704
C704
100N 50V
100N 50V
R712
R712
8.2K 1/10W
8.2K 1/10W
ZD701
ZD701
NC/BZX84C3V6
NC/BZX84C3V6
R738
R738
NC/0R05 1/16W
NC/0R05 1/16W
5VSB
FB703
FB703
1
2
120R/6000mA
120R/6000mA
C706
C706
10U 10V
10U 10V
PWR_OK
R750
R750
0R05 1/10W
0R05 1/10W
19160_208_110622.eps
U403
U403
48
NC
NC
47
NC
NC
46
NC
NC
45
NC
NC
PDD7
44
NC
I/O7
PDD6
43
NC
I/O6
PDD5
42
R/B
I/O5
PDD4
41
RE
I/O4
DVDD3V3
40
CE
NC
39
NC
NC
38
NC
PRE
DVDD3V3
37
VCC
VCC
36
VSS
VSS
35
NC
NC
34
NC
NC
C4109
C4109
33
CLE
NC
PDD3
100N 16V
100N 16V
32
ALE
I/O3
PDD2
31
WE
I/O2
PDD1
30
WP
I/O1
PDD0
29
NC
I/O0
28
NC
NC
27
NC
NC
26
NC
NC
25
NC
NC
HY27US08281A-TPCB
HY27US08281A-TPCB
19160_211_110622.eps
C4104
C4104
220N16V
220N16V
7.4.4
Reset (U4101)
When the input voltage for the MT5301B main processor drops
below 2.93 V, a system reset will be enforced by U4101.
PSU_STBY
ORESET#
H : ON
L : Standby
C4123
C4123
OPWRSB
NC/10P 50V
NC/10P 50V
110623
7.4.5
ARC (HDMI)
ARC (audio return channel) supports HDMI A only, if it gets the
ARC command from CEC, then the U603 will be enable and
SPDIF will output via HDMI A pin 14.
ARC_OE#
SPDIF_OUT
C4110
C4110
10U 10V
10U 10V
110622
DVDD3V3
R4103
R4103
U4103
U4103
1
8
E0
VCC
2
7
E1
WC
3
6
E2
SCL
4
5
VSS
SDA
M24C32-WDW6
M24C32-WDW6
R4106
R4106
I2C address at A0
Q4101
Q4101
PMBS3904
PMBS3904
10K 1/16W 5%
10K 1/16W 5%
Figure 7-6 NVM (U4103)
3V3SB
R4139
R4139
0R05 1/16W
0R05 1/16W
1
GND
VCC
R4140
R4140
NC/5K1 1/16W 5%
NC/5K1 1/16W 5%
R4108
R4108
0R05 1/16W
0R05 1/16W
U4101
U4101
MAX809STRG
MAX809STRG
R4110
R4110
NC/100K 1/16W
NC/100K 1/16W
Figure 7-7 Reset (U4101)
DVDD3V3
U603
U603
1
5
R680
R680
OE
VCC
2
A
3
4
GND
Y
SN74LVC1G125DBVR
SN74LVC1G125DBVR
180R 1/16W 5%
180R 1/16W 5%
R681
R681
82R 1/16W 5%
82R 1/16W 5%
Figure 7-8 AV12 (U704)
R4104
R4104
R4105
R4105
OSCL0
OSDA0
2.2K 1/16W
2.2K 1/16W
MEMORY_WP#
R4109
R4109
19160_212_110622.eps
110622
3V3SB
5VSB
R4111
R4111
NC/820R 1/10W 1%
NC/820R 1/10W 1%
3
C4107
C4107
R4112
R4112
100N 16V
100N 16V
NC/1K8 1/10W 1%
NC/1K8 1/10W 1%
19160_213_110622.eps
110622
5V_SW
R690
R690
NC/1.2K 1/16W
NC/1.2K 1/16W
C657
C657
ARC_A
1UF 10V
1UF 10V
R689
R689
100K 1/16W
100K 1/16W
19160_216_110622.eps
110622
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