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EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
NVRAM
+3.5V_ST
Write Protection
- Low
: Normal Operation
R103
IC104
+3.5V_ST
- High : Write Protection
R105
4.7K
4.7K
M24M01-HRMN6TP
OPT
R104
4.7K
NC
VCC
1
8
OPT
R183
R182
E1
WP
2
7
2.7K
2.7K
E2
SCL
R136
33
3
6
VSS
SDA
R137
33
4
5
HDCP EEPROM
+3.3V_NORMAL
HDCP_EEPROM_ST
IC100
M24C16-R
C101
0.1uF
16V
NC_1
VCC
1
8
NC_2
WC
R181
4.7K
2
7
NC_3
SCL
R191
22
3
6
I2C_SCL1
VSS
SDA
R192
22
4
5
I2C_SDA1
I2C
R128
R131
R134
R139
R142
R173
1.2K
1.2K
2.7K
2.7K
2.7K
2.7K
R110
33
STB_SCL
R111
33
STB_SDA
R112
33
OPCTRL_11_SCL
R113
33
OPCTRL_10_SDA
R114
33
OSCL1
R115
33
OSDA1
R116
33
OSCL2
R117
33
OSDA2
R118
33
OSCL0
R121
33
OSDA0
R122
33
OPCTRL_1_SCL
R123
33
OPCTRL_0_SDA
Model Option
+3.3V_NORMAL
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Close to eMMC Flash
(IC8100)
EMMC_CLK
R174
10K
SCL_NVRAM
SDA_NVRAM
Boot Option
HDCP_EEPROM_MICRO
IC100-*1
24LC16B
A0
8 VCC
1
+3.3V_NORMAL
A1
7 WP
2
A2
6 SCL
3
VSS
5 SDA
4
R147
R153
R150
1K
1K
1K
OPT
OPT
LED_PWM0
LED_PWM1
OPCTRL3
R151
R148
R154
1K
1K
1K
OPT
I2C_1 : AMP, L/DIMMING,HDCP KEY
I2C_2 : T-CON
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
+3.3V_NORMAL
I2C_SCL4
I2C_SDA4
R185
R188
R156
R160
R164
R177
2.7K
2.7K
2.7K
2.7K
2.7K
2.7K
I2C_SCL1
I2C_SDA1
I2C_SCL2
I2C_SDA2
I2C_SCL3
I2C_SDA3
I2C_SCL4
TS_S_OUT_CLK
I2C_SDA4
I2C_SCL5
I2C_SDA5
I2C_SCL6
I2C_SDA6
MT5369_MCLKI
SoC
NO_FRC
internal
FRC
MODEL_OPT_0
0
0
MODEL_OPT_1
0
1
MODEL_OPT_0
MODEL_OPT_1
HIGH
MODEL_OPT_2
MODEL_OPT_2
FHD
MODEL_OPT_3
MODEL_OPT_3
OPTIC
/S2_RESET
MODEL_OPT_4
MODEL_OPT_4
3D DEPTH
3D_Depth_IC
MODEL_OPT_5
DDR
DDR_768MB
MODEL_OPT_5
MODEL_OPT_6
MODEL_OPT_6
CP BOX
Enable
MODEL_OPT_7
MODEL_OPT_8
MODEL_OPT_7
T2 Tuner
Support
MODEL_OPT_9
MODEL_OPT_8
S Tuner
Support
MODEL_OPT_10
MODEL_OPT_9
Reserved
MODEL_OPT_10
EPI
Support
MODEL OPTION 8 is just for CP Box
It should not be appiled at MP
X-TAL(27Mhz)
X100
27MHz
X-TAL_1
GND_2
MT5369_XTAL_IN
1
4
C113
GND_1
X-TAL_2
1.0pF
2
3
MT5369_XTAL_OUT
C115
50V DVB_1pF
1.0pF
50V
C113-*1
C115-*1
2.7pF
DVB_1pF
2.7pF
50V
50V
ATSC_2.7pF
ATSC_2.7pF
STRAPPING
LED_PWM0
LED_PWM1
OPCTRL3
ICE mode + 27M + Serial boot
0
0
0
ICE mode + 27M + ROM to Nand boot
0
0
1
ICE mode + 27M + Rom to eMMC boot
0
1
0
from eMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC boot
0
1
1
from SDIO pins
MT5369_MCLKI_SW
TS_S_OUT_VAL
TS_S_OUT_SYNC
TS_S_OUT_DATA
SOC -> Pro:Idiom or CI SLOT
MT5369_MIVAL_ERR
MT5369_MISTRT
MT5369_TS_OUT[0-7]
+3.3V_NORMAL
R1028
IC106
10K
NLASB3157DFT2G
TCLK_SEL
B1
SELECT
+3.3V_NORMAL
1
6
GND
VCC
2
5
CI_DATA[0-7]
C121
B0
A
0.1uF
3
4
MT5369_MCLKI_SW
CHINA
IC105-*1
LGE2112-AL
AC1
C19
DDRV_44
ARDQM0
AC2
C21
DDRV_45
ARDQS0
A3
B21
DDRV_1
ARDQS0
A4
C23
DDRV_2
ARDQ0
B4
B17
DDRV_5
ARDQ1
LG FRC2
Reserved
C4
D23
DDRV_8
ARDQ2
D4
C17
DDRV_10
ARDQ3
B3
D24
DDRV_4
ARDQ4
C3
C16
DDRV_7
ARDQ5
1
1
AC3
C24
DDRV_46
ARDQ6
AC4
D15
DDRV_47
ARDQ7
0
1
G10
D21
MEMTP
ARDQM1
G9
B20
MEMTN
ARDQS1
C20
ARDQS1
G13
A17
RVREF_B
ARDQ8
G21
A23
RVREF_A
ARDQ9
D17
ARDQ10
B23
ARDQ11
F10
D20
ARCKE
ARDQ12
D22
LOW
ARDQ13
D9
D19
ARCLK1
ARDQ14
C9
C22
ARCLK1
ARDQ15
HD
A20
A7
A21
ARCLK0
ARDQM2
B9
ARCLK0
ARDQS2
A9
NON_OPTIC
ARDQS2
E18
C12
ARODT
ARDQ16
F17
D6
ARRAS
ARDQ17
E17
B12
NON_3D_Depth_IC
ARCAS
ARDQ18
E16
C5
ARCS
ARDQ19
D14
C13
ARWE
ARDQ20
A5
DDR_Default
ARDQ21
B14
A12
ARRESET
ARDQ22
B5
ARDQ23
A13
Disable
ARBA0
G11
E10
ARBA1
ARDQM3
D16
C8
ARBA2
ARDQS3
D8
ARDQS3
Not Support
F18
C6
ARCSX
ARDQ24
D10
ARDQ25
C15
D7
ARA14
ARDQ26
A15
C11
Not Support
ARA13
ARDQ27
F13
C7
ARA12
ARDQ28
C14
C10
ARA11
ARDQ29
F11
B7
ARA10
ARDQ30
E15
B10
Default
ARA9
ARDQ31
D13
ARA8
B15
ARA7
E14
N14
Not Support
ARA6
AVDD33_MEMPLL
F16
N15
E13
ARA5
AVSS33_MEMPLL
ARA4
B13
ARA3
A14
R1
ARA2
DVSS_50
F14
P21
ARA1
DVSS_48
F15
ARA0
+3.3V_NORMAL
LGE2112
AP14
JTCK
AM14
JTDI
AR14
JTDO
AR15
JTMS
R144
10K
AN14
JTRST
AP12
OSDA0
OSDA0
AN12
OSCL0
OSCL0
AP15
OSDA1
OSDA1
AN15
OSCL1
OSCL1
AT34
MT5369_XTAL_IN
XTALI
AU34
MT5369_XTAL_OUT
XTALO
AVDD_33SB
AK27
AVDD33_XTAL_STB
AH26
C116
AVSS33_XTAL_STB
0.1uF
AVDD_33SB
AK18
AVDD33_VGA_STB
C117
AK17
AVSS33_VGA_STB
0.1uF
VDD3V3
AK23
AVDD33_PLLGP
C118
AM27
AVSS33_PLLGP
0.1uF
AJ20
AVDD10_LDO
C107
C108
2.2uF
2.2uF
10V
10V
CI_ADDR[0-14]
Place Close to MTK5369(IC105)
CI_ADDR[0]
H32
GPIO0
CI_ADDR[1]
F37
R1021
22
GPIO1
CI_ADDR[2]
F36
R1034
22
GPIO2
CI_ADDR[3]
G37
R1035
GPIO3
22
CI_ADDR[4]
G36
R1036
22
GPIO4
CI_ADDR[5]
G35
GPIO5
CI_ADDR[6]
G34
GPIO6
CI_ADDR[7]
H34
GPIO7
CI_ADDR[8]
L34
GPIO8
CI_ADDR[9]
L32
GPIO9
CI_ADDR[10]
K33
GPIO10
CI_ADDR[11]
K32
GPIO11
CI_ADDR[12]
H33
GPIO12
CI_ADDR[13]
L35
GPIO13
CI_ADDR[14]
K36
GPIO14
J32
GPIO15
J34
GPIO16
K34
GPIO17
MT5369_TS_OUT[0]
K35
GPIO18
MT5369_TS_OUT[1]
K37
GPIO19
MT5369_TS_OUT[2]
J36
GPIO20
MT5369_TS_OUT[3]
J37
GPIO21
MT5369_TS_OUT[4]
J35
GPIO22
MT5369_TS_OUT[5]
J33
GPIO23
MT5369_TS_OUT[6]
G33
GPIO24
MT5369_TS_OUT[7]
H35
GPIO25
CI_DATA[0]
H31
GPIO26
CI_DATA[1]
F34
GPIO27
CI_DATA[2]
E36
GPIO28
CI_DATA[3]
N33
GPIO29
CI_DATA[4]
P32
GPIO30
CI_DATA[5]
M35
GPIO31
CI_DATA[6]
M37
GPIO32
CI_DATA[7]
M33
GPIO33
F35
MT5369_TS_IN[0]
GPIO34
E35
MT5369_TS_IN[1]
GPIO35
E37
MT5369_TS_IN[2]
GPIO36
N32
CI SLOT -> SOC
MT5369_TS_IN[3]
GPIO37
M34
MT5369_TS_IN[4]
GPIO38
M36
MT5369_TS_IN[5]
GPIO39
M32
MT5369_TS_IN[6]
GPIO40
L33
MT5369_TS_IN[7]
GPIO41
E33
/USB_OCD2
GPIO42
E32
/USB_OCD1
GPIO43
F32
WARM_MODE
GPIO44
A29
USB_CTL2
GPIO45
D31
USB_CTL1
GPIO46
R165
OPT
0
C31
GYSPD
GPIO47
E30
EPI_LOCK6
GPIO48
E31
MODEL_OPT_0
GPIO49
F31
MODEL_OPT_1
GPIO50
R166
OPT
0
E29
LAN_ACT3
GPIO51
AP9
MODEL_OPT_3
GPIO52
AT9
MODEL_OPT_7
GPIO53
AR9
MODEL_OPT_5
GPIO54
SC_ID_SOC
AU9
MODEL_OPT_6
GPIO55
NON_EU
R193
10K
AN23
ADIN0_SRV
R176
10K
AN24
ADIN1_SRV
R162
AP23
10K
ADIN2_SRV
R163
10K
AR23
ADIN3_SRV
AU23
LAN1_DET
ADIN4_SRV
AT23
EXT_SPK_VOL-
ADIN5_SRV
AM24
/TU_RESET
ADIN6_SRV
AM23
MODEL_OPT_4
/S2_RESET
ADIN7_SRV
xxLP860H-ZA
MID_MAIN_1
NON_CHINA
IC105
AR18
U0TX
SOC_TX
AP18
U0RX
SOC_RX
AU16
U1RX
MTK_NEC_RX
AT16
U1TX
MTK_NEC_TX
A35
POWE
EMMC_CMD
C33
POOE
B34
EMMC_DATA[2-7]
POCE1
D33
POCE0
EMMC_DATA[7]
D29
PDD7
EMMC_DATA[6]
C30
PDD6
EMMC_DATA[5]
D30
PDD5
EMMC_DATA[4]
B31
+3.3V_NORMAL
PDD4
EMMC_DATA[3]
A31
PDD3
EMMC_DATA[2]
B32
PDD2
R157
A32
4.7K
PDD1
C32
OPT
PDD0
D32
PARB
R178
A34
4.7K
PACLE
EMMC_DATA[1]
C34
OPT
EMMC_DATA[0]
PAALE
C29
EMMC_CLK
EMMC_CLK
AM20
OPWRSB
AM22
ORESET
AU21
OIRI
SOC_RESET
D27
R159
4.7K
FSRC_WR
AT21
STB_SCL
STB_SCL
AR21
R172 22
STB_SDA
STB_SDA
T34
C114
DEMOD_RST
PCM_RST
T32
0.1uF
DEMOD_TSCLK
16V
T36
SOC <- P:I
DEMOD_TSDATA0
U36
DEMOD_TSDATA1
TS_S_IN_0_CLK
T33
DEMOD_TSDATA2
TS_S_IN_0_VAL
T30
DEMOD_TSDATA3
TS_S_IN_0_SYNC
V33
DEMOD_TSDATA4
TS_S_IN_0_DATA
V32
DEMOD_TSDATA5
V31
DEMOD_TSDATA6
V30
DEMOD_TSDATA7
T35
DEMOD_TSSYNC
T31
DEMOD_TSVAL
N36
/PCM_REG
CI_INT
T37
CI_TSCLK
/PCM_CE1
R35
CI_TSDATA0
MT5369_TS_SYNC
CI SLOT -> SOC
R37
CI_TSSYNC
/PCM_WE
R36
CI_TSVAL
/PCM_OE
R34
MT5369_TS_VAL
PVR_TSCLK
CI SLOT -> SOC
R32
PVR_TSVAL
CI_A_VS1
R33
MT5369_TS_CLK
PVR_TSSYNC
CI SLOT -> SOC
P33
PVR_TSDATA0
/PCM_IRQA
P34
/PCM_WAIT
PVR_TSDATA1
N37
/CI_CD2
SPI_CLK1
P35
SPI_CLK
/CI_CD1
N34
SPI_DATA
/PCM_IORD
N35
SPI_CLE
/PCM_IOWR
AU12
OPWM2
PWM_DIM2
AT12
OPWM1
PWM_DIM1
AR12
OPWM0
A37
R197
R198
SD_D0
1K
1K
C35
SD_D1
A36
SD_D2
B35
PWM2_PULL_DOWN_1K
SD_D3
PWM1_PULL_DOWN_1K
B36
SD_CMD
B37
SD_CLK
AT11
LDM_CS
AU11
L/DIM0_SCLK
LDM_CLK
AR10
LDM_VSYNC
L/DIM0_VS
AM9
L/DIM0_MOSI
LDM_DO
AP10
LDM_DI
AN22
LED_PWM1
LED_PWM1
AP21
LED_PWM0
LED_PWM0
5V Tolerance
AU20
OPCTRL11
OPCTRL_11_SCL
AT20
OPCTRL10
OPCTRL_10_SDA
AN18
EDID_WP_MTK
OPCTRL9
AP20
OPCTRL8
SC_DET
AM18
OPCTRL7
AN19
OPCTRL6
TCLK_SEL
AP19
HP_DET
OPCTRL5
AR19
OPCTRL4
LAN2_DET
AN21
OPCTRL3
OPCTRL3
AM19
OPCTRL2
EXT_SPK_DET
AN20
OPCTRL1
OPCTRL_1_SCL
AR20
OPCTRL0
OPCTRL_0_SDA
2012.12.10
8
LGE Internal Use Only
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