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Circuit Description
1 Frequency configuration
The reference frequency of frequency synthesizer is provided by 16.8MHz crystal oscillator X1 TCXO.
The receiver adopts quadric mixing mode. The first IF is 49.95MHz, and the second IF is 450kHz. The
first local oscillation signal of the receiver is produced by frequency synthesizer and the second local
rd
oscillation signal selects the 4
harmonics of 16.8MHz of crystal oscillator X1 TCXO. The signal of
transmitter is produced by frequency synthesizer directly.
Figure 1 Frequency configuration
2 Receiver(Rx)
The receiver is double conversion superheterodyne,designed to operate in the frequency range of
136 to 174MHz,The frequency c
onfiguration in Fig 1.1
Figure 2 Receiver section configuration
Front End of Receiver
Signals from the antenna are filtered by BPF via RX/TX switch (D101 D102 and D103). After being
filtered out the useless out-of-band signals, the signals are amplified by LNA consisting of Q203 and
external components.
Signals from LNA are filtered again by BPF before entering the 1st mixer (Q202).
1

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Summary of Contents for Covalue DR6000-1

  • Page 1 Circuit Description 1 Frequency configuration The reference frequency of frequency synthesizer is provided by 16.8MHz crystal oscillator X1 TCXO. The receiver adopts quadric mixing mode. The first IF is 49.95MHz, and the second IF is 450kHz. The first local oscillation signal of the receiver is produced by frequency synthesizer and the second local oscillation signal selects the 4 harmonics of 16.8MHz of crystal oscillator X1 TCXO.
  • Page 2 The PWM wave is output by MCU composed of 58 foot and then commutated to adjustable voltage after filtering to change the capacity of varactor diode D905 D203 D202 and D204 to control the center frequency of BPF. mixer The first IF (49.95MHz) signal is produced after mixing of the receiving signal from LNA and the 1 local oscillation signal from frequency synthesizer.
  • Page 3: Transmitter (Tx)

    The audio processing circuit of receiver consists of IC300. Voice signals from IC300 are sent to IC301 (CTCSS signaling filter circuit. Squelch Circuit Part of the AF signal from the IC200 enters the FM IC again,and the noise component is amplified and rectified by a filter and an amplifier to produce a DC voltage corresponding to the noise level.
  • Page 4 APC(Automatic Power Control) Figure 5 Schematic Diagram for APC Circuit R130 R131 and R132 are power amplification current detector, IC100A is power amplification current sampling amplifier and IC00B is power comparison amplifier. The power amplification current and IC100A output will increase with oversized output power of transmitter.
  • Page 5: Pll Frequency Synthesizer

    external MIC, but the internal PTT is still effective. 4 PLL Frequency Synthesizer Figure 7 Schematic Diagram for Frequency Synthesizer The DR6000-2 adopts PLL frequency synthesizer. Frequency synthesizer consists of reference oscillator, voltage controlled oscillator (VCO), programmable frequency divider (PFD), phase comparator and low pass filter (LPF). RX VCO Unit consists of Q3 D1 D3 L13 C34 C38 C39 and C42.
  • Page 6: Base Band Processor

    synthesizer. 5 Base Band Processor HR_C5000-1 (IC609) is a low power high performance base band processor supporting Tier 1 and Tier 2 of the DMR protocol. it completes the entire physical layer and data link layer, and voice processing part of the call control layer of DMR compliant with ETSI TS 102 361. Figure 8 Base Band Processor 6 Voice Circuit:...
  • Page 7 IC604:5T (controlled by MCU) (5V LDO) IC605:3.3V DC/DC IC618:3.3V LDO, is the supply power of frequency synthesizer 8 MCU Unit Figure 9 Schematic Diagram for MCU Unit MCU Unit controls the operation of every unit to realize all functions of the DR6000-2. Communication with external PC State data access Control PLL for the generation, receiving and transmitting of local oscillation frequency...
  • Page 8 Memory (FLASH) Channel data, CTCSS/DCS data and other function setting data and parameter adjustment data. CTCSS/DCS signal coding and decoding: CTCSS/DCS signals from MCU are sent to TCXO for modulation respectively . CTCSS/DCS signals from receiver are sent to MCU(pin 25) for decoding, and then MCU test if there are CTCSS/DCS signals with the same setting of the station to decide whether open the speaker or not.
  • Page 9 9 Description of Semiconductor Devices The distribution of each pin goes as the table 3. Table 3---Definition of CPU Base Pin: Type Pin Name Port Name Function FLASH_CS SPI Flash Chip Select FLASH_SCLK/ SPI Flash Serial Clock/ LCD_DB6 LCD_DB6(multiplexing) FLASH_SDO SPI Flash Serial Data FLASH_SDI/ SPI Flash Serial Data Output(MCU)/...
  • Page 10 Connected to VSSA VREF+ VREF+ Connected to 3.3V. VDDA VDDA Connected to 3.3V. PA0/ MANDOWN MANDOWN Input; ADC123_IN0 PA1/ BATT Battery Input; ADC123_IN1 PA2/ QT/DQT_IN CTCSS/DCS Input ADC123_IN2 PA3/ VOX Input ADC123_IN3 VSS_4 VSS_4 Connected to VSSA VDD_4 VDD_4 Connected to 3.3V. PA4/ APC/TV APC/TV D/A Output...
  • Page 11 PB13/ DMR_SCLK C5000 Serial Clock Output(From MCU) SPI2_SCK PB14/ DMR_SDO C5000 Serial Data Input SPI2_MISO PB15/ DMR_SDI C5000 Serial Data Output SPI2_MOSI PLL_LD PLL Lock Detect(High Active) PLL_CS PLL Chip Select PD10 PLL_DAT PLL DATA Output PD11 PLL_CLK PLL Clock Output PD12 LCD_RES LCD_RES...
  • Page 12 I2S3ext_SD PC12/ I2S_TX DMR I2S_TX I2S3_SD Key Board K2 Input Key Board K3 Input Key Board K4 Input Key Board K5 Input Key Board K6 Input Key Board K7 Input Key Board K8 Input V_CS DMR V_CS PB3/ V_SCLK DMR V_SCLK SPI3_SCK PB4/ V_SDO...
  • Page 13 Mode Parameter IC614 STM32F405VGT6 IC615 PST9124NR MCU Reset Circuit IC609 HR_C5000-1 Base Band Processor IC619 UPB1509BV UPB1509GV is a divide by 2, 4, 8 prescaler IC for portable radio or cellular telephone applications.